Patents by Inventor Tomer LEVY

Tomer LEVY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12562207
    Abstract: Methods and apparatus for row hammer (RH) mitigation and recovery. A host comprising a memory controller is configured to interface with one or more DRAM devices, such as DRAM DIMMs. The memory controller includes host-side RH mitigation logic and the DRAM devices include DRAM-side RH mitigation logic that cooperates with the host-side RH mitigation logic to perform RH mitigation and/or recovery operations in response to detection of RH attacks. The memory controller and DRAM device are configured to support an RH polling mode under which the memory controller periodically polls for RH attack detection indicia on the DRAM device that is toggled when the DRAM device detects an RH attack. The memory controller and DRAM device may also be configured to support an RH ALERT_n mode under which the use of an ALERT_n signal and pin is used to provide an alert to the memory controller to initiate RH mitigation and/or recovery.
    Type: Grant
    Filed: May 6, 2022
    Date of Patent: February 24, 2026
    Assignee: Intel Corporation
    Inventors: Kuljit S. Bains, Jongwon Lee, Tomer Levy, Bill Nale, Amir Ali Radjai
  • Publication number: 20250356937
    Abstract: An apparatus includes a memory that includes a first memory subchannel and a second memory subchannel; a first memory subsystem; a multiplexer, configured to selectively connect the first memory subsystem to the first memory subchannel or the second memory subchannel; a second memory subsystem, connected to the second memory subchannel; and a processor, configured to control the multiplexer to connect the first memory subsystem to the first memory subchannel according to a first operational mode, or to selectively connect the first memory subsystem to the second memory subchannel according to a second operational mode, based on whether a defect is detected in the second memory subsystem.
    Type: Application
    Filed: August 1, 2025
    Publication date: November 20, 2025
    Inventors: Tomer LEVY, Yuri AMIROV
  • Publication number: 20250307102
    Abstract: An apparatus and method for an interconnect fabric distributed trace filter. For example, one embodiment of a processor comprises: an interconnect fabric; a plurality of fabric agents coupled to operatively couple a corresponding plurality of functional circuits to the interconnect fabric, a first fabric agent of the plurality of fabric agents comprising first debug circuitry to initiate a debug transaction and set a value of one or more bits in a request packet to indicate that the request packet is associated with debug operations; and debug agent circuitry integral to or operatively coupled to one or more channels of the interconnect fabric, the debug agent circuitry to determine that the request packet is associated with the debug operations based on the value of the one or more bits and to responsively perform a first update to a trace log.
    Type: Application
    Filed: March 28, 2024
    Publication date: October 2, 2025
    Inventors: Gilad SHAYEVITZ, Tomer LEVY, Israel DIAMAND, Tsvika KURTS, Michael LOPATNIKOV
  • Publication number: 20250218485
    Abstract: Techniques and mechanisms for selectively throttling operation of circuitry, wherein said throttling is based on a threshold rate at which a memory is to be refreshed. In an embodiment, a power management unit (PMU) accommodates coupling to receive an identifier of a first refresh rate which has been requested with the random access memory (RAM) device. The PMU provides functionality to calculate a difference between a threshold maximum refresh rate and the first refresh rate. Based on the calculated difference, a throttle action is identified, and one or more control signals are generated to throttle operation of circuitry which is thermally coupled with the RAM device. In another embodiment, the RAM device continues to be refreshed at the first refresh rate during and/or after the throttling of the circuitry.
    Type: Application
    Filed: December 27, 2023
    Publication date: July 3, 2025
    Applicant: Intel Corporation
    Inventors: Yevgeni Sabin, Tomer Levy, Dor Zvik, Zeev Offen, Mark Gallina, Dorit Shapira, Yoni Aizik
  • Patent number: 12321214
    Abstract: In a memory subsystem, a memory controller can put its physical interface (PHY) into a low power state when an associated memory device is in self-refresh. Instead of powering on the interface and then triggering the memory device to exit self-refresh, or instead waiting for the physical interface to be powered up prior to waking the memory device from self-refresh, the memory controller can instruct the PHY to send a self-refresh exit command to the memory device and power up the physical interface in parallel with the memory device coming out of self-refresh. The memory controller can power down a high speed clock path of the PHY and use a slower clock path to send the self-refresh exit command before powering the high speed clock path back up.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: June 3, 2025
    Assignee: Intel Corporation
    Inventors: Christopher P. Mozak, Robert J. Royer, Jr., Aaron Martin, Alex P. Thomas, Tomer Levy, Noam Lupovich
  • Patent number: 11928144
    Abstract: A computer implemented method of creating a clustering model used for clustering a plurality of log messages comprising using one or more processors for receiving a plurality of training log messages, performing the following for each of the plurality of training log messages: calculating a string distance between a textual content of the respective training log message and a representative string pattern of each of the plurality of clusters, associating the respective training log message with a respective one of the plurality of clusters in case the string distance is within a predefined threshold and adding a new cluster to the plurality of clusters for associating respective training log message in case the string distance exceeds the predefined threshold, and outputting the clustering model.
    Type: Grant
    Filed: December 8, 2021
    Date of Patent: March 12, 2024
    Assignee: LogsHero Ltd.
    Inventors: Tomer Levy, Asaf Yigal, Ziv Segal, Amir Kalron, Eran Nir, Asaf Mesika, Doron Gill
  • Patent number: 11558158
    Abstract: A wireless communication device for communicating across a wireless communication channel includes one or more processors configured to determine whether a further device is generating a radio frequency interference at an operating frequency; transmit a request message to the further device requesting the further device vacate the operating frequency based on the determination that the further device is generating radio frequency interference; receive a response message from the further device; and generate an instruction based on the response message.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: January 17, 2023
    Assignee: Intel Corporation
    Inventors: Michael Shusterman, John Fallin, Ana M. Yepes, Dong-Ho Han, Nasser A. Kurd, Tomer Levy, Ehud Reshef, Arik Gihon, Ido Ouzieli, Yevgeni Sabin, Maor Tal, Zhongsheng Wang, Amit Zeevi
  • Publication number: 20220262428
    Abstract: Methods and apparatus for row hammer (RH) mitigation and recovery. A host comprising a memory controller is configured to interface with one or more DRAM devices, such as DRAM DIMMs. The memory controller includes host-side RH mitigation logic and the DRAM devices include DRAM-side RH mitigation logic that cooperates with the host-side RH mitigation logic to perform RH mitigation and/or recovery operations in response to detection of RH attacks. The memory controller and DRAM device are configured to support an RH polling mode under which the memory controller periodically polls for RH attack detection indicia on the DRAM device that is toggled when the DRAM device detects an RH attack. The memory controller and DRAM device may also be configured to support an RH ALERT_n mode under which the use of an ALERT_n signal and pin is used to provide an alert to the memory controller to initiate RH mitigation and/or recovery.
    Type: Application
    Filed: May 6, 2022
    Publication date: August 18, 2022
    Inventors: Kuljit S. BAINS, Jongwon LEE, Tomer LEVY, Bill NALE, Amir Ali RADJAI
  • Patent number: 11334602
    Abstract: A system and methods for classification of events, the system including a memory, a network interface, and a processor configured to monitor system events via the network interface and store the system events as an event log in the memory, collect information about events from various web resources, extract, from the event log and the collected event information, labeling data including data about urgency of events and generate, based on the extracted labeling data, labeling data structures ascribing labels to respective events, extract, from the event log and the collected event information, event features data and generate, based on the extracted event features data, event features data structures ascribing features to respective events, and formulate decision rule structures for identification of urgent events based on the labeling data structures and the event features data structures.
    Type: Grant
    Filed: August 9, 2018
    Date of Patent: May 17, 2022
    Assignee: LogsHero Ltd.
    Inventors: Ianir Ideses, Tomer Levy, Asaf Yigal, Ziv Segal
  • Publication number: 20220150006
    Abstract: A wireless communication device for communicating across a wireless communication channel includes one or more processors configured to determine whether a further device is generating a radio frequency interference at an operating frequency; transmit a request message to the further device requesting the further device vacate the operating frequency based on the determination that the further device is generating radio frequency interference; receive a response message from the further device; and generate an instruction based on the response message.
    Type: Application
    Filed: November 10, 2020
    Publication date: May 12, 2022
    Inventors: Michael SHUSTERMAN, John FALLIN, Ana M. YEPES, Dong-Ho HAN, Nasser A. KURD, Tomer LEVY, Ehud RESHEF, Arik GIHON, Ido OUZIELI, Yevgeni SABIN, Maor TAL, Zhongsheng WANG, Amit ZEEVI
  • Publication number: 20220138286
    Abstract: Systems, apparatuses and methods may provide for encryption based technology. Data may be encrypted locally with a graphics processor with encryption engines. The graphics processor components may be verified with a root-of-trust and based on collection of claims. The graphics processor may further be able to modify encrypted data from a non-pageable format to a pageable format. The graphics processor may further process data associated with a virtual machine based on a key that is known by the virtual machine and the graphics processor.
    Type: Application
    Filed: December 23, 2020
    Publication date: May 5, 2022
    Applicant: Intel Corporation
    Inventors: David Zage, Scott Janus, Ned M. Smith, Vidhya Krishnan, Siddhartha Chhabra, Rajesh Poornachandran, Tomer Levy, Julien Carreno, Ankur Shah, Ronald Silvas, Aravindh Anantaraman, David Puffer, Vedvyas Shanbhogue, David Cowperthwaite, Aditya Navale, Omer Ben-Shalom, Alex Nayshtut, Xiaoyu Ruan
  • Publication number: 20220121263
    Abstract: In a memory subsystem, a memory controller can put its physical interface (PHY) into a low power state when an associated memory device is in self-refresh. Instead of powering on the interface and then triggering the memory device to exit self-refresh, or instead waiting for the physical interface to be powered up prior to waking the memory device from self-refresh, the memory controller can instruct the PHY to send a self-refresh exit command to the memory device and power up the physical interface in parallel with the memory device coming out of self-refresh. The memory controller can power down a high speed clock path of the PHY and use a slower clock path to send the self-refresh exit command before powering the high speed clock path back up.
    Type: Application
    Filed: December 23, 2021
    Publication date: April 21, 2022
    Inventors: Christopher P. MOZAK, Robert J. ROYER, Jr., Aaron MARTIN, Alex P. THOMAS, Tomer LEVY, Noam LUPOVICH
  • Publication number: 20220092102
    Abstract: A computer implemented method of creating a clustering model used for clustering a plurality of log messages comprising using one or more processors for receiving a plurality of training log messages, performing the following for each of the plurality of training log messages: calculating a string distance between a textual content of the respective training log message and a representative string pattern of each of the plurality of clusters, associating the respective training log message with a respective one of the plurality of clusters in case the string distance is within a predefined threshold and adding a new cluster to the plurality of clusters for associating respective training log message in case the string distance exceeds the predefined threshold, and outputting the clustering model.
    Type: Application
    Filed: December 8, 2021
    Publication date: March 24, 2022
    Applicant: LogsHero Ltd.
    Inventors: Tomer LEVY, Asaf YIGAL, Ziv SEGAL, Amir KALRON, Eran NIR, Asaf MESIKA, Doron GILL
  • Patent number: 11250691
    Abstract: Methods and a system for detecting physical intrusion are providing, including sampling a set of seismic signals from a vibration sensor of a buried sensor intrusion device, determining that the set of seismic signals matches a seismic threat pattern and responsively generating a seismic alert, recording a surveillance video of an area under which the sensor device has been buried, processing the surveillance video to determine whether a human figure is present and, responsively to determining that a human figure is present and to the generation of the seismic alert, issuing an threat detection alert.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: February 15, 2022
    Assignee: SENSOGUARD LTD.
    Inventor: Tomer Levy
  • Patent number: 11216502
    Abstract: A computer implemented method of creating a clustering model used for clustering a plurality of log messages comprising using one or more processors for receiving a plurality of training log messages, performing the following for each of the plurality of training log messages: calculating a string distance between a textual content of the respective training log message and a representative string pattern of each of the plurality of clusters, associating the respective training log message with a respective one of the plurality of clusters in case the string distance is within a predefined threshold and adding a new cluster to the plurality of clusters for associating respective training log message in case the string distance exceeds the predefined threshold, and outputting the clustering model.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: January 4, 2022
    Assignee: LogsHero Ltd.
    Inventors: Tomer Levy, Asaf Yigal, Ziv Segal, Amir Kalron, Eran Nir, Asaf Mesika, Doron Gill
  • Publication number: 20210104150
    Abstract: Methods and a system for detecting physical intrusion are providing, including sampling a set of seismic signals from a vibration sensor of a buried sensor intrusion device, determining that the set of seismic signals matches a seismic threat pattern and responsively generating a seismic alert, recording a surveillance video of an area under which the sensor device has been buried, processing the surveillance video to determine whether a human figure is present and, responsively to determining that a human figure is present and to the generation of the seismic alert, issuing an threat detection alert.
    Type: Application
    Filed: November 23, 2020
    Publication date: April 8, 2021
    Inventor: Tomer LEVY
  • Patent number: 10878674
    Abstract: Methods and a device for detecting physical intrusion are providing, the device including a vibration sensor, a processor, a transmitter, a battery, and a conductive wire connecting the vibration sensor and the processor. The vibration sensor is affixed to a first part of the device, and the processor, transmitter, and battery are affixed to a second part of the device. The first and second parts, when attached together, form a case containing the conductive wire. The device performs steps of: sampling a set of seismic signals from the vibration sensor, determining that the set of seismic signals matches a seismic threat pattern, and responsively issuing an intrusion alert.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: December 29, 2020
    Assignee: SENSOGUARD LTD.
    Inventor: Tomer Levy
  • Publication number: 20200160678
    Abstract: Methods and a device for detecting physical intrusion are providing, the device including a vibration sensor, a processor, a transmitter, a battery, and a conductive wire connecting the vibration sensor and the processor. The vibration sensor is affixed to a first part of the device, and the processor, transmitter, and battery are affixed to a second part of the device. The first and second parts, when attached together, form a case containing the conductive wire. The device performs steps of: sampling a set of seismic signals from the vibration sensor, determining that the set of seismic signals matches a seismic threat pattern, and responsively issuing an intrusion alert.
    Type: Application
    Filed: November 14, 2019
    Publication date: May 21, 2020
    Inventor: Tomer LEVY
  • Patent number: 10516439
    Abstract: In one example a controller comprises logic, at least partially including hardware logic, configured to implement a first iteration of an interference test on a communication interconnect comprising a victim lane and a first aggressor lane by generating a first set of pseudo-random patterns on the victim lane and the aggressor lane using a first seed and implement a second iteration of an interference test by advancing the seed on the first aggressor lane. Other examples may be described.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: December 24, 2019
    Assignee: Intel Corporation
    Inventors: Alexey Kostinsky, Tomer Levy, Paul S. Cheses, Danny Naiger, Theodore Z. Schoenborn, Christopher P. Mozak, Nagi Aboulenein, James M. Shehadi
  • Publication number: 20190370347
    Abstract: A computer implemented method of creating a clustering model used for clustering a plurality of log messages comprising using one or more processors for receiving a plurality of training log messages, performing the following for each of the plurality of training log messages: calculating a string distance between a textual content of the respective training log message and a representative string pattern of each of the plurality of clusters, associating the respective training log message with a respective one of the plurality of clusters in case the string distance is within a predefined threshold and adding a new cluster to the plurality of clusters for associating respective training log message in case the string distance exceeds the predefined threshold, and outputting the clustering model.
    Type: Application
    Filed: June 5, 2018
    Publication date: December 5, 2019
    Inventors: Tomer Levy, Asaf Yigal, Ziv Segal, Amir Kalron, Eran Nir, Asaf Mesika, Doron Gill