Patents by Inventor Tommy K. Eng
Tommy K. Eng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9913153Abstract: Techniques for operating a wireless network in a plurality of radio operating environments are disclosed. In some embodiments, an apparatus receives a first parameter value set that is selected from a group of multiple parameter value sets, wherein the first parameter value set is appropriate for a first target radio operating environment that corresponds to one or more of: a first level of mobility of user devices or a first range of wireless transmission. In some embodiments, the apparatus is reconfigured to receive wireless broadcast transmissions from a second broadcast transmitter using a second parameter value set that is appropriate for a second target radio operating environment. The first and second broadcast transmitters may be the same or different. The parameter value sets may include a first parameter based upon which the apparatus is configured to determine subcarrier spacing and a second parameter that indicates a cyclic prefix size.Type: GrantFiled: July 26, 2017Date of Patent: March 6, 2018Assignee: Coherent Logix, IncorporatedInventors: Tommy K. Eng, Kevin A. Shelby
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Publication number: 20170325105Abstract: Techniques for operating a wireless network in a plurality of radio operating environments are disclosed. In some embodiments, an apparatus receives a first parameter value set that is selected from a group of multiple parameter value sets, wherein the first parameter value set is appropriate for a first target radio operating environment that corresponds to one or more of: a first level of mobility of user devices or a first range of wireless transmission. In some embodiments, the apparatus is reconfigured to receive wireless broadcast transmissions from a second broadcast transmitter using a second parameter value set that is appropriate for a second target radio operating environment. The first and second broadcast transmitters may be the same or different.Type: ApplicationFiled: July 26, 2017Publication date: November 9, 2017Inventors: Tommy K. Eng, Kevin A. Shelby
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Patent number: 9749879Abstract: A method for operating a wireless network in a plurality of radio operating environments is disclosed. A first parameter value set is selected from a library of two or more parameter value sets. Each of the parameter value sets includes a value for each of one or more communication-related parameters. The first parameter value set is appropriate for a first target radio operating environment. The action of selecting the first parameter value set is performed for a first set of one or more infrastructure radios that are to be operated in the first target radio operating environment. The first parameter value set is applied to the first set of one or more infrastructure radios so that the first set of one or more infrastructure radios will start using the first parameter value set to wirelessly communicate with user devices.Type: GrantFiled: August 19, 2014Date of Patent: August 29, 2017Assignee: COHERENT LOGIX, INCORPORATEDInventors: Tommy K. Eng, Kevin A. Shelby
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Publication number: 20160103663Abstract: A computer-implemented method for creating a program for a multi-processor system comprising a plurality of interspersed processors and memories. A user may specify or create source code using a programming language. The source code specifies a plurality of tasks and communication of data among the plurality of tasks. However, the source code may not (and preferably is not required to) 1) explicitly specify which physical processor will execute each task and 2) explicitly specify which communication mechanism to use among the plurality of tasks. The method then creates machine language instructions based on the source code, wherein the machine language instructions are designed to execute on the plurality of processors. Creation of the machine language instructions comprises assigning tasks for execution on respective processors and selecting communication mechanisms between the processors based on location of the respective processors and required data communication to satisfy system requirements.Type: ApplicationFiled: December 17, 2015Publication date: April 14, 2016Inventors: John Mark Beardslee, Michael B. Doerr, Tommy K. Eng
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Patent number: 9250867Abstract: A computer-implemented method for creating a program for a multi-processor system comprising a plurality of interspersed processors and memories. A user may specify or create source code using a programming language. The source code specifies a plurality of tasks and communication of data among the plurality of tasks. However, the source code may not (and preferably is not required to) 1) explicitly specify which physical processor will execute each task and 2) explicitly specify which communication mechanism to use among the plurality of tasks. The method then creates machine language instructions based on the source code, wherein the machine language instructions are designed to execute on the plurality of processors. Creation of the machine language instructions comprises assigning tasks for execution on respective processors and selecting communication mechanisms between the processors based on location of the respective processors and required data communication to satisfy system requirements.Type: GrantFiled: May 22, 2014Date of Patent: February 2, 2016Assignee: Coherent Logix, IncorporatedInventors: John Mark Beardslee, Michael B. Doerr, Tommy K. Eng
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Publication number: 20150049642Abstract: A method for operating a wireless network in a plurality of radio operating environments is disclosed. A first parameter value set is selected from a library of two or more parameter value sets. Each of the parameter value sets includes a value for each of one or more communication-related parameters. The first parameter value set is appropriate for a first target radio operating environment. The action of selecting the first parameter value set is performed for a first set of one or more infrastructure radios that are to be operated in the first target radio operating environment. The first parameter value set is applied to the first set of one or more infrastructure radios so that the first set of one or more infrastructure radios will start using the first parameter value set to wirelessly communicate with user devices.Type: ApplicationFiled: August 19, 2014Publication date: February 19, 2015Inventors: Tommy K. Eng, Kevin A. Shelby
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Publication number: 20150043491Abstract: A broadcast/broadband convergence system that delivers content from content sources to user equipment devices. The system provides: significantly enhanced mobile capability to the broadcast industry; an additional revenue source for the broadcast industry by dynamically selling available spectral resources for use by wireless broadband networks and/or broadcast content off-loaded from wireless broadband networks; additional spectrum for the broadband industry through the dynamic purchase of available spectrum; and an enriched user experience. A spectrum server may facilitate the dynamic allocation of radio spectrum made available by the broadcast networks. The broadcast networks may broadcast with enhanced waveform parameters to support mobile devices as well as fixed devices.Type: ApplicationFiled: August 11, 2014Publication date: February 12, 2015Inventors: Tommy K. Eng, Kevin A. Shelby
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Publication number: 20140258974Abstract: A computer-implemented method for creating a program for a multi-processor system comprising a plurality of interspersed processors and memories. A user may specify or create source code using a programming language. The source code specifies a plurality of tasks and communication of data among the plurality of tasks. However, the source code may not (and preferably is not required to) 1) explicitly specify which physical processor will execute each task and 2) explicitly specify which communication mechanism to use among the plurality of tasks. The method then creates machine language instructions based on the source code, wherein the machine language instructions are designed to execute on the plurality of processors. Creation of the machine language instructions comprises assigning tasks for execution on respective processors and selecting communication mechanisms between the processors based on location of the respective processors and required data communication to satisfy system requirements.Type: ApplicationFiled: May 22, 2014Publication date: September 11, 2014Applicant: COHERENT LOGIX, INCORPORATEDInventors: John Mark Beardslee, Michael B. Doerr, Tommy K. Eng
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Patent number: 8826228Abstract: A computer-implemented method for creating a program for a multi-processor system comprising a plurality of interspersed processors and memories. A user may specify or create source code using a programming language. The source code specifies a plurality of tasks and communication of data among the plurality of tasks. However, the source code may not (and preferably is not required to) 1) explicitly specify which physical processor will execute each task and 2) explicitly specify which communication mechanism to use among the plurality of tasks. The method then creates machine language instructions based on the source code, wherein the machine language instructions are designed to execute on the plurality of processors. Creation of the machine language instructions comprises assigning tasks for execution on respective processors and selecting communication mechanisms between the processors based on location of the respective processors and required data communication to satisfy system requirements.Type: GrantFiled: March 27, 2007Date of Patent: September 2, 2014Assignee: Coherent Logix, IncorporatedInventors: John Mark Beardslee, Michael B. Doerr, Tommy K. Eng
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Patent number: 8788989Abstract: System and method for developing an ASIC. A software program may be stored which includes program instructions which implement a function. The software program may be executed on a processing system at a desired system speed and may be validated based on the execution. A first hardware description of at least a portion of the processing system may be stored and may specify implementation of at least a portion of the processing system. A second hardware description may be generated that corresponds to a first portion of the first hardware description. The second hardware description may specify a dedicated hardware implementation of a first portion of the software program executing on the processing system. Generation of the second hardware description may be performed one or more times to fully specify the ASIC. An ASIC may be created which implements the function of the software program.Type: GrantFiled: April 15, 2013Date of Patent: July 22, 2014Assignee: Coherent Logix, IncorporatedInventor: Tommy K. Eng
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Publication number: 20130283220Abstract: System and method for developing an ASIC. A software program may be stored which includes program instructions which implement a function. The software program may be executed on a processing system at a desired system speed and may be validated based on the execution. A first hardware description of at least a portion of the processing system may be stored and may specify implementation of at least a portion of the processing system. A second hardware description may be generated that corresponds to a first portion of the first hardware description. The second hardware description may specify a dedicated hardware implementation of a first portion of the software program executing on the processing system. Generation of the second hardware description may be performed one or more times to fully specify the ASIC. An ASIC may be created which implements the function of the software program.Type: ApplicationFiled: April 15, 2013Publication date: October 24, 2013Applicant: COHERENT LOGIX, INCORPORATEDInventor: Tommy K. Eng
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Patent number: 8438510Abstract: System and method for developing an ASIC. A software program may be stored which includes program instructions which implement a function. The software program may be executed on a processing system at a desired system speed and may be validated based on the execution. A first hardware description of at least a portion of the processing system may be stored and may specify implementation of at least a portion of the processing system. A second hardware description may be generated that corresponds to a first portion of the first hardware description. The second hardware description may specify a dedicated hardware implementation of a first portion of the software program executing on the processing system. Generation of the second hardware description may be performed one or more times to fully specify the ASIC. An ASIC may be created which implements the function of the software program.Type: GrantFiled: March 27, 2012Date of Patent: May 7, 2013Assignee: Coherent Logix, IncorporatedInventor: Tommy K. Eng
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Publication number: 20120192131Abstract: System and method for developing an ASIC. A software program may be stored which includes program instructions which implement a function. The software program may be executed on a processing system at a desired system speed and may be validated based on the execution. A first hardware description of at least a portion of the processing system may be stored and may specify implementation of at least a portion of the processing system. A second hardware description may be generated that corresponds to a first portion of the first hardware description. The second hardware description may specify a dedicated hardware implementation of a first portion of the software program executing on the processing system. Generation of the second hardware description may be performed one or more times to fully specify the ASIC. An ASIC may be created which implements the function of the software program.Type: ApplicationFiled: March 27, 2012Publication date: July 26, 2012Inventor: Tommy K. Eng
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Patent number: 8171436Abstract: System and method for developing an ASIC. A software program may be stored which includes program instructions which implement a function. The software program may be executed on a processing system at a desired system speed and may be validated based on the execution. A first hardware description of at least a portion of the processing system may be stored and may specify implementation of at least a portion of the processing system. A second hardware description may be generated that corresponds to a first portion of the first hardware description. The second hardware description may specify a dedicated hardware implementation of a first portion of the software program executing on the processing system. Generation of the second hardware description may be performed one or more times to fully specify the ASIC. An ASIC may be created which implements the function of the software program.Type: GrantFiled: May 18, 2011Date of Patent: May 1, 2012Assignee: Coherent Logix, IncorporatedInventor: Tommy K. Eng
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Publication number: 20110219343Abstract: System and method for developing an ASIC. A software program may be stored which includes program instructions which implement a function. The software program may be executed on a processing system at a desired system speed and may be validated based on the execution. A first hardware description of at least a portion of the processing system may be stored and may specify implementation of at least a portion of the processing system. A second hardware description may be generated that corresponds to a first portion of the first hardware description. The second hardware description may specify a dedicated hardware implementation of a first portion of the software program executing on the processing system. Generation of the second hardware description may be performed one or more times to fully specify the ASIC. An ASIC may be created which implements the function of the software program.Type: ApplicationFiled: May 18, 2011Publication date: September 8, 2011Inventor: Tommy K. Eng
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Patent number: 7949969Abstract: System and method for developing an ASIC. A software program may be stored which includes program instructions which implement a function. The software program may be executed on a processing system at a desired system speed and may be validated based on the execution. A first hardware description of at least a portion of the processing system may be stored and may specify implementation of at least a portion of the processing system. A second hardware description may be generated that corresponds to a first portion of the first hardware description. The second hardware description may specify a dedicated hardware implementation of a first portion of the software program executing on the processing system. Generation of the second hardware description may be performed one or more times to fully specify the ASIC. An ASIC may be created which implements the function of the software program.Type: GrantFiled: July 16, 2010Date of Patent: May 24, 2011Assignee: Coherent Logix, IncorporatedInventor: Tommy K. Eng
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Publication number: 20100281451Abstract: System and method for developing an ASIC. A software program may be stored which includes program instructions which implement a function. The software program may be executed on a processing system at a desired system speed and may be validated based on the execution. A first hardware description of at least a portion of the processing system may be stored and may specify implementation of at least a portion of the processing system. A second hardware description may be generated that corresponds to a first portion of the first hardware description. The second hardware description may specify a dedicated hardware implementation of a first portion of the software program executing on the processing system. Generation of the second hardware description may be performed one or more times to fully specify the ASIC. An ASIC may be created which implements the function of the software program.Type: ApplicationFiled: July 16, 2010Publication date: November 4, 2010Inventor: Tommy K. Eng
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Patent number: 7761817Abstract: System and method for developing an ASIC. A software program may be stored which includes program instructions which implement a function. The software program may be executed on a processing system at a desired system speed and may be validated based on the execution. A first hardware description of at least a portion of the processing system may be stored and may specify implementation of at least a portion of the processing system. A second hardware description may be generated that corresponds to a first portion of the first hardware description. The second hardware description may specify a dedicated hardware implementation of a first portion of the software program executing on the processing system. Generation of the second hardware description may be performed one or more times to fully specify the ASIC. An ASIC may be created which implements the function of the software program.Type: GrantFiled: May 22, 2007Date of Patent: July 20, 2010Assignee: Coherent Logix, IncorporatedInventor: Tommy K. Eng
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Publication number: 20070271545Abstract: System and method for developing an ASIC. A software program may be stored which includes program instructions which implement a function. The software program may be executed on a processing system at a desired system speed and may be validated based on the execution. A first hardware description of at least a portion of the processing system may be stored and may specify implementation of at least a portion of the processing system. A second hardware description may be generated that corresponds to a first portion of the first hardware description. The second hardware description may specify a dedicated hardware implementation of a first portion of the software program executing on the processing system. Generation of the second hardware description may be performed one or more times to fully specify the ASIC. An ASIC may be created which implements the function of the software program.Type: ApplicationFiled: May 22, 2007Publication date: November 22, 2007Inventor: Tommy K. Eng
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Patent number: 7143367Abstract: An electronic design automation system provides optimization of RTL models of electronic designs, to produce detailed constraints and data precisely defining the requirements for the back-end flows leading to design fabrication. The system takes a RTL model of an electronic design and maps it into an efficient, high level hierarchical representation of the hardware implementation of the design. Automatic partitioning partitions the hardware representation into functional partitions, and creates a fully characterized performance envelope for a range of feasible implementations for each of the partitions, using accurate placement based wire load models. Chip-level optimization selects and refines physical implementations of the partitions to produce compacted, globally routed floorplans. Chip-level optimization iteratively invokes re-partitioning passes to refine the partitions and to recompute the feasible implementations.Type: GrantFiled: December 28, 2001Date of Patent: November 28, 2006Assignee: Tera Systems, Inc.Inventor: Tommy K Eng