Patents by Inventor Tomoaki Atsumi
Tomoaki Atsumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8143627Abstract: In manufacturing a semiconductor device, static electricity is generated while contact holes are formed in an interlayer insulating film by dry etching. Damage to a pixel region or a driving circuit region due to travel of the static electricity generated is prevented. Gate signal lines are spaced apart from each other above a crystalline semiconductor film. Therefore a first protective circuit is not electrically connected when contact holes are opened in an interlayer insulating film. The static electricity generated during dry etching for opening the contact holes moves from the gate signal line, damages a gate insulating film, passes the crystalline semiconductor film, and again damages the gate insulating film before it reaches the gate signal line. As the static electricity generated during the dry etching damages the first protective circuit, the energy of the static electricity is reduced until it loses the capacity of damaging a driving circuit TFT.Type: GrantFiled: June 24, 2010Date of Patent: March 27, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Satoshi Murakami, Yosuke Tsukamoto, Tomoaki Atsumi, Masayuki Sakakura
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Publication number: 20110315780Abstract: Initialization of a semiconductor device can be efficiently performed, which transmits and receives data through wireless communication. The semiconductor device includes an antenna, a power source circuit, a circuit which uses a DC voltage generated by the power source circuit as a power source voltage, and a resistor. The antenna includes a pair of terminals and receives a wireless signal (a modulated carrier wave). The power source circuit includes a first terminal and a second terminal and generates a DC voltage between the first terminal and the second terminal by using a received wireless signal (the modulated carrier wave). The resistor is connected between the first terminal and the second terminal. In this manner, the semiconductor device and the wireless communication system can transmit and receive data accurately.Type: ApplicationFiled: September 7, 2011Publication date: December 29, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Tomoaki ATSUMI, Yutaka SHIONOIRI, Hidetomo KOBAYASHI
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Patent number: 8083128Abstract: An object is to provide a semiconductor device which includes an anti-collision function during or after production of an IC chip just by a change of a program, even when there is a change of a specification of a product accompanying a change of the kind or standard of a signal of a wireless means for each product. A semiconductor device includes an arithmetic circuit and a circuit for transmitting/receiving a signal to/from outside. The arithmetic circuit includes a central processing unit, a random access memory, a read only memory, and a controller. The read only memory stores a program for processing collision avoidance in transmitting/receiving the signal to/from outside. The program is executed in the central processing unit, so that the arithmetic circuit processes collision avoidance.Type: GrantFiled: December 1, 2006Date of Patent: December 27, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hiroki Dembo, Tomoaki Atsumi
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Patent number: 8018341Abstract: Initialization of a semiconductor device can be efficiently performed, which transmits and receives data through wireless communication. The semiconductor device includes an antenna, a power source circuit, a circuit which uses a DC voltage generated by the power source circuit as a power source voltage, and a resistor. The antenna includes a pair of terminals and receives a wireless signal (a modulated carrier wave). The power source circuit includes a first terminal and a second terminal and generates a DC voltage between the first terminal and the second terminal by using a received wireless signal (the modulated carrier wave). The resistor is connected between the first terminal and the second terminal. In this manner, the semiconductor device and the wireless communication system can transmit and receive data accurately.Type: GrantFiled: May 17, 2006Date of Patent: September 13, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Tomoaki Atsumi, Yutaka Shionoiri, Hidetomo Kobayashi
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Patent number: 8006217Abstract: To reduce current consumption in a frequency-division circuit, particularly in a multistage frequency-division circuit, in a multistage frequency-division circuit, an inputted signal has a higher frequency in a preceding stage, and an inputted signal has a lower frequency in a following stage. Thus, placement is performed preferentially from the basic cell corresponding to the frequency-division circuit into which a signal having a higher frequency is inputted, and then wiring connection is performed. In other words, the layout of a plurality of basic cells corresponding to a multistage frequency-division circuit is performed so that, as compared to a wiring into which a signal having a lower frequency is inputted, a wiring into which a signal having a higher frequency is inputted has a shorter wiring length and has less intersection with other wirings, so that parasitic capacitance and parasitic resistance of the wiring are reduced.Type: GrantFiled: September 18, 2009Date of Patent: August 23, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Tomoaki Atsumi
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Patent number: 7923796Abstract: It is an object of the present invention to provide a semiconductor device in which an arrangement area of capacitance can be reduced and resonance frequency can be easily adjusted. The semiconductor device includes an antenna and a resonance circuit including a capacitor connected to the antenna in parallel where the capacitor is formed by connecting x pieces of first capacitor (x is an arbitrary natural number), y pieces of second capacitor (y is an arbitrary natural number), and z pieces of third capacitor (z is an arbitrary natural number) in parallel; and the first capacitor, the second capacitor, and the third capacitor have different capacitance values from each other. It is preferable that each of the first capacitor, the second capacitor, and the third capacitor be a MIS capacitor. Further, at least one of the first capacitor, the second capacitor, and the third capacitor is preferably formed by connecting a plurality of capacitors in parallel.Type: GrantFiled: May 25, 2006Date of Patent: April 12, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yutaka Shionoiri, Tomoaki Atsumi, Hiroki Inoue
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Publication number: 20110079650Abstract: A semiconductor device includes a memory portion, a logic portion, and a plurality of signal lines for electrically connecting the memory portion and the logic portion. In the case where a transfer rate between the semiconductor device and a communication device is ? [bps], a first clock frequency generated in the logic portion is K? [Hz] (K is an integer of 1 or more), the number of reading signal lines of the plurality of signal lines is n (n is an integer of 2 or more), and a second clock frequency generated in the logic portion is L?/n [Hz] (L is any integer satisfying L/n<K), data stored in the memory portion is read to the logic portion through the n reading signal lines with use of the second clock frequency L?/n [Hz].Type: ApplicationFiled: September 30, 2010Publication date: April 7, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hidetomo Kobayashi, Tomoaki Atsumi, Seiichi Yoneda, Yasuyuki Takahashi, Kiyoshi Kato
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Patent number: 7877068Abstract: A demodulation signal is generated by provision of a demodulation signal generation circuit to the semiconductor device capable of wireless communication and by obtainment of a difference between voltages having opposite polarities by the demodulation signal generation circuit. Alternatively, a plurality of demodulation signal generation circuits and a selective circuit which selects a demodulation signal generation circuit depending on characteristics of a received signal are provided, where operation of a second demodulation signal generation circuit stops when a first demodulation signal generation circuit is operated. The selective circuit includes an inverter circuit, a flip-flop circuit, and a selector circuit. When the second demodulation signal generation circuit has a comparator and the like, power consumption thereof is reduced.Type: GrantFiled: December 21, 2007Date of Patent: January 25, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Tomoaki Atsumi, Hidetomo Kobayashi
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Publication number: 20100289331Abstract: To provide for a movable electronic device a power receiving device that when charging a battery, simplifies charging of the battery from a power feeder, which is a power supply means, and does not have faults due to an external factor relating to a relay terminal, or damage of the relay terminal, that are caused by directly connecting the battery and the power feeder, and further, to provide an electronic device including the power receiving device. An antenna circuit and a booster antenna for supplying electric power are provided in a movable electronic device. The antenna circuit receives a radio signal such as an electromagnetic wave via the booster antenna, and electric power that is obtained through the receiving of the radio signal is supplied to the battery through a signal processing circuit.Type: ApplicationFiled: July 22, 2010Publication date: November 18, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yutaka SHIONOIRI, Jun KOYAMA, Yoshiyuki KUROKAWA, Shunpei YAMAZAKI, Takayuki IKEDA, Takeshi OSADA, Tomoaki ATSUMI, Masato ISHII
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Patent number: 7826552Abstract: The present invention provides a structure in which an amplitude-modulation mode and a frequency-modulation mode are switched.Type: GrantFiled: August 4, 2006Date of Patent: November 2, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hidetomo Kobayashi, Tomoaki Atsumi
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Publication number: 20100258811Abstract: In manufacturing a semiconductor device, static electricity is generated while contact holes are formed in an interlayer insulating film by dry etching. Damage to a pixel region or a driving circuit region due to travel of the static electricity generated is prevented. Gate signal lines are spaced apart from each other above a crystalline semiconductor film. Therefore a first protective circuit is not electrically connected when contact holes are opened in an interlayer insulating film. The static electricity generated during dry etching for opening the contact holes moves from the gate signal line, damages a gate insulating film, passes the crystalline semiconductor film, and again damages the gate insulating film before it reaches the gate signal line. As the static electricity generated during the dry etching damages the first protective circuit, the energy of the static electricity is reduced until it loses the capacity of damaging a driving circuit TFT.Type: ApplicationFiled: June 24, 2010Publication date: October 14, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Satoshi Murakami, Yosuke Tsukamoto, Tomoaki Atsumi, Masayuki Sakakura
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Patent number: 7791079Abstract: In manufacturing a semiconductor device, static electricity is generated while contact holes are formed in an interlayer insulating film by dry etching. Damage to a pixel region or a driving circuit region due to travel of the static electricity generated is prevented. Gate signal lines are spaced apart from each other above a crystalline semiconductor film. Therefore a first protective circuit is not electrically connected when contact holes are opened in an interlayer insulating film. The static electricity generated during dry etching for opening the contact holes moves from the gate signal line, damages a gate insulating film, passes the crystalline semiconductor film, and again damages the gate insulating film before it reaches the gate signal line. As the static electricity generated during the dry etching damages the first protective circuit, the energy of the static electricity is reduced until it loses the capacity of damaging a driving circuit TFT.Type: GrantFiled: December 17, 2007Date of Patent: September 7, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Satoshi Murakami, Yosuke Tsukamoto, Tomoaki Atsumi, Masayuki Sakakura
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Publication number: 20100205519Abstract: An object of the present invention is to provide a CRC circuit with more simple structure and low power consumption. The CRC circuit includes a first shift register to a p-th shift register, a first EXOR to a (p?1)th EXOR, and a switching circuit. A data signal, a select signal, and an output of a last stage of the p-th shift register are inputted to the switching circuit, and the switching circuit switches a first signal or a second signal in response to the select signal to be outputted.Type: ApplicationFiled: April 27, 2010Publication date: August 12, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Masafumi ITO, Tomoaki Atsumi
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Publication number: 20100163631Abstract: A semiconductor device capable of wireless communication which has low power consumption in a step for decoding an encoded signal to obtain data is provided. The semiconductor device includes an antenna configured to convert received carrier waves into an AC signal, a rectifier circuit configured to rectify the AC signal into a DC voltage, a demodulation circuit configured to demodulate the AC signal into an encoded signal, an oscillator circuit configured to generate a clock signal having a certain frequency by supply of the DC voltage, a synchronizing circuit configured to generate a synchronized encoded signal by synchronizing the encoded signal obtained by demodulating the AC signal with the clock signal, a decoder circuit configured to decode the synchronized encoded signal into a decoded signal, and a register configured to store the decoded signal as a clock (referred to as a digital signal).Type: ApplicationFiled: December 22, 2009Publication date: July 1, 2010Inventors: Masato Ishii, Tomoaki Atsumi
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Patent number: 7710270Abstract: An object is to provide a semiconductor device including an RFID which can transmit/receive individual information without a change of a battery accompanied by deterioration over time of the battery as a drive power source, and to which driving power can be supplied to keep a favorable transmission/reception state of the individual information even when an external electromagnetic wave is not sufficient. The semiconductor device includes a signal processing circuit, a first antenna circuit and a second antenna circuit operationally connected to the signal processing circuit, and a battery operationally connected to the signal processing circuit, in which the first antenna circuit transmits/receives a signal for transmitting data stored in the signal processing circuit; the second antenna circuit receives a signal for charging the battery; and a signal received by the first antenna circuit and a signal received by the second antenna circuit have different wavelengths.Type: GrantFiled: March 14, 2007Date of Patent: May 4, 2010Assignee: Semiconductor Energy Laboratory Co., LtdInventors: Yutaka Shionoiri, Jun Koyama, Yoshiyuki Kurokawa, Shunpei Yamazaki, Takayuki Ikeda, Takeshi Osada, Tomoaki Atsumi, Masato Ishii
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Patent number: 7712009Abstract: An object of the present invention is to provide a CRC circuit with more simple structure and low power consumption. The CRC circuit includes a first shift register to a p-th shift register, a first EXOR to a (p?1)th EXOR, and a switching circuit. A data signal, a select signal, and an output of a last stage of the p-th shift register are inputted to the switching circuit, and the switching circuit switches a first signal or a second signal in response to the select signal to be outputted.Type: GrantFiled: September 19, 2006Date of Patent: May 4, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masafumi Ito, Tomoaki Atsumi
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Patent number: 7704812Abstract: According to the invention, a plurality of semiconductor devices which are required to have conformance are formed from crystalline semiconductor films having uniform crystallinity on the same line, and a semiconductor circuit in which variation between semiconductor devices is small can be provided, and a semiconductor integrated circuit having high conformance can be provided. The invention is characterized in that, in a part or whole of thin film transistors which configure an analog circuit such as a current mirror circuit, a differential amplifier circuit, or an operational amplifier, in which high conformance is required for semiconductor devices included therein, channel forming regions have crystalline semiconductor films on the same line. High conformance can be expected for an analog circuit which has the crystalline semiconductor films on the same line formed using the invention as the channel forming regions of the thin film transistors.Type: GrantFiled: December 1, 2006Date of Patent: April 27, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kiyoshi Kato, Tomoaki Atsumi, Atsuo Isobe
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Publication number: 20100080074Abstract: Easy and fast memory access with correcting defects is to be realized. In a spare memory in a semiconductor memory device, a redundant memory cell array that stores the number of correcting defects is provided. When a signal from the outside is received, the signal is switched to the redundant memory cell array, and the number of correcting defects is judged. Then, based on the result of the judgment, it is determined the judgment of a defective memory cell is continued or the judgment is finished to write data to a main memory cell. By providing the redundant memory cell array that stores the number of correcting defects, a state of correcting defects can be observed fast in such a manner.Type: ApplicationFiled: September 28, 2009Publication date: April 1, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Takuro OHMARU, Tomoaki ATSUMI, Toshihiko SAITO
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Publication number: 20100079179Abstract: It is an object of the present invention to provide a semiconductor device that has a simple circuit structure, a small scale, and low power consumption, and can generate a desired clock signal. The semiconductor device has a clock generation circuit which generates a clock signal by dividing a modulated carrier wave, a divider circuit which generates a first divided signal by dividing a carrier wave, and a correction circuit which generates a second divided signal by further dividing the first divided signal, and has a function of performing correction for inverting the second divided signal in a period corresponding to a half period of the clock signal during modulation of the carrier wave and selecting whether the correction is performed or not.Type: ApplicationFiled: September 28, 2009Publication date: April 1, 2010Inventor: Tomoaki Atsumi
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Publication number: 20100071178Abstract: To reduce current consumption in a frequency-division circuit, particularly in a multistage frequency-division circuit, in a multistage frequency-division circuit, an inputted signal has a higher frequency in a preceding stage, and an inputted signal has a lower frequency in a following stage. Thus, placement is performed preferentially from the basic cell corresponding to the frequency-division circuit into which a signal having a higher frequency is inputted, and then wiring connection is performed. In other words, the layout of a plurality of basic cells corresponding to a multistage frequency-division circuit is performed so that, as compared to a wiring into which a signal having a lower frequency is inputted, a wiring into which a signal having a higher frequency is inputted has a shorter wiring length and has less intersection with other wirings, so that parasitic capacitance and parasitic resistance of the wiring are reduced.Type: ApplicationFiled: September 18, 2009Publication date: March 25, 2010Inventor: Tomoaki Atsumi