Patents by Inventor Tomofumi Nishiura

Tomofumi Nishiura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8045789
    Abstract: In the inspection apparatus for a defect of a semiconductor and the method using it for automatically detecting the defect on a semiconductor wafer and presuming the defect occurrence factor using the circuit design data, a plurality of shapes are formed from the circuit design data by deforming the design data with respect to shape deformation items stipulated for respective defect occurrence factor for comparison with the inspection object circuit pattern. The defect is detected by comparison of the group of shapes formed and the actual pattern. Further, the occurrence factors of these defects are presumed, and the defects are classified according to respective factor.
    Type: Grant
    Filed: January 8, 2009
    Date of Patent: October 25, 2011
    Assignee: Hitachi High-Technologies Corporaiton
    Inventors: Tomofumi Nishiura, Atsushi Miyamoto, Chie Shishido, Takumichi Sutani
  • Publication number: 20110127429
    Abstract: In the dimension measurement of a circuit pattern using a scanning electron microscope (SEM), in order to make it possible to automatically image desired evaluation points (EPs) on a sample, and automatically measure the circuit pattern formed at the evaluation points, according to the present invention, in the dimension measurement of a circuit pattern using a scanning electron microscope (SEM), it is arranged that coordinate data of the EP and design data of the circuit pattern including the EP are used as an input, creation of a dimension measurement cursor for measuring the pattern existing in the EP and selection or setting of the dimension measurement method are automatically performed based on the EP coordinate data and the design data to automatically create a recipe, and automatic imaging/measurement is performed using the recipe.
    Type: Application
    Filed: February 10, 2011
    Publication date: June 2, 2011
    Inventors: Atsushi Miyamoto, Tomofumi Nishiura
  • Patent number: 7888638
    Abstract: In the dimension measurement of a circuit pattern using a scanning electron microscope (SEM), in order to make it possible to automatically image desired evaluation points (EPs) on a sample, and automatically measure the circuit pattern formed at the evaluation points, according to the present invention, in the dimension measurement of a circuit pattern using a scanning electron microscope (SEM), it is arranged that coordinate data of the EP and design data of the circuit pattern including the EP are used as an input, creation of a dimension measurement cursor for measuring the pattern existing in the EP and selection or setting of the dimension measurement method are automatically performed based on the EP coordinate data and the design data to automatically create a recipe, and automatic imaging/measurement is performed using the recipe.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: February 15, 2011
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Atsushi Miyamoto, Tomofumi Nishiura
  • Publication number: 20090242760
    Abstract: In the dimension measurement of a circuit pattern using a scanning electron microscope (SEM), in order to make it possible to automatically image desired evaluation points (EPs) on a sample, and automatically measure the circuit pattern formed at the evaluation points, according to the present invention, in the dimension measurement of a circuit pattern using a scanning electron microscope (SEM), it is arranged that coordinate data of the EP and design data of the circuit pattern including the EP are used as an input, creation of a dimension measurement cursor for measuring the pattern existing in the EP and selection or setting of the dimension measurement method are automatically performed based on the EP coordinate data and the design data to automatically create a recipe, and automatic imaging/measurement is performed using the recipe.
    Type: Application
    Filed: January 16, 2009
    Publication date: October 1, 2009
    Inventors: Atsushi Miyamoto, Tomofumi Nishiura
  • Publication number: 20090208090
    Abstract: In the inspection apparatus for a defect of a semiconductor and the method using it for automatically detecting the defect on a semiconductor wafer and presuming the defect occurrence factor using the circuit design data, a plurality of shapes are formed from the circuit design data by deforming the design data with respect to shape deformation items stipulated for respective defect occurrence factor for comparison with the inspection object circuit pattern. The defect is detected by comparison of the group of shapes formed and the actual pattern. Further, the occurrence factors of these defects are presumed, and the defects are classified according to respective factor.
    Type: Application
    Filed: January 8, 2009
    Publication date: August 20, 2009
    Inventors: Tomofumi NISHIURA, Atsushi Miyamoto, Chie Shishido, Takumichi Sutani
  • Patent number: 7545279
    Abstract: A condition analysis apparatus capable of grasping the condition of an object easily and accurately is provided. The condition analysis apparatus 1 includes a three-dimensional sensor 10 for measuring sampling-point-moves in the height direction of an object 2 existing in a target area at a plurality of sampling points, and area definition means 22 for defining an area where a plurality of the sampling-point-moves are in the generally same phase. The thus constructed condition analysis apparatus 1 can grasp the condition of the object 2 easily and accurately. Preferably, the condition analysis apparatus 1 includes information output means 40 for outputting information of an area including the area defined by the area definition means 22.
    Type: Grant
    Filed: June 3, 2004
    Date of Patent: June 9, 2009
    Assignees: Sumitomo Osaka Cement Co., Ltd., Keio University
    Inventors: Isao Sato, Tomofumi Nishiura, Masato Nakajima, Kazuhiro Mimura, Yasuhiro Takemura, Kei Katou, Toshiharu Takesue
  • Publication number: 20080159609
    Abstract: This invention relates to a SEM system constructed to create imaging recipes or/and measuring recipes automatically and at high speed, and improve inspection efficiency and an automation ratio, and to a method using the SEM system; a method for creation of imaging recipes and measuring recipes in the SEM system is adapted to include, in a recipe arithmetic unit, the steps of evaluating a tolerance for an imaging position error level at an evaluation point, evaluating a value predicted of the imaging position error level at the evaluation point when any region on circuit pattern design data is defined as an addressing point, and determining an imaging recipe and a measuring recipe on the basis of a relationship between the tolerance for the imaging position error level at the evaluation point and the predicted value of the imaging position error level at the evaluation point.
    Type: Application
    Filed: December 12, 2007
    Publication date: July 3, 2008
    Inventors: Atsushi Miyamoto, Tomofumi Nishiura, Ryoichi Matsuoka, Hidetoshi Morokuma
  • Publication number: 20060279428
    Abstract: A condition analysis apparatus capable of grasping the condition of an object easily and accurately is provided. The condition analysis apparatus 1 includes a three-dimensional sensor 10 for measuring sampling-point-moves in the height direction of an object 2 existing in a target area at a plurality of sampling points, and area definition means 22 for defining an area where a plurality of the sampling-point-moves are in the generally same phase. The thus constructed condition analysis apparatus 1 can grasp the condition of the object 2 easily and accurately. Preferably, the condition analysis apparatus 1 includes information output means 40 for outputting information of an area including the area defined by the area definition means 22.
    Type: Application
    Filed: June 3, 2004
    Publication date: December 14, 2006
    Inventors: Isao Sato, Tomofumi Nishiura, Masato Nakajima, Kazuhiro Mimura, Yasuhiro Takemura, Kei Katou, Toshiharu Takesue