Abstract: A circuit includes a first output signal supply line, a second output signal supply line, an output line, a first p-type thin-film transistor disposed between the first output signal supply line and the output line an n-type thin-film transistor disposed between the second output signal supply line and the output line, and a second p-type thin-film transistor disposed between the second output signal supply line and the output line. The n-type thin-film transistor and the second p-type thin-film transistor are configured to be OFF to output a signal on the first output signal supply line to the output line when the first p-type thin-film transistor is ON. The first p-type thin-film transistor is configured to be OFF to supply a signal on the second output signal supply line to the output line when the n-type thin-film transistor and the second p-type thin-film transistor are ON.

Abstract: In a display device and a method for inspecting the display device, precharge circuits are arranged on both sides of gate lines. Precharge circuits are arranged on both sides of data lines. A common electrode inspection circuit is connected to a common electrode. An inspection data processing circuit is arranged at one end of the gate lines. An inspection data processing circuit is arranged at one end of the data lines. In a first period, a first voltage is supplied to some of the gate lines, the data lines, and the common electrode. In a second period, a second voltage is supplied to some of the gate lines, the data lines, and the common electrode. The inspection data processing circuits acquire the voltage levels of the gate lines and the data lines based on the supply of the second voltage.

Abstract: A display device includes pixel circuit rows, selection lines connected to the pixel circuit rows, and a shift register including linked shift register units. The shift register units output sequential selection pulses to the selection lines. Each of the shift register units outputs the selection pulse to a corresponding selection line among the selection lines. Each of the shift register units includes thin film transistors of a first conductivity type that are connected in parallel, and that, during an ON state, connect the corresponding selection lines to a fixed potential wiring line for applying a non-selection level for the selection pulse. During each frame period, the thin film transistors are turned ON/OFF by clock signals in different phases. The duty cycle of the ON period of each of the thin film transistors during each said frame period is 12.5% or less.

Abstract: A circuit includes a first output signal supply line, a second output signal supply line, an output line, a first p-type thin-film transistor disposed between the first output signal supply line and the output line an n-type thin-film transistor disposed between the second output signal supply line and the output line, and a second p-type thin-film transistor disposed between the second output signal supply line and the output line. The n-type thin-film transistor and the second p-type thin-film transistor are configured to be OFF to output a signal on the first output signal supply line to the output line when the first p-type thin-film transistor is ON. The first p-type thin-film transistor is configured to be OFF to supply a signal on the second output signal supply line to the output line when the n-type thin-film transistor and the second p-type thin-film transistor are ON.

Abstract: To provide an electronic circuit and the like capable of extending the life greatly even when the transistors constituting the electronic circuit have property fluctuation. The electronic circuit includes switching-target circuits and a switching circuit for switching the switching-target circuits to an operating state from a stop state. The switching-target circuits include the switching-target circuit in an operating state and the switching-target circuit in an initial-to-stop state. Property fluctuation is generated in the transistors forming the switching-target circuits and the switching target due to an electric stress applied to the transistors. The switching circuit switches the switching-target circuit in the initial-to-stop state to an operating state by the transistor of the switching circuit.

Abstract: An image display device includes a first substrate on which first aperture areas are formed, a second substrate on which second aperture areas are formed, an optical element, a plurality of unit pixels each including a first-viewpoint pixel for displaying an image for a first viewpoint and a second-viewpoint pixel for displaying an image for a second viewpoint, an optical path distribution unit, and a plurality of light-shielding areas including edge sections facing each other in a first direction, one of the edge sections being defined by one of the first aperture areas, the other of the edge sections being defined by one of the second aperture areas, and the one of the edge sections and the other of the edge sections being parallel, under a condition that the first substrate and the second substrate are joined together with positions thereof in the first direction being aligned.

Abstract: A display device including a scanning circuit formed using single conductivity type thin-film transistors suppresses threshold changes in the thin-film transistors forming the scanning circuit by controlling a circuit for maintaining an internal node of the unit circuits forming the scanning circuit at a constant potential is controlled by a clock signal or a pulse signal having a smaller amplitude than the amplitude of an output signal.

Abstract: To provide an electronic circuit and the like capable of extending the life greatly even when the transistors constituting the electronic circuit have property fluctuation. The electronic circuit includes switching-target circuits and a switching circuit for switching the switching-target circuits to an operating state from a stop state. The switching-target circuits include the switching-target circuit in an operating state and the switching-target circuit in an initial-to-stop state. Property fluctuation is generated in the transistors forming the switching-target circuits and the switching target due to an electric stress applied to the transistors. The switching circuit switches the switching-target circuit in the initial-to-stop state to an operating state by the transistor of the switching circuit.

Abstract: A display device including a scanning circuit formed using single conductivity type thin-film transistors suppresses threshold changes in the thin-film transistors forming the scanning circuit by controlling a circuit for maintaining an internal node of the unit circuits forming the scanning circuit at a constant potential is controlled by a clock signal or a pulse signal having a smaller amplitude than the amplitude of an output signal.

Abstract: A device, in which circuit size is small and operation is stable, comprises a plurality of serially connected unit registers (shift registers) in which transfer is controlled by any of three or more clock signals each having a different phase, and a setting signal which determines shift direction; and a selection circuit (switch array) which can select at least one clock signal from the three or more clock signals in accordance with the setting signal; wherein the unit registers are put in a reset state by one clock signal selected by the selection circuit, corresponding to each of the unit registers

Abstract: A device excellent in electrical characteristics is provided by suppressing an operation failure owing to a hysteresis effect that occurs in a circuit using MOS transistors having floating bodies. Moreover, sensitivity of a sense amplifier circuit and a latch circuit including these MOS transistors as components is improved. A signal required in a circuit other than a first circuit is outputted by using electrical characteristics of MOS transistors in a first period (effective period), and in a second period (idle period) excluding the first period, between the gate and source of MOS transistors, a step waveform voltage not less than threshold voltages of these MOS transistors is given.

Abstract: Disclosed is a display apparatus including two scanning circuits of the same configuration and layout, arranged on either sides of the display part. As long as one of the scanning circuits is in operation, the other scanning circuit is in a state in which no output signal is output.

Abstract: An image display device includes a first substrate; a second substrate; an optical element put between the first substrate and the second substrate; a plurality of unit pixels arranged in matrix, each including a first-viewpoint pixel and a second-viewpoint pixel formed of the optical element; and a plurality of light-shielding areas each arranged between the first-viewpoint pixel and the second-viewpoint pixel; and an optical path distribution unit arranged on the second substrate. The first substrate and the second substrate are formed such that each of the light-shielding areas includes edge sections facing each other in the first direction, wherein one of the edge sections is defined by one of the first aperture areas and the other of the edge sections is defined by one of the second aperture areas, under a condition that the first substrate and the second substrate are joined together with no displacement therebetween.

Abstract: A shift register comprises: a first output circuit controlled by a first clock signal to output a signal to a first output signal line; a second output circuit controlled by a second clock signal with a phase different from a phase of the first clock signal to output a signal to a second output signal line; a first control signal line connected to the first and second output circuits; and a second control signal line connected to the first and second output circuits.

Abstract: In a semiconductor circuit a floating node is set to any voltage by utilizing a control signal applied to a refresh terminal and has a period shorter than that of a clock signal. The circuit includes first and second transistors connected between a first clock terminal and first power supply terminal, third and fourth transistors connected between the refresh terminal and the first power supply terminal, and fifth and sixth transistors connected between a second power supply terminal and the first power supply. Gates of the fourth and fifth transistors are connected to an input terminal, a gate of the third transistor is connected to a second clock terminal, a gate of the first transistor is connected to a node between the fifth and sixth transistors, gates of the second and sixth transistors are connected, and a node between the first and second transistors is connected to an output terminal.

Abstract: In a semiconductor circuit a floating node is set to any voltage by utilizing a control signal applied to a refresh terminal and has a period shorter than that of a clock signal. The circuit includes first and second transistors connected between a first clock terminal and first power supply terminal, third and fourth transistors connected between the refresh terminal and the first power supply terminal, and fifth and sixth transistors connected between a second power supply terminal and the first power supply. Gates of the fourth and fifth transistors are connected to an input terminal, a gate of the third transistor is connected to a second clock terminal, a gate of the first transistor is connected to a node between the fifth and sixth transistors, gates of the second and sixth transistors are connected, and a node between the first and second transistors is connected to an output terminal.

Abstract: Disclosed is a display apparatus including two scanning circuits of the same configuration and layout, arranged on either sides of the display part. As long as one of the scanning circuits is in operation, the other scanning circuit is in a state in which no output signal is output.

Abstract: A light-detecting element, an analog-to-digital converter circuit, and a parallel-serial converter circuit are mounted on a substrate, using a thin film transistor, of an active matrix-type display device, and when a circuit is selected by an external chip-select signal, the luminance is adjusted by transmitting a signal of the light-detecting element, converted into digital data, to a luminance control circuit in sync with a clock signal.

Abstract: Disclosed is a shift register which includes first transistor connected between a first clock signal terminal and an output terminal, a second transistor with a gate connected to an input terminal and a source connected to a gate of the first transistor, a third transistor with a gate connected to a second clock signal terminal, an inverter with an input connected to the input terminal, a fourth transistor cascode connected to the third transistor with a gate connected to an output of the inverter, a fifth transistor connected between the gate of the first transistor and a power supply terminal, a sixth transistor connected between the fourth transistor and the power supply terminal with a gate connected to the input terminal, and a seventh transistor connected between the output terminal and the power supply terminal, the fifth and seventh transistors having gates connected in common to a connection node of the fourth and the sixth transistors.

Abstract: A shift register comprises: a first output circuit controlled by a first clock signal to output a signal to a first output signal line; a second output circuit controlled by a second clock signal with a phase different from a phase of the first clock signal to output a signal to a second output signal line; a first control signal line connected to the first and second output circuits; and a second control signal line connected to the first and second output circuits.