Abstract: An attachment structure of a flat wire harness includes: an attachment target member; a flat wire harness; and an attachment part. In the flat wire harness, a through hole is formed in a part of a base material where a plurality of electrical wires are not disposed. The attachment part includes a rod-like part passing through the through hole, a fixing part provided to a first end portion of the rod-like part to fix the rod-like part to the attachment target member, and a retaining part provided to a second end portion of the rod-like part to prevent the rod-like part from coming out of the through hole. An outer size of the retaining part is larger than a dimension of the through hole, and the dimension of the through hole is equal to or larger than a thickness of the rod-like part.

Abstract: A tire can include a pair of beads, a carcass, an inner liner, and an insulation located between the carcass and the inner liner. The carcass can include one carcass ply. The carcass ply can include a plurality of carcass cords and a topping rubber. Each carcass cord can have a total fineness of not less than 6000 dtex and not greater than 9000 dtex. The insulation can be located between first and second beads. A ratio (ta/td) of a thickness to of the topping rubber located between the insulation and the carcass cords to a thickness td of the insulation can be not less than 0.2 and not greater than 0.6.

Abstract: The present disclosure relates to an attachment structure for attaching a wiring member to an instrument panel reinforcement, which is an attachment object, provided near an instrument panel. The wiring member includes a linear transmission member that transmits electricity or light, and a covering member that covers the linear transmission member. The wiring member attachment structure includes a rail member provided on the instrument panel reinforcement, and an insertion member that is provided on the covering member and inserted into the rail member. The wiring member is attached to the instrument panel reinforcement in a state in which the insertion member is inserted into the rail member.

Abstract: According to one embodiment, a substrate processing apparatus has a treatment tank, a holder to hold the substrate while in the treatment tank, a chemical discharge pipe below a position of the holder for supplying a chemical solution to the treatment tank, a bubble discharge pipe below the position of the holder for discharging a gas. The first bubble discharge pipe is closer along a horizontal direction to a centerline of the treatment tank than is the chemical discharge pipe. A rectifying plate is disposed below the position of the holder and extends from a position above the chemical discharge pipe to a position above the first bubble discharge pipe at an incline with respect to the first direction horizontal.

Abstract: A method may produce (2-methoxyethyl) vinyl ether with a high purity from 2-methoxyethanol and acetylene. Such a method may include the A1, A2, and A3: (A1) synthesizing a vinyl ether including causing 2-methoxyethanol to react with acetylene to obtain a mixture containing unreacted 2-methoxyethanol and (2-methoxyethyl) vinyl ether; (A2) acetalizing including causing a reaction of the unreacted 2-methoxyethanol and the (2-methoxyethyl) vinyl ether in the mixture in the presence of an acid catalyst to be converted into acetaldehyde bis(2-methoxyethyl)acetal; and (A3) removing the acetaldehyde bis(2-methoxyethyl)acetal by distillation from an acetal-containing mixture obtained in step A2.

Abstract: A capacitor aging apparatus that includes continuity check pads configured to be electrically connected to positive electrodes of a plurality of capacitors in one-to-one correspondence to check electrical continuity with the plurality of capacitors a plurality of first terminals electrically connected to the plurality of continuity check pads; a plurality of second terminals electrically connected to the plurality of first terminals in one-to-one correspondence; and a plurality of connectors configured to be electrically connected to and disconnected from the plurality of first terminals and the plurality of second terminals, and configured to electrically connect the positive electrodes of the plurality of capacitors, the plurality of connectors each allowing a second terminal corresponding to one capacitor of corresponding two capacitors among the plurality of capacitors to be electrically connected to a first terminal corresponding to another capacitor.

Abstract: A memory circuit includes a memory array, a word line, and a bit line. The memory array includes a plurality of memories arranged in a matrix shape in a first direction and a second direction perpendicular to the first direction. The word line extends in the first direction and reads signals from the plurality of memories arranged in the first direction. The bit line includes a digit line connected to the plurality of memories arranged in the second direction and an output line connected to the digit line and extending in the first direction and transmits a signal from a memory corresponding to the word line to the output line as the word line reads a signal.

Abstract: An integrated capacitor that includes a plurality of capacitor elements, each of which has one of first internal electrodes and one of second internal electrodes; an exterior body accommodating the plurality of capacitor elements; a plurality of first external electrode layers on an outer surface of the exterior body and electrically connected to the first internal electrodes; and a plurality of second external electrode layers on the outer surface of the exterior body and electrically connected to the second internal electrodes. One of the first external electrode layers has a projecting portion projecting outward or a recessed portion recessed inward from part of an outer edge of the first external electrode layer in a plan view in a thickness direction of the first external electrode layer.

Abstract: A capacitor aging apparatus that includes continuity check pads configured to be electrically connected to positive electrodes of a plurality of capacitors in one-to-one correspondence to check electrical continuity with the plurality of capacitors a plurality of first terminals electrically connected to the plurality of continuity check pads; a plurality of second terminals electrically connected to the plurality of first terminals in one-to-one correspondence; and a plurality of connectors configured to be electrically connected to and disconnected from the plurality of first terminals and the plurality of second terminals, and configured to electrically connect the positive electrodes of the plurality of capacitors, the plurality of connectors each allowing a second terminal corresponding to one capacitor of corresponding two capacitors among the plurality of capacitors to be electrically connected to a first terminal corresponding to another capacitor.

Abstract: Provided is an indoor unit of an air-conditioner including: an indoor unit body configured to be provided in a ceiling; a suction port attached to a lower surface of the indoor unit body; a panel including a blow port for blowing conditioned air into a room; and a louver provided at the blow port of the panel to change an air sending direction. The panel includes an outer frame provided outside the blow port and provided with a substantially horizontal flat portion, and a protruding portion provided on the flat portion of the outer frame and protruding vertically downward. A lower end of the protruding portion is positioned vertically above a lower end of the louver. A lower end of an inner flow path wall surface forming a flow path wall surface inside the blow port is positioned vertically below the lower end of the louver.

Abstract: [Object] To achieve both prevention of overcharging of the battery and convenience of the user. [Solution] An information processing device includes: a charged capacity detection unit configured to detect a charged capacity of a battery; a charging control unit configured to control a charging circuit; and a specification unit configured to specify when discharge of the battery starts. The charging control unit performs charging suppression control on the charging circuit such that the battery is charged to a preparatorily charged capacity that is lower than a fully charged capacity of the battery, on the basis of the charged capacity detected by the charged capacity detection unit, the charging of the battery stops when the charged capacity of the battery reaches the preparatorily charged capacity, and the charging of the battery restarts from the preparatorily charged capacity before discharge of the battery starts.

Abstract: To provide a method capable of easily and efficiently removing a 2-alkoxyethanol from a mixture containing the 2-alkoxyethanol and a (2-alkoxyethyl) vinyl ether while suppressing a decrease in the yield of (2-alkoxyethyl) vinyl ether. A method for removing a 2-alkoxyethanol, including the step of adding one or more azeotropic solvents selected from the group consisting of alkanes having 7 to 8 carbon atoms and cycloalkanes having 7 to 8 carbon atoms to a mixture containing the 2-alkoxyethanol represented by the following formula (1) R—O—CH2CH2OH??(1) where R represents an alkyl group having 1 to 4 carbon atoms, and a (2-alkoxyethyl) vinyl ether represented by the following formula (2) R—O—CH2CH2O—CH?CH2??(2) where R has the same meaning as R in the formula (1), and subjecting the resulting mixture to azeotropic distillation.

Abstract: A method can produce a divinyl ether compound having an alkylene skeleton from an alkanediol and acetylene at a rapid production rate and a high reaction yield. In the production method, a compound of formula (1) wherein R1 is an alkylene group having 4 to 20 carbon atoms, may be reacted with acetylene in the presence of an alkali metal catalyst to produce a compound of formula (2) and the reaction may be performed in the absence of a solvent.

Abstract: A memory circuit includes a memory array, a word line, and a bit line. The memory array includes a plurality of memories arranged in a matrix shape in a first direction and a second direction perpendicular to the first direction. The word line extends in the first direction and reads signals from the plurality of memories arranged in the first direction. The bit line includes a digit line connected to the plurality of memories arranged in the second direction and an output line connected to the digit line and extending in the first direction and transmits a signal from a memory corresponding to the word line to the output line as the word line reads a signal.

Abstract: A memory circuit includes a memory array, a word line, and a bit line. The memory array includes a plurality of memories arranged in a matrix shape in a first direction and a second direction perpendicular to the first direction. The word line extends in the first direction and reads signals from the plurality of memories arranged in the first direction. The bit line includes a digit line connected to the plurality of memories arranged in the second direction and an output line connected to the digit line and extending in the first direction and transmits a signal from a memory corresponding to the word line to the output line as the word line reads a signal.

Abstract: A server apparatus includes a plurality of nodes; a plurality of power supply devices configured to supply power; and a shared memory from and to which reading and writing from each of the plurality of nodes are performed, wherein each of the plurality of nodes includes a processor configured to: store power consumption information of an own node in the memory; read the power consumption information from the memory when an abnormality is detected in some power supply devices among the plurality of power supply devices; and control supply power from a normal power supply device, in which an abnormality is not detected among the plurality of power supply devices, to the own node, based on the read power consumption information.

Abstract: A memory circuit includes a memory array, a word line, and a bit line. The memory array includes a plurality of memories arranged in a matrix shape in a first direction and a second direction perpendicular to the first direction. The word line extends in the first direction and reads signals from the plurality of memories arranged in the first direction. The bit line includes a digit line connected to the plurality of memories arranged in the second direction and an output line connected to the digit line and extending in the first direction and transmits a signal from a memory corresponding to the word line to the output line as the word line reads a signal.

Abstract: Provided is an indoor unit of an air-conditioner including: an indoor unit body configured to be provided in a ceiling; a suction port attached to a lower surface of the indoor unit body; a panel including a blow port for blowing conditioned air into a room; and a louver provided at the blow port of the panel to change an air sending direction. The panel includes an outer frame provided outside the blow port and provided with a substantially horizontal flat portion, and a protruding portion provided on the flat portion of the outer frame and protruding vertically downward. A lower end of the protruding portion is positioned vertically above a lower end of the louver. A lower end of an inner flow path wall surface forming a flow path wall surface inside the blow port is positioned vertically below the lower end of the louver.

Abstract: A server apparatus includes a plurality of nodes; a plurality of power supply devices configured to supply power; and a shared memory from and to which reading and writing from each of the plurality of nodes are performed, wherein each of the plurality of nodes includes a processor configured to: store power consumption information of an own node in the memory; read the power consumption information from the memory when an abnormality is detected in some power supply devices among the plurality of power supply devices; and control supply power from a normal power supply device, in which an abnormality is not detected among the plurality of power supply devices, to the own node, based on the read power consumption information.

Abstract: Provided is a method for producing an alkenyl phosphorus compound which can produce an alkenyl phosphorus compound efficiently even with a smaller amount of a catalyst used than that used conventionally, and further which can maintain catalytic activity to produce an alkenyl phosphorus compound in high yield even at a larger reaction scale, and which can also be applied to quantity synthesis at an industrial scale using a conventional batch reactor or continuous reactor. A method for producing an alkenyl phosphorus compound, comprising: a step of reacting a compound represented by the following formula (1): [In formula (1), R1 represents OR3 or R3, R2 represents OR4 or R4, and R3 and R4 represent, for example, each independently a substituted or unsubstituted alkyl group.] with a compound represented by the following formula (2): [In formula (2), R5 represents, for example, a hydrogen atom, or a substituted or unsubstituted alkyl group.