Patents by Inventor Tomohiko Sato
Tomohiko Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20230263616Abstract: According to an aspect, a method of cholecystitis treatment includes: forming a communication hole that communicates a gallbladder and a duodenum; and arranging a bypass tube extending from a cystic duct to the duodenum through an inside of the gallbladder and the communication hole.Type: ApplicationFiled: February 16, 2023Publication date: August 24, 2023Inventors: Tomofumi Katayama, Tomohiko Mamiya, Mitsuki Sato, Keita Shoji
-
Patent number: 11678087Abstract: A memory circuit includes a memory array, a word line, and a bit line. The memory array includes a plurality of memories arranged in a matrix shape in a first direction and a second direction perpendicular to the first direction. The word line extends in the first direction and reads signals from the plurality of memories arranged in the first direction. The bit line includes a digit line connected to the plurality of memories arranged in the second direction and an output line connected to the digit line and extending in the first direction and transmits a signal from a memory corresponding to the word line to the output line as the word line reads a signal.Type: GrantFiled: June 21, 2021Date of Patent: June 13, 2023Assignee: Samsung Electronics Co., Ltd.Inventor: Tomohiko Sato
-
Publication number: 20230119863Abstract: An integrated capacitor that includes a plurality of capacitor elements, each of which has one of first internal electrodes and one of second internal electrodes; an exterior body accommodating the plurality of capacitor elements; a plurality of first external electrode layers on an outer surface of the exterior body and electrically connected to the first internal electrodes; and a plurality of second external electrode layers on the outer surface of the exterior body and electrically connected to the second internal electrodes. One of the first external electrode layers has a projecting portion projecting outward or a recessed portion recessed inward from part of an outer edge of the first external electrode layer in a plan view in a thickness direction of the first external electrode layer.Type: ApplicationFiled: December 22, 2022Publication date: April 20, 2023Inventors: Tomohiko SATO, Mariko TAKAHASHI
-
Publication number: 20220392712Abstract: A capacitor aging apparatus that includes continuity check pads configured to be electrically connected to positive electrodes of a plurality of capacitors in one-to-one correspondence to check electrical continuity with the plurality of capacitors a plurality of first terminals electrically connected to the plurality of continuity check pads; a plurality of second terminals electrically connected to the plurality of first terminals in one-to-one correspondence; and a plurality of connectors configured to be electrically connected to and disconnected from the plurality of first terminals and the plurality of second terminals, and configured to electrically connect the positive electrodes of the plurality of capacitors, the plurality of connectors each allowing a second terminal corresponding to one capacitor of corresponding two capacitors among the plurality of capacitors to be electrically connected to a first terminal corresponding to another capacitor.Type: ApplicationFiled: August 18, 2022Publication date: December 8, 2022Inventor: Tomohiko SATO
-
Patent number: 11408618Abstract: Provided is an indoor unit of an air-conditioner including: an indoor unit body configured to be provided in a ceiling; a suction port attached to a lower surface of the indoor unit body; a panel including a blow port for blowing conditioned air into a room; and a louver provided at the blow port of the panel to change an air sending direction. The panel includes an outer frame provided outside the blow port and provided with a substantially horizontal flat portion, and a protruding portion provided on the flat portion of the outer frame and protruding vertically downward. A lower end of the protruding portion is positioned vertically above a lower end of the louver. A lower end of an inner flow path wall surface forming a flow path wall surface inside the blow port is positioned vertically below the lower end of the louver.Type: GrantFiled: May 29, 2019Date of Patent: August 9, 2022Assignee: HITACHI-JOHNSON CONTROLS AIR CONDITIONING, INC.Inventors: Taku Iwase, Tomohiko Sato, Yoko Sato, Kunihito Kawamura, Koutarou Nomura, Naoyuki Fushimi, Shinji Nakahata
-
Patent number: 11336107Abstract: [Object] To achieve both prevention of overcharging of the battery and convenience of the user. [Solution] An information processing device includes: a charged capacity detection unit configured to detect a charged capacity of a battery; a charging control unit configured to control a charging circuit; and a specification unit configured to specify when discharge of the battery starts. The charging control unit performs charging suppression control on the charging circuit such that the battery is charged to a preparatorily charged capacity that is lower than a fully charged capacity of the battery, on the basis of the charged capacity detected by the charged capacity detection unit, the charging of the battery stops when the charged capacity of the battery reaches the preparatorily charged capacity, and the charging of the battery restarts from the preparatorily charged capacity before discharge of the battery starts.Type: GrantFiled: April 3, 2017Date of Patent: May 17, 2022Assignee: SONY CORPORATIONInventors: Tomoo Mizukami, Atsuo Suzuki, Yuumi Ozawa, Ryo Nakagawa, Shota Kawarazaki, Masahiko Naito, Kazuyuki Saga, Naoyuki Itakura, Tomohiko Sato, Masashi Kokubo, Daisuke Sakai
-
Patent number: 11247961Abstract: To provide a method capable of easily and efficiently removing a 2-alkoxyethanol from a mixture containing the 2-alkoxyethanol and a (2-alkoxyethyl) vinyl ether while suppressing a decrease in the yield of (2-alkoxyethyl) vinyl ether. A method for removing a 2-alkoxyethanol, including the step of adding one or more azeotropic solvents selected from the group consisting of alkanes having 7 to 8 carbon atoms and cycloalkanes having 7 to 8 carbon atoms to a mixture containing the 2-alkoxyethanol represented by the following formula (1) R—O—CH2CH2OH??(1) where R represents an alkyl group having 1 to 4 carbon atoms, and a (2-alkoxyethyl) vinyl ether represented by the following formula (2) R—O—CH2CH2O—CH?CH2??(2) where R has the same meaning as R in the formula (1), and subjecting the resulting mixture to azeotropic distillation.Type: GrantFiled: September 13, 2017Date of Patent: February 15, 2022Assignee: MARUZEN PETROCHEMICAL CO., LTD.Inventors: Takashi Naniki, Ryuichi Tenjimbayashi, Masuo Yamazaki, Tomohiko Sato
-
Publication number: 20220033335Abstract: A method can produce a divinyl ether compound having an alkylene skeleton from an alkanediol and acetylene at a rapid production rate and a high reaction yield. In the production method, a compound of formula (1) wherein R1 is an alkylene group having 4 to 20 carbon atoms, may be reacted with acetylene in the presence of an alkali metal catalyst to produce a compound of formula (2) and the reaction may be performed in the absence of a solvent.Type: ApplicationFiled: November 26, 2019Publication date: February 3, 2022Applicant: MARUZEN PETROCHEMICAL CO., LTD.Inventors: Takashi NANIKI, Jun ITO, Yuji HASHIMA, Wataru TSUCHIDA, Takashi TAKAHASHI, Ayato TAKAYAMA, Tomohiko SATO
-
Publication number: 20210314515Abstract: A memory circuit includes a memory array, a word line, and a bit line. The memory array includes a plurality of memories arranged in a matrix shape in a first direction and a second direction perpendicular to the first direction. The word line extends in the first direction and reads signals from the plurality of memories arranged in the first direction. The bit line includes a digit line connected to the plurality of memories arranged in the second direction and an output line connected to the digit line and extending in the first direction and transmits a signal from a memory corresponding to the word line to the output line as the word line reads a signal.Type: ApplicationFiled: June 21, 2021Publication date: October 7, 2021Inventor: TOMOHIKO SATO
-
Patent number: 11102437Abstract: A memory circuit includes a memory array, a word line, and a bit line. The memory array includes a plurality of memories arranged in a matrix shape in a first direction and a second direction perpendicular to the first direction. The word line extends in the first direction and reads signals from the plurality of memories arranged in the first direction. The bit line includes a digit line connected to the plurality of memories arranged in the second direction and an output line connected to the digit line and extending in the first direction and transmits a signal from a memory corresponding to the word line to the output line as the word line reads a signal.Type: GrantFiled: October 28, 2019Date of Patent: August 24, 2021Assignee: Samsung Electronics Co., Ltd.Inventor: Tomohiko Sato
-
Patent number: 11073883Abstract: A server apparatus includes a plurality of nodes; a plurality of power supply devices configured to supply power; and a shared memory from and to which reading and writing from each of the plurality of nodes are performed, wherein each of the plurality of nodes includes a processor configured to: store power consumption information of an own node in the memory; read the power consumption information from the memory when an abnormality is detected in some power supply devices among the plurality of power supply devices; and control supply power from a normal power supply device, in which an abnormality is not detected among the plurality of power supply devices, to the own node, based on the read power consumption information.Type: GrantFiled: July 2, 2019Date of Patent: July 27, 2021Assignee: FUJITSU LIMITEDInventors: Tomohiko Sato, Tomoki Yamada, Shimuya Kobayashi
-
Publication number: 20200162689Abstract: A memory circuit includes a memory array, a word line, and a bit line. The memory array includes a plurality of memories arranged in a matrix shape in a first direction and a second direction perpendicular to the first direction. The word line extends in the first direction and reads signals from the plurality of memories arranged in the first direction. The bit line includes a digit line connected to the plurality of memories arranged in the second direction and an output line connected to the digit line and extending in the first direction and transmits a signal from a memory corresponding to the word line to the output line as the word line reads a signal.Type: ApplicationFiled: October 28, 2019Publication date: May 21, 2020Inventor: TOMOHIKO SATO
-
Publication number: 20200063983Abstract: Provided is an indoor unit of an air-conditioner including: an indoor unit body configured to be provided in a ceiling; a suction port attached to a lower surface of the indoor unit body; a panel including a blow port for blowing conditioned air into a room; and a louver provided at the blow port of the panel to change an air sending direction. The panel includes an outer frame provided outside the blow port and provided with a substantially horizontal flat portion, and a protruding portion provided on the flat portion of the outer frame and protruding vertically downward. A lower end of the protruding portion is positioned vertically above a lower end of the louver. A lower end of an inner flow path wall surface forming a flow path wall surface inside the blow port is positioned vertically below the lower end of the louver.Type: ApplicationFiled: May 29, 2019Publication date: February 27, 2020Inventors: Taku IWASE, Tomohiko SATO, Yoko SATO, Kunihito KAWAMURA, Koutarou NOMURA, Naoyuki FUSHIMI, Shinji NAKAHATA
-
Publication number: 20200012328Abstract: A server apparatus includes a plurality of nodes; a plurality of power supply devices configured to supply power; and a shared memory from and to which reading and writing from each of the plurality of nodes are performed, wherein each of the plurality of nodes includes a processor configured to: store power consumption information of an own node in the memory; read the power consumption information from the memory when an abnormality is detected in some power supply devices among the plurality of power supply devices; and control supply power from a normal power supply device, in which an abnormality is not detected among the plurality of power supply devices, to the own node, based on the read power consumption information.Type: ApplicationFiled: July 2, 2019Publication date: January 9, 2020Applicant: FUJITSU LIMITEDInventors: Tomohiko Sato, Tomoki Yamada, Shimuya Kobayashi
-
Patent number: 10479809Abstract: Provided is a method for producing an alkenyl phosphorus compound which can produce an alkenyl phosphorus compound efficiently even with a smaller amount of a catalyst used than that used conventionally, and further which can maintain catalytic activity to produce an alkenyl phosphorus compound in high yield even at a larger reaction scale, and which can also be applied to quantity synthesis at an industrial scale using a conventional batch reactor or continuous reactor. A method for producing an alkenyl phosphorus compound, comprising: a step of reacting a compound represented by the following formula (1): [In formula (1), R1 represents OR3 or R3, R2 represents OR4 or R4, and R3 and R4 represent, for example, each independently a substituted or unsubstituted alkyl group.] with a compound represented by the following formula (2): [In formula (2), R5 represents, for example, a hydrogen atom, or a substituted or unsubstituted alkyl group.Type: GrantFiled: September 8, 2016Date of Patent: November 19, 2019Assignee: MARUZEN PETROCHEMICAL CO., LTD.Inventors: Yu Kinami, Ryuichi Tenjimbayashi, Yusuke Yokoo, Ichiro Kimura, Tomohiko Sato, Hiroyoshi Fujino, Tomoko Watanabe, Yuta Saga
-
Publication number: 20190334354Abstract: [Object] To achieve both prevention of overcharging of the battery and convenience of the user. [Solution] An information processing device includes: a charged capacity detection unit configured to detect a charged capacity of a battery; a charging control unit configured to control a charging circuit; and a specification unit configured to specify when discharge of the battery starts. The charging control unit performs charging suppression control on the charging circuit such that the battery is charged to a preparatorily charged capacity that is lower than a fully charged capacity of the battery, on the basis of the charged capacity detected by the charged capacity detection unit, the charging of the battery stops when the charged capacity of the battery reaches the preparatorily charged capacity, and the charging of the battery restarts from the preparatorily charged capacity before discharge of the battery starts.Type: ApplicationFiled: April 3, 2017Publication date: October 31, 2019Applicant: SONY MOBILE COMMUNICATIONS INC.Inventors: Tomoo MIZUKAMI, Atsuo SUZUKI, Yuumi OZAWA, Ryo NAKAGAWA, Shota KAWARAZAKI, Masahiko NAITO, Kazuyuki SAGA, Naoyuki ITAKURA, Tomohiko SATO, Masashi KOKUBO, Daisuke SAKAI
-
Publication number: 20190263847Abstract: Provided is a method for producing an alkenyl phosphorus compound which can produce an alkenyl phosphorus compound efficiently even with a smaller amount of a catalyst used than that used conventionally, and further which can maintain catalytic activity to produce an alkenyl phosphorus compound in high yield even at a larger reaction scale, and which can also be applied to quantity synthesis at an industrial scale using a conventional batch reactor or continuous reactor. A method for producing an alkenyl phosphorus compound, comprising: a step of reacting a compound represented by the following formula (1): [In formula (1), R1 represents OR3 or R3, R2 represents OR4 or R4, and R3 and R4 represent, for example, each independently a substituted or unsubstituted alkyl group.] with a compound represented by the following formula (2): R5—C?CH??(2) [In formula (2), R5 represents, for example, a hydrogen atom, or a substituted or unsubstituted alkyl group.Type: ApplicationFiled: September 8, 2016Publication date: August 29, 2019Applicant: MARUZEN PETROCHEMICAL CO., LTD.Inventors: Yu KINAMI, Ryuichi TENJIMBAYASHI, Yusuke YOKOO, Ichiro KIMURA, Tomohiko SATO, Hiroyoshi FUJINO, Tomoko WATANABE, Yuta SAGA
-
Publication number: 20190210949Abstract: To provide a method capable of easily and efficiently removing a 2-alkoxyethanol from a mixture containing the 2-alkoxyethanol and a (2-alkoxyethyl) vinyl ether while suppressing a decrease in the yield of (2-alkoxyethyl) vinyl ether. A method for removing a 2-alkoxyethanol, including the step of adding one or more azeotropic solvents selected from the group consisting of alkanes having 7 to 8 carbon atoms and cycloalkanes having 7 to 8 carbon atoms to a mixture containing the 2-alkoxyethanol represented by the following formula (1) R—O—CH2CH2OH??(1) where R represents an alkyl group having 1 to 4 carbon atoms, and a (2-alkoxyethyl) vinyl ether represented by the following formula (2) R—O—CH2CH2O—CH?CH2??(2) where R has the same meaning as R in the formula (1), and subjecting the resulting mixture to azeotropic distillation.Type: ApplicationFiled: September 13, 2017Publication date: July 11, 2019Applicant: MARUZEN PETROCHEMICAL CO., LTD.Inventors: Takashi NANIKI, Ryuichi TENJIMBAYASHI, Masuo YAMAZAKI, Tomohiko SATO
-
Patent number: 9825160Abstract: A semiconductor device includes: a semiconductor substrate; a main electrode; a peripheral electrode; an insulating protective film; a surface metallic layer; and a solder layer, wherein the semiconductor substrate includes: a first region of a first conductive-type in contact with the main electrode on a main contact surface; a second region of a first conductive-type in contact with the peripheral electrode on a peripheral contact surface; and a third region of a second conductive-type provided under the first region, under the second region, and circumferentially outward of the second region, and a circumferentially-outward end of the metallic layer and a circumferentially-outward end of the solder layer are located more circumferentially inward than the circumferentially-outward end of the peripheral electrode.Type: GrantFiled: February 16, 2017Date of Patent: November 21, 2017Assignee: Toyota Jidosha Kabushiki KaishaInventor: Tomohiko Sato
-
Publication number: 20170243964Abstract: A semiconductor device includes: a semiconductor substrate; a main electrode; a peripheral electrode; an insulating protective film; a surface metallic layer; and a solder layer, wherein the semiconductor substrate includes: a first region of a first conductive-type in contact with the main electrode on a main contact surface; a second region of a first conductive-type in contact with the peripheral electrode on a peripheral contact surface; and a third region of a second conductive-type provided under the first region, under the second region, and circumferentially outward of the second region, and a circumferentially-outward end of the metallic layer and a circumferentially-outward end of the solder layer are located more circumferentially inward than the circumferentially-outward end of the peripheral electrode.Type: ApplicationFiled: February 16, 2017Publication date: August 24, 2017Inventor: Tomohiko Sato