Abstract: A wafer manufacturing method includes after flattening both upper and lower surfaces of a wafer sliced from a single crystal ingot, processing the wafer having damage on both surfaces caused by the flattening, so as to obtain desired damage at least on the lower surface of the wafer, the desired damage having a damage depth ranging from 5 nm-10 ?m; forming a polysilicon layer at least on the lower surface of the wafer while the damage on the lower surface of the wafer remains; single-wafer etching the upper surface of the wafer; and final polishing the upper surface of the wafer to have a mirrored surface, after the single-wafer etching.

Abstract: A process for producing a silicon wafer comprising a single-wafer etching step of performing an etching by supplying an etching solution through a supplying-nozzle to a surface of a single and a thin-discal wafer obtained by slicing a silicon single crystal ingot and rotating the wafer to spread the etching solution over all the surface of the wafer; and a grinding step of grinding the surface of the wafer, in this order, wherein the etching solution used in the single-wafer etching step is an aqueous acid solution which contains hydrogen fluoride, nitric acid, and phosphoric acid in an amount such that the content of which by weight % at a mixing rate of fluoric acid:nitric acid:phosphoric acid is 0.5 to 40%:5 to 50%:5 to 70%, respectively.

Abstract: There is provided a method of producing a semiconductor wafer which is high in the beveling accuracy and the yield for large-size wafers having a diameter of not less than 450 mm, comprising a slicing step for cutting out a disc-shaped wafer having a diameter of not less than 450 mm from a single crystal ingot, a step for lapping a surface of the wafer to conduct planarization, a step for beveling an edge portion of the wafer, a step for grinding the surface of the wafer and a step for mirror-polishing the surface of the wafer, wherein the planarizing step performs the lapping with free abrasive grains of #1000 to #1500.

Abstract: It is to provide a double-side mirror-finished semiconductor wafer having an excellent flatness by conducting a polishing step from rough polishing to finish polishing for simultaneously polishing both surfaces of a raw wafer with the same polishing cloth to reduce the polishing amount of the raw wafer as well as a production method thereof.

Abstract: A semiconductor wafer is produced by a method comprising a slicing step of cutting out a thin disc-shaped semiconductor wafer from a crystalline ingot; a fixed grain bonded abrasive grinding step of sandwiching the semiconductor wafer between a pair of upper and lower plates each having a pad of fixed grain bonded abrasive to simultaneously grind both surfaces of the semiconductor wafer; and a one-side polishing step subjected to both surfaces of the semiconductor wafer after the fixed grain bonded abrasive grinding step.

Abstract: A semiconductor wafer is produced by a method comprising a slicing step, an one-side polishing step and a chemical treating step, in which the kerf loss is reduced and the flatness is improved.

Abstract: A semiconductor wafer with high flatness is provided. The semiconductor wafer has a diameter ? of 450 mm and a thickness of at least 900 ?m and no greater than 1,100 ?m.

Abstract: A semiconductor wafer is produced by a method comprising a slicing step of cutting out a thin disc-shaped semiconductor wafer from a crystalline ingot; and a fixed grain bonded abrasive grinding step of sandwiching the semiconductor wafer between a pair of upper and lower plates each having a pad of fixed grain bonded abrasive to simultaneously grind both surfaces of the semiconductor wafer.

Abstract: A semiconductor wafer is produced by a method comprising a slicing step, a fixed grain bonded abrasive grinding step and a beveling step, in which the kerf loss is reduced and the flatness is improved.

Abstract: A semiconductor wafer has a diameter of 450 mm and a thickness of at least 725 ?m and no greater than 900 ?m.

Abstract: A method of grinding semiconductor wafers including simultaneously grinding both surfaces of multiple semiconductor wafers by rotating the wafers between a pair of upper and lower rotating surface plates in a state where the wafers are held on a carrier so that centers of the wafers are positioned on a circumference of a single circle, wherein a ratio of an area of a circle passing through the centers of the wafers to an area of one of the wafers is greater than or equal to 1.33 but less than 2.0; surfaces of the fixed abrasive grains comprised in the surface plates are comprised of pellets disposed in a grid-like fashion, with the pellets provided in a center portion and pellets provided in a peripheral portion being larger in size than the pellets provided in an intermediate portion.

Abstract: The present invention is a semiconductor wafer 1 including an orientation identification mark 3, which is used for identifying crystal orientation, on a peripheral surface 2 thereof, in which the orientation identification mark 3 has a curved surface that is concave toward an inner diameter direction D1 of the semiconductor wafer 1 and toward a center in a thickness direction D3, and has a gloss different from that of a portion 21 outside of the orientation identification mark 3 on the peripheral surface 2.

Abstract: The present invention is a semiconductor wafer including an orientation identification mark, which is used for identifying crystal orientation, on a peripheral surface thereof, in which the orientation identification mark has a terraced structure that is concave toward an inner diameter direction of the semiconductor wafer with respect to a portion outside of the orientation identification mark on the peripheral surface, and has a planar surface that is orthogonal to a diameter direction of the semiconductor wafer; and has a gloss different from that of the portion outside of the orientation identification mark on the peripheral surface.

Abstract: The present invention is a semiconductor wafer including an orientation identification mark, which is used for identifying crystal orientation, on a peripheral surface thereof, in which the orientation identification mark is smoothly joined with a portion outside of the orientation identification mark on the peripheral surface, has a planar surface that is orthogonal to an inner diameter direction of the semiconductor wafer, and has a gloss different from that in the portion outside of the orientation identification mark on the peripheral surface.

Abstract: This silicon wafer production process comprises in the order indicated a planarization step, in which the front surface and the rear surface of a wafer are ground or lapped, a single-wafer acid etching step, in which an acid etching liquid is supplied to the surface of the wafer while spinning and the entire wafer surface is etched to control the surface roughness Ra to 0.20 ?m or less, and a double-sided simultaneous polishing step, in which the front surface and the rear surface of the acid etched wafer are polished simultaneously. The process may comprise a single-sided polishing step, in which the top and bottom of the acid etched wafer are polished in turn, instead of the double-sided simultaneously polishing step.

Abstract: A single-wafer etching apparatus according to the present invention supplies an etchant to an upper surface of a wafer while rotating the wafer, thereby etching the upper surface of the wafer. Further, wafer elevating means moves up and down the wafer, and a lower surface blow mechanism which blows off the etchant flowing down on an edge surface of the wafer toward a radially outer side of the wafer by injection of a gas is fixed and provided without rotating together with the wafer. Furthermore, gap adjusting means controls the wafer elevating means based on detection outputs from gap detecting means for detecting a gap between the wafer and the lower surface blow mechanism, thereby adjusting the gap. The apparatus according to the present invention uniformly etches the edge portion without collapsing a chamfered shape of the edge portion of the wafer, and prevents a glitter from being produced on the edge surface of the wafer.

Abstract: Local shape collapse of a wafer end portion is suppressed to the minimum level, and a wafer front surface as well as a wafer end portion is uniformly etched while preventing an etchant from flowing to a wafer rear surface. There is provided an etching method of a single wafer which supplies an etchant onto a wafer front surface in a state where a single wafer having flattened front and rear surfaces is held, and etches the wafer front surface and a front surface side end portion by using a centrifugal force generated by horizontally rotating the wafer. According to this method, the etchant is intermittently supplied onto the front surface of the wafer in twice or more, supply of the etchant is stopped after the etchant for one process is supplied, and the etchant for the next process is supplied after the supplied etchant flows off from the end portion of the wafer.

Abstract: A method for manufacturing an epitaxial wafer that can reduce occurrence of a surface defect or a slip formed on an epitaxial layer is provided. The manufacturing method is characterized by comprising: a smoothing step of controlling application of an etchant to a wafer surface in accordance with a surface shape of a silicon wafer to smooth the wafer surface; and an epitaxial layer forming step of forming an epitaxial layer formed of a silicon single crystal on the surface of the wafer based on epitaxial growth.

Abstract: It is possible to reduce workloads of a both-side simultaneous polishing process or a single-side polishing process, and to achieve both of the maintenance of the wafer flatness and the reduction in wafer front side roughness upon completing a flattening process. A method for manufacturing silicon wafers according to the present invention includes a flattening process 13 of grinding or lapping front and back sides of a thin disc-shaped silicon wafer obtained by slicing a silicon single crystal ingot, an etching process of immersing the silicon wafer in an etchant for controlling a silicon wafer surface shape in which a fluorochemical surfactant is uniformly mixed in an alkaline aqueous solution to etch the front and back sides of the silicon wafer, and a both-side simultaneous polishing process 16 of simultaneously polishing the front and back sides of the etched silicon wafer or a single-side polishing process of polishing the front and back sides of the etched wafer for every side, in this order.

Abstract: An apparatus for etching a wafer by a single-wafer process comprises a fluid supplying device which feeds an etching fluid on a wafer, and a wafer-chuck for horizontally holding the wafer. The wafer-chuck is equipped with a gas injection device for injecting a gas to the wafer, a first fluid-aspirating device, and a second fluid-aspirating device. The etching fluid supplied on the wafer is spread by a rotation of the wafer. The etching fluid is scattered by a centrifugal force, or flows down over an edge portion of the wafer and is blown-off by the gas injected from the gas injection unit, and is aspirated by the first fluid-aspirating device or the second fluid-aspirating device.