Patents by Inventor Tomohiro Hashii
Tomohiro Hashii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7488400Abstract: An apparatus for etching a wafer by a single-wafer process comprises a fluid supplying device which feeds an etching fluid on a wafer, and a wafer-chuck for horizontally holding the wafer. The wafer-chuck is equipped with a gas injection device for injecting a gas to the wafer, a first fluid-aspirating device, and a second fluid-aspirating device. The etching fluid supplied on the wafer is spread by a rotation of the wafer. The etching fluid is scattered by a centrifugal force, or flows down over an edge portion of the wafer and is blown-off by the gas injected from the gas injection unit, and is aspirated by the first fluid-aspirating device or the second fluid-aspirating device.Type: GrantFiled: October 17, 2006Date of Patent: February 10, 2009Assignee: Sumco CorporationInventors: Sakae Koyata, Tomohiro Hashii, Katsuhiko Murayama, Kazushige Takaishi, Takeo Katoh
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Publication number: 20090004876Abstract: An object of the present invention is to provide a method for etching a single wafer, which effectively realizes a high flatness of wafer and an increase in productivity thereof. In a method for etching a single wafer, a single thin disk-like wafer sliced from a silicon single crystal ingot is spun, and a front surface of the wafer is etched with an etching solution supplied thereto. In the method, a plurality of supply nozzles are disposed above and opposite to the front surface of the wafer at different portions in the radial direction of the wafer, respectively; and then one or more conditions selected from the group consisting of temperatures, kinds, and supply flow rates of etching solutions from the plurality of supply nozzles are changed.Type: ApplicationFiled: January 24, 2007Publication date: January 1, 2009Inventors: Sakae Koyata, Tomohiro Hashii, Katsuhiko Murayama, Kazushige Takaishi, Takeo Katoh
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Publication number: 20080214094Abstract: A method for manufacturing a silicon wafer comprises a slicing step of a silicon single crystal ingot to obtain sliced wafers, a single-side grinding step to grind only one side of a wafer, and a smoothing step to smooth the other side of the wafer by controlling application of etchant depending on surface profile of the other side of the wafer. According to a method of the present invention a silicon wafer that has high flatness, is removed machine working damage, and is reduced of profile change of chamfer to be minimal can be manufactured.Type: ApplicationFiled: February 15, 2008Publication date: September 4, 2008Inventors: Takeo KATOH, Yasuyuki Hashimoto, Kazushige Takaishi, Tomohiro Hashii, Katsuhiko Murayama, Sakae Koyata
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Publication number: 20070298614Abstract: An apparatus for etching a wafer by a single-wafer process comprises a fluid supplying device which feeds an etching fluid on a wafer, and a wafer-chuck for horizontally holding the wafer. The wafer-chuck is equipped with a gas injection device for injecting a gas to the wafer, a first fluid-aspirating device, and a second fluid-aspirating device. The etching fluid supplied on the wafer is spread by a rotation of the wafer. The etching fluid is scattered by a centrifugal force, or flows down over an edge portion of the wafer and is blown-off by the gas injected from the gas injection unit, and is aspirated by the first fluid-aspirating device or the second fluid-aspirating device.Type: ApplicationFiled: August 15, 2007Publication date: December 27, 2007Inventors: Sakae Koyata, Tomohiro Hashii, Katsuhiko Murayama, Kazushige Takaishi, Takeo Katoh
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Patent number: 7288207Abstract: A method for manufacturing a silicon wafer includes a planarizing process 13 for polishing or lapping the upperside and lowerside surfaces of a thin disk-shaped silicon wafer obtained by slicing a silicon single crystal ingot, an etching process for dipping the silicon wafer into the etching liquid wherein silica powder is dispersed uniformly in an alkali aqueous solution, thereby etching the upperside and lowerside surfaces of the silicon wafer, and a both-side simultaneous polishing process 16 for polishing the upperside and lowerside surfaces of the etched silicon wafer simultaneously or a one-side polishing process for polishing the upperside and lowerside surfaces of the etched silicon wafer one after another, in this order.Type: GrantFiled: January 31, 2006Date of Patent: October 30, 2007Assignee: Sumco CorporationInventors: Sakae Koyata, Yuichi Kakizono, Tomohiro Hashii, Katsuhiko Murayama
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Publication number: 20070224821Abstract: This silicon wafer production process comprises in the order indicated a planarization step, in which the front surface and the rear surface of a wafer are ground or lapped, a single-wafer acid etching step, in which an acid etching liquid is supplied to the surface of the wafer while spinning and the entire wafer surface is etched to control the surface roughness Ra to 0.20 ?m or less, and a double-sided simultaneous polishing step, in which the front surface and the rear surface of the acid etched wafer are polished simultaneously. The process may comprise a single-sided polishing step, in which the top and bottom of the acid etched wafer are polished in turn, instead of the double-sided simultaneously polishing step.Type: ApplicationFiled: September 2, 2005Publication date: September 27, 2007Applicant: SUMCO CORPORATIONInventors: Sakae Koyata, Tomohiro Hashii, Katsuhiko Murayama, Kazushige Takatshi, Takeo Katoh
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Publication number: 20070184658Abstract: A method for manufacturing a silicon wafer includes a planarizing process 13 for polishing or lapping the upperside and lowerside surfaces of a thin disk-shaped silicon wafer obtained by slicing a silicon single crystal ingot, an etching process for dipping the silicon wafer into the etching liquid wherein silica powder is dispersed uniformly in an alkali aqueous solution, thereby etching the upperside and lowerside surfaces of the silicon wafer, and a both-side simultaneous polishing process 16 for polishing the upperside and lowerside surfaces of the etched silicon wafer simultaneously or a one-side polishing process for polishing the upperside and lowerside surfaces of the etched silicon wafer one after another, in this order.Type: ApplicationFiled: March 19, 2007Publication date: August 9, 2007Inventors: Sakae Koyata, Yuichi Kakizono, Tomohiro Hashii, Katsuhiko Murayama
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Publication number: 20070175863Abstract: An object of the present invention is to provide a single wafer etching apparatus realizing a high flatness of wafers and an increase in productivity thereof. In the single wafer etching apparatus, a single thin disk-like wafer sliced from a silicon single crystal ingot is mounted on a wafer chuck and spun thereon, and an overall front surface of the wafer is etched with an etching solution supplied thereto by centrifugal force generated by spinning the wafer 11. The singe wafer etching apparatus includes a plurality of supply nozzles 26, 27 capable of discharging the etching solution 14 from discharge openings 26a, 27a onto the front surface of the wafer 11, nozzle-moving devices each capable of independently moving the plurality of supply nozzles 28, 29, and an etching solution supplying device 30 for supplying the etching solution 14 to each of the plurality of supply nozzles and discharging the etching solution 14 from each of the discharge openings to the front surface of the wafer 11.Type: ApplicationFiled: January 31, 2007Publication date: August 2, 2007Inventors: Sakae Koyata, Tomohiro Hashii, Katsuhiko Murayama, Kazushige Takaishi, Takeo Katoh
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Publication number: 20070161247Abstract: Local shape collapse of a wafer end portion is suppressed to the minimum level, and a wafer front surface as well as a wafer end portion is uniformly etched while preventing an etchant from flowing to a wafer rear surface. There is provided an etching method of a single wafer which supplies an etchant onto a wafer front surface in a state where a single wafer having flattened front and rear surfaces is held, and etches the wafer front surface and a front surface side end portion by using a centrifugal force generated by horizontally rotating the wafer. According to this method, the etchant is intermittently supplied onto the front surface of the wafer in twice or more, supply of the etchant is stopped after the etchant for one process is supplied, and the etchant for the next process is supplied after the supplied etchant flows off from the end portion of the wafer.Type: ApplicationFiled: July 19, 2006Publication date: July 12, 2007Inventors: Sakae KOYATA, Tomohiro HASHII, Katsuhiko MURAYAMA, Kazushige TAKAISHI, Takeo KATOH
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Publication number: 20070087568Abstract: An apparatus for etching a wafer by a single-wafer process comprises a fluid supplying device which feeds an etching fluid on a wafer, and a wafer-chuck for horizontally holding the wafer. The wafer-chuck is equipped with a gas injection device for injecting a gas to the wafer, a first fluid-aspirating device, and a second fluid-aspirating device. The etching fluid supplied on the wafer is spread by a rotation of the wafer. The etching fluid is scattered by a centrifugal force, or flows down over an edge portion of the wafer and is blown-off by the gas injected from the gas injection unit, and is aspirated by the first fluid-aspirating device or the second fluid-aspirating device.Type: ApplicationFiled: October 17, 2006Publication date: April 19, 2007Inventors: Sakae Koyata, Tomohiro Hashii, Katsuhiko Murayama, Kazushige Takaishi, Takeo Katoh
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Publication number: 20070042567Abstract: A process for producing a silicon wafer comprising a single-wafer etching step of performing an etching by supplying an etching solution through a supplying-nozzle to a surface of a single and a thin-discal wafer obtained by slicing a silicon single crystal ingot and rotating the wafer to spread the etching solution over all the surface of the wafer; and a grinding step of grinding the surface of the wafer, in this order, wherein the etching solution used in the single-wafer etching step is an aqueous acid solution which contains hydrogen fluoride, nitric acid, and phosphoric acid in an amount such that the content of which by weight % at a mixing rate of fluoric acid: nitric acid: phosphoric acid is 0.5 to 40%: 5 to 50%: 5 to 70%, respectively.Type: ApplicationFiled: August 15, 2006Publication date: February 22, 2007Inventors: Sakae Koyata, Tomohiro Hashii, Katsuhiko Murayama, Kazushige Takaishi, Takeo Katoh
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Publication number: 20060264158Abstract: An apparatus for polishing wafers and a process for polishing wafers are provided. The apparatus for polishing a wafer which polishes the wafer W held by a carrier plate which rotates around an axis, by pressing and rubbing the wafer to a polishing pad disposed to a polishing platen 12 which rotates around another axis which differs from said axis, in which the polishing pad 11 is equipped with plural areas including a first area 11a and a second area 11b having hardness different from each other, each of the first 11a area and second area 11b being formed at a distribution and/or an area ratio such that the rate of the time or distance that the wafer W passes through the first area 11a during polishing to the time or distance that the wafer W passes through the second area 11b during polishing becomes a predetermined value.Type: ApplicationFiled: May 11, 2006Publication date: November 23, 2006Inventors: Tomohiro Hashii, Katsuhiko Murayama, Sakae Koyata, Kazushige Takaishi
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Publication number: 20060264157Abstract: This wafer polishing apparatus includes: a polishing plate having a polishing pad; a carrier plate which is placed facing the polishing pad and which slides and presses wafers against the polishing pad, while rotating in a state of holding the wafers; and an abrasive slurry supply device, wherein the abrasive slurry supply device is able to supply different abrasive slurries, each of the abrasive slurries contains abrasives of which the average grain size is different from those contained in the other abrasive slurries. This method for polishing wafers includes: while supplying an abrasive slurry to a surface of a polishing pad, sliding and pressing wafers against the polishing pad, wherein different abrasive slurries are supplied to the surface of the polishing pad, and each of the abrasive slurries contains abrasives of which the average grain size is different from those contained in the other abrasive slurries.Type: ApplicationFiled: May 11, 2006Publication date: November 23, 2006Inventors: Tomohiro Hashii, Katsuhiko Murayama, Sakae Koyata, Kazushige Takaishi
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Publication number: 20060169667Abstract: A method for manufacturing a silicon wafer includes a planarizing process 13 for polishing or lapping the upperside and lowerside surfaces of a thin disk-shaped silicon wafer obtained by slicing a silicon single crystal ingot, an etching process for dipping the silicon wafer into the etching liquid wherein silica powder is dispersed uniformly in an alkali aqueous solution, thereby etching the upperside and lowerside surfaces of the silicon wafer, and a both-side simultaneous polishing process 16 for polishing the upperside and lowerside surfaces of the etched silicon wafer simultaneously or a one-side polishing process for polishing the upperside and lowerside surfaces of the etched silicon wafer one after another, in this order.Type: ApplicationFiled: January 31, 2006Publication date: August 3, 2006Inventors: Sakae Koyata, Yuichi Kakizono, Tomohiro Hashii, Katsuhiko Murayama
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Patent number: 6969302Abstract: To reduce the wafer production cost by grinding a sliced semiconductor wafer at a high accuracy and a high efficiency and supplying the wafer to the next polishing step. A semiconductor wafer is rough ground between grindstones by a fixed grindstone. After rough grinding, finish grinding by free abrasive grain is performed on the same grinding axis by supplying a slurry which suspends fine abrasive grain between the grindstones through slurry pipes. To perform finish grinding by free abrasive grains, a rotational speed and a feed rate of the grindstones are lowered to lower the grinding action by a fixed grindstone.Type: GrantFiled: June 16, 2000Date of Patent: November 29, 2005Assignee: Sumitomo Metal Industries, Ltd.Inventor: Tomohiro Hashii
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Patent number: 6753256Abstract: An object of the present invention is to provide a method of manufacturing a semiconductor wafer in which the manufacturing efficiency of grinding using a double-headed grinding machine is improved, minute surface undulations arising through the grinding are reduced, and the yield of the manufacturing process is improved. By processing a sliced wafer using a double-headed grinding machine, a strained layer and a macroscopic undulation component formed on the wafer surfaces during the slicing are removed, and the degree of flatness of the wafer is improved, and by subsequently carrying out both-surfaces lapping, minute surface undulations that arose during the double-headed grinding are removed.Type: GrantFiled: August 2, 2001Date of Patent: June 22, 2004Assignee: Sumitomo Metal Industries, Ltd.Inventors: Tomohiro Hashii, Tooru Watanabe
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Patent number: 6465328Abstract: An edge-rounded portion mirror finishing process, which results in low deformation on a wafer, which has undergone a slicing process including a grinding process in which double-sided grinding is performed on the. sliced wafer; a finishing grinding process in which high-precision and low-deformation finish grinding is performed on the wafer; an edge rounding process in which low-deformation grinding is performed on an edge-rounded portion of the wafer; a two-sided primary polishing process in which primary polishing is performed on both sides of the edge-rounded wafer; a one-sided finish polishing process in which finish polishing is performed on one side of the wafer that has been primary polished on both sides; and a process in which finish polishing is performed on the edge-rounded portion of the above-mentioned wafer.Type: GrantFiled: March 27, 2001Date of Patent: October 15, 2002Assignee: Sumitomo Metal Industries, Ltd.Inventors: Tomohiro Hashii, Kazunori Onizaki, Sumihisa Masuda
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Publication number: 20020016072Abstract: An object of the present invention is to provide a method of manufacturing a semiconductor wafer in which the manufacturing efficiency of grinding using a double-headed grinding machine is improved, minute surface undulations arising through the grinding are reduced, and the yield of the manufacturing process is improved. By processing a sliced wafer using a double-headed grinding machine, a strained layer and a macroscopic undulation component formed on the wafer surfaces during the slicing are removed, and the degree of flatness of the wafer is improved, and by subsequently carrying out both-surfaces lapping, minute surface undulations that arose during the double-headed grinding are removed.Type: ApplicationFiled: August 2, 2001Publication date: February 7, 2002Applicant: Sumitomo Metal Industries, Ltd.Inventors: Tomohiro Hashii, Tooru Watanabe