Abstract: A D/A converter is configured to output tri-level potentials from an output terminal. A high potential terminal and the output terminal are connected through a p-type MOS transistor. An intermediate potential terminal and the output terminal are connected through p-type and n-type MOS transistors, which are connected in series and have low threshold voltages. A low potential terminal and the output terminal are connected through an n-type MOS transistor. The p-type MOS transistor and the n-type MOS transistor connected to the Intermediate potential terminal have a positive voltage and a negative voltage between gate-source paths in off-states, respectively, and a substrate bias effect and hence remain in the off-state stably.

Abstract: An A/D converter includes a delta-sigma processing circuit for A/D conversion by delta-sigma modulation, and a cyclic processing circuit for A/D conversion by cyclic processing of amplification of a residue generated in the A/D conversion. The A/D converter further includes a quantization part for outputting a quantized value of quantized output of the delta-sigma processing circuit and a quantized output of the cyclic processing circuit, and a control circuit for generating an A/D conversion result and switching over a reference voltage based on the quantized value. The delta-sigma processing circuit and the cyclic processing circuit include a sampling capacitor, an integration capacitor and a capacitive D/A converter, which includes a DAC capacitor and add and subtract a charge corresponding to a reference voltage to and from a residue of quantization. The sampling capacitor, the DAC capacitor and the integration capacitor are provided as electrically separate capacitors.

Abstract: An A/D converter includes a delta-sigma processing circuit for A/D conversion by delta-sigma modulation, and a cyclic processing circuit for A/D conversion by cyclic processing of amplification of a residue generated in the A/D conversion. The A/D converter further includes a quantization part for outputting a quantized value of quantized output of the delta-sigma processing circuit and a quantized output of the cyclic processing circuit, and a control circuit for generating an A/D conversion result and switching over a reference voltage based on the quantized value. The delta-sigma processing circuit and the cyclic processing circuit include a sampling capacitor, an integration capacitor and a capacitive D/A converter, which includes a DAC capacitor and add and subtract a charge corresponding to a reference voltage to and from a residue of quantization. The sampling capacitor, the DAC capacitor and the integration capacitor are provided as electrically separate capacitors.

Abstract: A detection circuit for a capacitive sensor includes a drive signal generator for applying drive signal varying between first and second levels to a sensor common terminal, a sense amplifier having input terminals respectively connected to sensor detection terminals, and a controller for controlling input common-mode voltage of the sense amplifier to predetermined voltage. The controller includes a feedback amplifier for outputting feedback voltage according to difference between the common-mode and predetermined voltages, a pair of feedback capacitors having one ends respectively connected to the detection terminals and another ends connected together, and a voltage switcher for applying preset voltage, between the predetermined voltage and a limit voltage outputtable by the feedback amplifier in direction where the second level exists relative to the first level, to the other ends during the first level and the feedback voltage to the other ends during the second level.

Abstract: A detection circuit for a capacitive sensor includes a drive signal generator for applying drive signal to a sensor common terminal, a sense amplifier having input terminals respectively connected to sensor detection terminals, and a controller for controlling input common-mode voltage of the sense amplifier to predetermined voltage. The controller includes a feedback amplifier for outputting feedback voltage according to difference between the common-mode and predetermined voltages, a pair of first feedback capacitors having one ends respectively connected to the detection terminals and another ends connected together, a second feedback capacitor having one end connected to the other ends, and a voltage switcher for applying first preset voltage to the other ends during first level of the drive signal and for applying second preset voltage to the other ends and the predetermined voltage to another end of the second feedback capacitor during second level of the drive signal.

Abstract: An A/D conversion apparatus includes a signal processor, a quantizer, and a controller. The signal processor has circuit blocks connected in a loop to process an analog input signal. The quantizer generates a quantization value by quantizing an output of at least one of the circuit blocks including a final-stage circuit block. In each circuit block, one end of a first capacitor is connected through a switch to an input terminal of an operational amplifier, and one end of each of second and third capacitors is connected directly to the operational amplifier. The controller generates an A/D conversion result of the analog input signal according to the quantization value and changes connection conditions of the capacitors so that the signal processor and the quantizer function as a delta-sigma modulator or a cyclic A/D converter.

Abstract: An A/D conversion apparatus includes a signal processor, a quantizer, and a controller. The signal processor has circuit blocks connected in a loop to process an analog input signal. The quantizer generates a quantization value by quantizing an output of at least one of the circuit blocks including a final-stage circuit block. In each circuit block, one end of a first capacitor is connected through a switch to an input terminal of an operational amplifier, and one end of each of second and third capacitors is connected directly to the operational amplifier. The controller generates an A/D conversion result of the analog input signal according to the quantization value and changes connection conditions of the capacitors so that the signal processor and the quantizer function as a delta-sigma modulator or a cyclic A/D converter.

Abstract: An input signal is quantized by a quantizer after being passed through plural loop filters. A last-stage loop filter is formed of an operational amplifier for generating an output signal, a sampling capacitor for sampling the input signal, an integrating capacitor for integrating the signal sampled by the capacitor and plural switches for switching over signal paths. A control circuit controls on/off states of the switches to discharge the sampling capacitor and the integrating capacitor and causes the loop filter to repeat a sampling operation and an integrating operation plural times. The control circuit lastly connects the sampling capacitor and the integrating capacitor to a state, which is opposite to the state of the integrating operation time and turns on a converting switch so that the A/D converter A/D-converts the output signal of the loop filter.

Abstract: An input signal is quantized by a quantizer after being passed through plural loop filters. A last-stage loop filter is formed of an operational amplifier for generating an output signal, a sampling capacitor for sampling the input signal, an integrating capacitor for integrating the signal sampled by the capacitor and plural switches for switching over signal paths. A control circuit controls on/off states of the switches to discharge the sampling capacitor and the integrating capacitor and causes the loop filter to repeat a sampling operation and an integrating operation plural times. The control circuit lastly connects the sampling capacitor and the integrating capacitor to a state, which is opposite to the state of the integrating operation time and turns on a converting switch so that the A/D converter A/D-converts the output signal of the loop filter.

Abstract: A detection circuit for a capacitive sensor includes a drive signal generator for applying drive signal varying between first and second levels to a sensor common terminal, a sense amplifier having input terminals respectively connected to sensor detection terminals, and a controller for controlling input common-mode voltage of the sense amplifier to predetermined voltage. The controller includes a feedback amplifier for outputting feedback voltage according to difference between the common-mode and predetermined voltages, a pair of feedback capacitors having one ends respectively connected to the detection terminals and another ends connected together, and a voltage switcher for applying preset voltage, between the predetermined voltage and a limit voltage outputtable by the feedback amplifier in direction where the second level exists relative to the first level, to the other ends during the first level and the feedback voltage to the other ends during the second level.

Abstract: A detection circuit for a capacitive sensor includes a drive signal generator for applying drive signal to a sensor common terminal, a sense amplifier having input terminals respectively connected to sensor detection terminals, and a controller for controlling input common-mode voltage of the sense amplifier to predetermined voltage. The controller includes a feedback amplifier for outputting feedback voltage according to difference between the common-mode and predetermined voltages, a pair of first feedback capacitors having one ends respectively connected to the detection terminals and another ends connected together, a second feedback capacitor having one end connected to the other ends, and a voltage switcher for applying first preset voltage to the other ends during first level of the drive signal and for applying second preset voltage to the other ends and the predetermined voltage to another end of the second feedback capacitor during second level of the drive signal.

Abstract: Disclosed herein is a sigma-delta modulator, including an integration circuit, a first DAC unit, and a second DAC unit. The integration circuit includes first and second terminals, and integrates a voltage supplied via the first terminal. The first DAC unit alternately supplies a first voltage obtained at one end of a first resistor to the first terminal and the second terminal. The second DAC unit alternately supplies a second voltage at the other end of a second resistor to the second terminal or the first terminal. The second DAC unit supplies the second voltage to the second terminal when the first DAC unit supplies the first voltage to the first terminal. The second DAC unit supplies the second voltage to the first terminal when the first DAC unit supplies the first voltage to the second terminal.

Abstract: Disclosed herein is a sigma-delta modulator, including an integration circuit, a first DAC unit, and a second DAC unit. The integration circuit includes first and second terminals, and integrates a voltage supplied via the first terminal. The first DAC unit alternately supplies a first voltage obtained at one end of a first resistor to the first terminal and the second terminal. The second DAC unit alternately supplies a second voltage at the other end of a second resistor to the second terminal or the first terminal. The second DAC unit supplies the second voltage to the second terminal when the first DAC unit supplies the first voltage to the first terminal. The second DAC unit supplies the second voltage to the first terminal when the first DAC unit supplies the first voltage to the second terminal.

Abstract: This oscillation circuit includes a triangular wave generation circuit that generates a triangular wave signal corresponding to an outputted clock signal, a comparison circuit that generates a clock signal corresponding to a comparison of the triangular wave signal with a first reference voltage and a second reference voltage, a current adjusting circuit that adjusts the value of adjusted current according to the power supply voltage for the comparison circuit, and a reference voltage generation circuit that generates the first reference voltage and the second reference voltage having a voltage differential that corresponds to the value of the adjusted current. The current adjusting circuit increases the adjusted current when the power supply voltage for the comparison circuit rises, and reduces the adjusted current when the power supply voltage drops.

Abstract: This oscillation circuit includes a triangular wave generation circuit that generates a triangular wave signal corresponding to an outputted clock signal, a comparison circuit that generates a clock signal corresponding to a comparison of the triangular wave signal with a first reference voltage and a second reference voltage, a current adjusting circuit that adjusts the value of adjusted current according to the power supply voltage for the comparison circuit, and a reference voltage generation circuit that generates the first reference voltage and the second reference voltage having a voltage differential that corresponds to the value of the adjusted current. The current adjusting circuit increases the adjusted current when the power supply voltage for the comparison circuit rises, and reduces the adjusted current when the power supply voltage drops.