Abstract: An image processing apparatus includes an acquisition unit configured to acquire a captured image selected according to specified viewpoint information from a plurality of captured images captured by a plurality of imaging units at different viewpoint positions, a generation unit configured to generate an image according to the specified viewpoint information using the viewpoint information of the selected captured image and the specified viewpoint information from the selected captured image, and a blurring processing unit configured to execute blurring processing on the generated image, wherein, when an imaging unit corresponding to a captured image for a target frame is different from an imaging unit corresponding to a captured image for a frame adjacent to the target frame, the blurring processing unit executes blurring processing on the generated image corresponding to the target frame.

Abstract: Image data captured by a capturing unit is inputted. Exposure information of the captured image data is inputted. Rotary-vibration information, which indicates rotary vibration of the capturing unit at the time of image capture, is inputted. A blur, which is caused by the rotary vibration, of the captured image data is corrected based on the exposure information and an angle of rotation of the capturing unit, which is indicated by the rotary-vibration information.

Abstract: An exposure condition when obtaining a sensed image is input. Shake information when obtaining the sensed image is input. A filter to be used to correct a blur of the sensed image is generated based on the exposure condition and a weight value including a non-integer obtained from the shake information.

Abstract: A method of cutting a glass substrate to form a plurality of flat panel displays. The method includes forming a scribe line or a line of weakness on a surface of a mother material; treating the mother material with chemical to further weaken the mother material; and cutting the mother material. The scribe line may be formed using a masking technique. The mother material may be treated with chemical by putting the mother material into a chemical solution. Alternatively, the chemical may be sprayed, blown, or exposed to the mother material. The cutting of the mother material may be done by applying mechanical and/or thermal stress along the scribe line.

Abstract: The present invention is directed to provide a semiconductor package and the like realizing reduced manufacturing cost and improved reliability by enhancing a ground line and/or a power supply line. A semiconductor package 50 includes: a semiconductor device 1 including a circuit face on which an external electrode is formed; an insertion substrate 2 forming a housing part in which the semiconductor device 1 is disposed; and an interposer substrate 5 including a wiring pattern 7 and whose both ends are bent along the insertion substrate 2. The insertion substrate 2 is made of a conductive material and is electrically connected to a ground line or a power supply line in the wiring pattern 7 in the interposer substrate 5.

Abstract: A highly reliable semiconductor chip electrode structure allowing control of interface reaction of bonding sections even in the case of using two- or three-element solder used conventionally is disclosed. A solder alloy making layer for preventing dissolving and diffusion of tin into tin-based lead free solder is thinly formed on a UBM layer. The tin-based solder is supplied in solder paste or solder ball form. A combined solder alloy layer composed of a combination of intermetallic compounds, one of tin and the solder alloy making layer, and one of tin and the UBM layer, is formed by heating and melting.

Abstract: Disclosed herein is a display device using a substrate cell obtained by separating a glass laminate substrate, in which two or more display regions are provided between two glass substrates, into substrate cells each having the display region by cutting. A physically-formed cut surface of the peripheral end face of the substrate cell is smoothed by subsequent chemical polishing, and the smoothed peripheral end face becomes flattened so that an area ratio R determined by the following formula is less than 1.2: R=S/S0, where S0 is a virtual flat reference area set to 600 ?m2 or more in an X-Y plane orthogonal to the front face of the substrate cell and S is a judgment area calculated in a measurement region, defined by the outline of the flat reference area S0, in the peripheral end face.

Abstract: A columnar bump formed of copper etc. is formed on a wiring film of a semiconductor chip through an interconnected film and an adhesive film in a wafer unit by electrolytic plating in which package formation is possible. An oxidation prevention film is formed of such as gold on an upper surface or a part of the upper surface and side surface. A wet prevention film of such as an oxide film is formed on the columnar bump side as needed. If this bump is soldered to the pad on a packaging substrate, solder gets wet in the whole region of the columnar bump upper surface and only a part of the side surface. Stabilized and reliable junction form can be thus formed. Moreover, since the columnar bump does not fuse, the distance between a semiconductor board and a packaging board is not be narrowed by solder.

Abstract: The reliabilities of a wiring substrate and a semiconductor apparatus are improved by reducing the internal stress caused by the difference of thermal expansion coefficients between a base substrate and a semiconductor chip. A wiring layer (5) is provided on one surface of a silicon base (3). An electrode as the uppermost layer of the wiring layer (5) is provided with an external bonding bump (7). A through-electrode (4) is formed in the base (3) for electrically connecting the wiring layer (5) and an electrode terminal. The electrode terminal on the chip mounting surface is bonded to an electrode terminal of a semiconductor chip (1) by an internal bonding bump (6). The thermal expansion coefficient of the silicon base (3) is equivalent to that of the semiconductor chip (1) and not more than that of the wiring layer (5).

Abstract: Image data including color separation data and gloss data of an image is input. The color separation data is quantized to generate a color signal. The gloss data of the image is quantized on the basis of the color signal and gloss data related to a recording medium, a color material, and a gloss control material to generate a gloss signal. An image is formed on the recording medium on the basis of the color signal and the gloss signal using the color material and the gloss control material.

Abstract: A highly reliable semiconductor chip electrode structure allowing control of interface reaction of bonding sections even in the case of using two- or three-element solder used conventionally is disclosed. A solder alloy making layer for preventing dissolving and diffusion of tin into tin-based lead free solder is thinly formed on a UBM layer. The tin-based solder is supplied in solder paste or solder ball form. A combined solder alloy layer composed of a combination of intermetallic compounds, one of tin and the solder alloy making layer, and one of tin and the UBM layer, is formed by heating and melting.

Abstract: A highly reliable semiconductor chip electrode structure allowing control of interface reaction of bonding sections even in the case of using two- or three-element solder used conventionally is disclosed. A solder alloy making layer for preventing dissolving and diffusion of tin into tin-based lead free solder is thinly formed on a UBM layer. The tin-based solder is supplied in solder paste or solder ball form. A combined solder alloy layer composed of a combination of intermetallic compounds, one of tin and the solder alloy making layer, and one of tin and the UBM layer, is formed by heating and melting.

Abstract: A columnar bump formed of copper etc. is formed on a wiring film of a semiconductor chip through an interconnected film and an adhesive film in a wafer unit by electrolytic plating in which package formation is possible. An oxidation prevention film is formed of such as gold on an upper surface or a part of the upper surface and side surface. A wet prevention film of such as an oxide film is formed on the columnar bump side as needed. If this bump is soldered to the pad on a packaging substrate, solder gets wet in the whole region of the columnar bump upper surface and only a part of the side surface. Stabilized and reliable junction form can be thus formed. Moreover, since the columnar bump does not fuse, the distance between a semiconductor board and a packaging board is not be narrowed by solder.

Abstract: A columnar bump formed of copper etc. is formed on a wiring film of a semiconductor chip through an interconnected film and an adhesive film in a wafer unit by electrolytic plating in which package formation is possible. An oxidation prevention film is formed of such as gold on an upper surface or a part of the upper surface and side surface. A wet prevention film of such as an oxide film is formed on the columnar bump side as needed. If this bump is soldered to the pad on a packaging substrate, solder gets wet in the whole region of the columnar bump upper surface and only a part of the side surface. Stabilized and reliable junction form can be thus formed. Moreover, since the columnar bump does not fuse, the distance between a semiconductor board and a packaging board is not be narrowed by solder.

Abstract: A method of cutting a glass substrate to form a plurality of flat panel displays. The method includes forming a scribe line or a line of weakness on a surface of a mother material; treating the mother material with chemical to further weaken the mother material; and cutting the mother material. The scribe line may be formed using a masking technique. The mother material may be treated with chemical by putting the mother material into a chemical solution. Alternatively, the chemical may be sprayed, blown, or exposed to the mother material. The cutting of the mother material may be done by applying mechanical and/or thermal stress along the scribe line.

Abstract: Disclosed herein is a method for cutting a glass laminate including first and second glass plates, which includes: a first scribing step of forming a first scribe line on the surface of the first glass plate; an additional etching step of bringing the glass laminate into contact with an etchant to reduce the thickness of the entire glass laminate; a second scribing step of forming a second scribe line as a counterpart of the first scribe line on the surface of the second glass plate of the glass laminate whose thickness has been reduced, and a cutting step of applying stress to the glass laminate to cut the glass laminate along the scribe lines, wherein these steps are performed in this order. In the invention, a glass laminate, in which fractures starting from a scribe line before the cutting of a glass laminate is performed can be suppressed, can be cut.

Abstract: A highly reliable semiconductor chip electrode structure allowing control of interface reaction of bonding sections even in the case of using two- or three-element solder used conventionally is disclosed. A solder alloy making layer for preventing dissolving and diffusion of tin into tin-based lead free solder is thinly formed on a UBM layer. The tin-based solder is supplied in solder paste or solder ball form. A combined solder alloy layer composed of a combination of intermetallic compounds, one of tin and the solder alloy making layer, and one of tin and the UBM layer, is formed by heating and melting.

Abstract: A highly reliable semiconductor chip electrode structure allowing control of interface reaction of bonding sections even in the case of using two- or three-element solder used conventionally is disclosed. A solder alloy making layer for preventing dissolving and diffusion of tin into tin-based lead free solder is thinly formed on a UBM layer. The tin-based solder is supplied in solder paste or solder ball form. A combined solder alloy layer composed of a combination of intermetallic compounds, one of tin and the solder alloy making layer, and one of tin and the UBM layer, is formed by heating and melting.

Abstract: A columnar bump formed of copper etc. is formed on a wiring film of a semiconductor chip through an interconnected film and an adhesive film in a wafer unit by electrolytic plating in which package formation is possible. An oxidation prevention film is formed of such as gold on an upper surface or a part of the upper surface and side surface. A wet prevention film of such as an oxide film is formed on the columnar bump side as needed. If this bump is soldered to the pad on a packaging substrate, solder gets wet in the whole region of the columnar bump upper surface and only a part of the side surface. Stabilized and reliable junction form can be thus formed. Moreover, since the columnar bump does not fuse, the distance between a semiconductor board and a packaging board is not be narrowed by solder.

Abstract: A columnar bump formed of copper etc. is formed on a wiring film of a semiconductor chip through an interconnected film and an adhesive film in a wafer unit by electrolytic plating in which package formation is possible. An oxidation prevention film is formed of such as gold on an upper surface or a part of the upper surface and side surface. A wet prevention film of such as an oxide film is formed on the columnar bump side as needed. If this bump is soldered to the pad on a packaging substrate, solder gets wet in the whole region of the columnar bump upper surface and only a part of the side surface. Stabilized and reliable junction form can be thus formed. Moreover, since the columnar bump does not fuse, the distance between a semiconductor board and a packaging board is not be narrowed by solder.