Patents by Inventor Tomohiro Yoshihara
Tomohiro Yoshihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8984374Abstract: A storage system has a RAID group configured by storage media, a system controller with a processor, a buffer memory coupled to storage devices and the processor by a communication network, and a cache memory coupled to the processor and the buffer memory by the network. A processor that stores first data, which is related to a write request from a host computer, in a cache memory, specifies a first storage device for storing data before update, which is data obtained before updating the first data, and transfers the first data to the specified first storage device. A first device controller transmits the first data and second data based on the data before update, from the first storage device to the system controller. The processor stores the second data in the buffer memory, specifies a second storage device, and transfers the stored second data to the specified second storage device.Type: GrantFiled: April 27, 2012Date of Patent: March 17, 2015Assignee: Hitachi, Ltd.Inventor: Tomohiro Yoshihara
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Publication number: 20140344510Abstract: In an exemplary storage system, a processor assigns an unused process to a read request designating an area of a logical volume. The processor determines whether the data designated by the read request is in a cache memory, based on a first identifier for identifying the area designated by the read request. When the designated data is not in the cache memory and a part of physical volumes providing the logical volume is a first kind of physical volume, the processor stores the first identifier associated with an identifier for identifying an area allocated in the cache memory. When the designated data is not in the cache memory and a part of the physical volumes is a second kind of physical volume, the processor stores a second identifier for identifying the process assigned to the read request associated with an identifier for identifying an area allocated in the cache memory.Type: ApplicationFiled: July 29, 2014Publication date: November 20, 2014Applicant: Hitachi, Ltd.Inventors: TOMOHIRO YOSHIHARA, Akira DEGUCHI, Hiroaki AKUTSU
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Patent number: 8819371Abstract: In an exemplary storage system, a processor assigns an unused process to a read request designating an area of a logical volume. The processor determines whether the data designated by the read request is in a cache memory, based on a first identifier for identifying the area designated by the read request. When the designated data is not in the cache memory and a part of physical volumes providing the logical volume is a first kind of physical volume, the processor stores the first identifier associated with an identifier for identifying an area allocated in the cache memory. When the designated data is not in the cache memory and a part of the physical volumes is a second kind of physical volume, the processor stores a second identifier for identifying the process assigned to the read request associated with an identifier for identifying an area allocated in the cache memory.Type: GrantFiled: November 13, 2012Date of Patent: August 26, 2014Assignee: Hitachi, Ltd.Inventors: Tomohiro Yoshihara, Akira Deguchi, Hiroaki Akutsu
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Publication number: 20140208009Abstract: A storage system in an embodiment of this invention comprises a non-volatile storage area for storing write data from a host, a cache area capable of temporarily storing the write data before storing the write data in the non-volatile storage area, and a controller that determines whether to store the write data in the cache area or to store the write data in the non-volatile storage area without storing the write data in the cache area, and stores the write data in the determined area.Type: ApplicationFiled: March 20, 2014Publication date: July 24, 2014Applicant: Hitachi, Ltd.Inventors: TOMOHIRO YOSHIHARA, Akira Deguchi, Hiroaki Akutsu
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Patent number: 8719524Abstract: A storage system in an embodiment of this invention comprises a non-volatile storage area for storing write data from a host, a cache area capable of temporarily storing the write data before storing the write data in the non-volatile storage area, and a controller that determines whether to store the write data in the cache area or to store the write data in the non-volatile storage area without storing the write data in the cache area, and stores the write data in the determined area.Type: GrantFiled: October 7, 2011Date of Patent: May 6, 2014Assignee: Hitachi, Ltd.Inventors: Tomohiro Yoshihara, Akira Deguchi, Hiroaki Akutsu
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Patent number: 8713288Abstract: The present invention provides a storage system in which each microprocessor is able to execute synchronous processing and asynchronous processing in accordance with the operating status of the storage system. Any one attribute, from among multiple attributes (operating modes) prepared beforehand, is set in each microprocessor in accordance with the operating status of the storage system. The attribute that is set in each microprocessor is regularly reviewed and changed.Type: GrantFiled: June 17, 2010Date of Patent: April 29, 2014Assignee: Hitachi, Ltd.Inventors: Tomohiro Yoshihara, Shintaro Kudo, Norio Shimozono
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Patent number: 8700975Abstract: A storage system has a RAID group configured by storage media, a system controller with a processor, a buffer memory coupled to storage devices and the processor by a communication network, and a cache memory coupled to the processor and the buffer memory by the network. A processor that stores first data, which is related to a write request from a host computer, in a cache memory, specifies a first storage device for storing data before update, which is data obtained before updating the first data, and transfers the first data to the specified first storage device. A first device controller transmits the first data and second data based on the data before update, from the first storage device to the system controller. The processor stores the second data in the buffer memory, specifies a second storage device, and transfers the stored second data to the specified second storage device.Type: GrantFiled: March 15, 2013Date of Patent: April 15, 2014Assignee: Hitachi, Ltd.Inventor: Tomohiro Yoshihara
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Patent number: 8694689Abstract: In a storage system which includes a plurality of microprocessors, it is desired to prevent delay in I/O responses due to synchronous processing waiting for asynchronous processing, while still ensuring the throughput of asynchronous processing. In a plurality of microprocessors possessed by a controller, synchronous processors and asynchronous processors are mixed together. The synchronous processors are microprocessors whose duty is to perform synchronous processing and not to perform asynchronous processing. And the asynchronous processors are microprocessors whose duty is to perform asynchronous processing and not to perform synchronous processing.Type: GrantFiled: January 9, 2009Date of Patent: April 8, 2014Assignee: Hitachi, Ltd.Inventors: Tomohiro Yoshihara, Sadahiro Sugimoto, Norio Shimozono, Noboru Morishita, Masayuki Yamamoto
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Patent number: 8694698Abstract: According to a prior art data transfer method of a storage subsystem, when competition of data transfer accesses occurs, a free access destination port is allocated uniformly without determining the access type or the access state of the access destination, so that the performance of the device is not enhanced. The present invention solves the problem by selecting a data transfer access for completing data transfer with priority based on the access type or the remaining transfer data quantity of competing data transfer accesses, or by changing the access destination of an access standby data transfer access, thereby performing data transfer efficiently.Type: GrantFiled: April 12, 2012Date of Patent: April 8, 2014Assignee: Hitachi, Ltd.Inventors: Makio Mizuno, Masanori Takada, Tomohiro Yoshihara, Susumu Tsuruta
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Publication number: 20130311721Abstract: In an exemplary storage system, a processor assigns an unused process to a read request designating an area of a logical volume. The processor determines whether the data designated by the read request is in a cache memory, based on a first identifier for identifying the area designated by the read request. When the designated data is not in the cache memory and a part of physical volumes providing the logical volume is a first kind of physical volume, the processor stores the first identifier associated with an identifier for identifying an area allocated in the cache memory. When the designated data is not in the cache memory and a part of the physical volumes is a second kind of physical volume, the processor stores a second identifier for identifying the process assigned to the read request associated with an identifier for identifying an area allocated in the cache memory.Type: ApplicationFiled: November 13, 2012Publication date: November 21, 2013Applicant: Hitachi, Ltd.Inventors: TOMOHIRO YOSHIHARA, Akira Deguchi, Hiroaki Akutsu
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Publication number: 20130290777Abstract: A storage system has a RAID group configured by storage media, a system controller with a processor, a buffer memory coupled to storage devices and the processor by a communication network, and a cache memory coupled to the processor and the buffer memory by the network. A processor that stores first data, which is related to a write request from a host computer, in a cache memory, specifies a first storage device for storing data before update, which is data obtained before updating the first data, and transfers the first data to the specified first storage device. A first device controller transmits the first data and second data based on the data before update, from the first storage device to the system controller. The processor stores the second data in the buffer memory, specifies a second storage device, and transfers the stored second data to the specified second storage device.Type: ApplicationFiled: March 15, 2013Publication date: October 31, 2013Applicant: HITACHI, LTD.Inventor: Tomohiro YOSHIHARA
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Publication number: 20130290773Abstract: A storage system has a RAID group configured by storage media, a system controller with a processor, a buffer memory coupled to storage devices and the processor by a communication network, and a cache memory coupled to the processor and the buffer memory by the network. A processor that stores first data, which is related to a write request from a host computer, in a cache memory, specifies a first storage device for storing data before update, which is data obtained before updating the first data, and transfers the first data to the specified first storage device. A first device controller transmits the first data and second data based on the data before update, from the first storage device to the system controller. The processor stores the second data in the buffer memory, specifies a second storage device, and transfers the stored second data to the specified second storage device.Type: ApplicationFiled: April 27, 2012Publication date: October 31, 2013Applicant: HITACHI, LTD.Inventor: Tomohiro Yoshihara
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Publication number: 20130275630Abstract: According to a prior art data transfer method of a storage subsystem, when competition of data transfer accesses occurs, a free access destination port is allocated uniformly without determining the access type or the access state of the access destination, so that the performance of the device is not enhanced. The present invention solves the problem by selecting a data transfer access for completing data transfer with priority based on the access type or the remaining transfer data quantity of competing data transfer accesses, or by changing the access destination of an access standby data transfer access, thereby performing data transfer efficiently.Type: ApplicationFiled: April 12, 2012Publication date: October 17, 2013Inventors: Makio Mizuno, Masanori Takada, Tomohiro Yoshihara, Susumu Tsuruta
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Publication number: 20130091328Abstract: A storage system in an embodiment of this invention comprises a non-volatile storage area for storing write data from a host, a cache area capable of temporarily storing the write data before storing the write data in the non-volatile storage area, and a controller that determines whether to store the write data in the cache area or to store the write data in the non-volatile storage area without storing the write data in the cache area, and stores the write data in the determined area.Type: ApplicationFiled: October 7, 2011Publication date: April 11, 2013Inventors: Tomohiro Yoshihara, Akira Deguchi, Hiroaki Akutsu
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Publication number: 20120278589Abstract: The present invention provides a storage system in which each microprocessor is able to execute synchronous processing and asynchronous processing in accordance with the operating status of the storage system. Any one attribute, from among multiple attributes (operating modes) prepared beforehand, is set in each microprocessor in accordance with the operating status of the storage system. The attribute that is set in each microprocessor is regularly reviewed and changed.Type: ApplicationFiled: June 17, 2010Publication date: November 1, 2012Applicant: HITACHI, LTD.Inventors: Tomohiro Yoshihara, Shintaro Kudo, Norio Shimozono
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Patent number: 8291162Abstract: One code (a compressed redundant code) is created based on a plurality of first redundant codes, each created on the basis of a plurality of data units, and this compressed redundant code is written to a nonvolatile storage area. This compressed redundant code is used to restore either a data element constituting a multiple-failure data, or a first redundant code corresponding to the multiple-failure data, which is stored in an unreadable sub-storage area of a partially failed storage device, and to restore the data element constituting the multiple-failure data which is stored in a sub-storage area of a completely failed storage device, based on the restored either data element or first redundant code, and either another data element constituting the multiple-failure data or the first redundant code corresponding to the multiple-failure data.Type: GrantFiled: September 16, 2011Date of Patent: October 16, 2012Assignee: Hitachi, Ltd.Inventors: Manabu Kitamura, Junji Ogawa, Shunji Kawamura, Takao Sato, Naoto Matsunami, Shintaro Ito, Tomohiro Yoshihara, Takuji Ogawa
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Publication number: 20120011396Abstract: One code (a compressed redundant code) is created based on a plurality of first redundant codes, each created on the basis of a plurality of data units, and this compressed redundant code is written to a nonvolatile storage area. This compressed redundant code is used to restore either a data element constituting a multiple-failure data, or a first redundant code corresponding to the multiple-failure data, which is stored in an unreadable sub-storage area of a partially failed storage device, and to restore the data element constituting the multiple-failure data which is stored in a sub-storage area of a completely failed storage device, based on the restored either data element or first redundant code, and either another data element constituting the multiple-failure data or the first redundant code corresponding to the multiple-failure data.Type: ApplicationFiled: September 16, 2011Publication date: January 12, 2012Inventors: Manabu KITAMURA, Junji Ogawa, Shunji Kawamura, Takao Sato, Naoto Matsunami, Shintaro Ito, Tomohiro Yoshihara, Takuji Ogawa
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Publication number: 20110252262Abstract: In a storage system which includes a plurality of microprocessors, it is desired to prevent delay in I/O responses due to synchronous' processing waiting for asynchronous processing, while still ensuring the throughput of asynchronous processing. In a plurality of microprocessors possessed by a controller, synchronous processors and asynchronous processors are mixed together. The synchronous processors are microprocessors whose duty is to perform synchronous processing and not to perform asynchronous processing. And the asynchronous processors are microprocessors whose duty is to perform asynchronous processing and not to perform synchronous processing.Type: ApplicationFiled: January 9, 2009Publication date: October 13, 2011Inventors: Tomohiro Yoshihara, Sadahiro Sugimoto, Norio Shimozono, Noboru Morishita, Masayuki Yamamoto
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Patent number: 8037245Abstract: One code (a compressed redundant code) is created based on a plurality of first redundant codes, each created on the basis of a plurality of data units, and this compressed redundant code is written to a nonvolatile storage area. This compressed redundant code is used to restore either a data element constituting a multiple-failure data, or a first redundant code corresponding to the multiple-failure data, which is stored in an unreadable sub-storage area of a partially failed storage device, and to restore the data element constituting the multiple-failure data which is stored in a sub-storage area of a completely failed storage device, based on the restored either data element or first redundant code, and either another data element constituting the multiple-failure data or the first redundant code corresponding to the multiple-failure data.Type: GrantFiled: February 6, 2008Date of Patent: October 11, 2011Assignee: Hitachi, Ltd.Inventors: Manabu Kitamura, Junji Ogawa, Shunji Kawamura, Takao Sato, Naoto Matsunami, Shintaro Ito, Tomohiro Yoshihara, Takuji Ogawa
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Publication number: 20090106585Abstract: One code (a compressed redundant code) is created based on a plurality of first redundant codes, each created on the basis of a plurality of data units, and this compressed redundant code is written to a nonvolatile storage area. This compressed redundant code is used to restore either a data element constituting a multiple-failure data, or a first redundant code corresponding to the multiple-failure data, which is stored in an unreadable sub-storage area of a partially failed storage device, and to restore the data element constituting the multiple-failure data which is stored in a sub-storage area of a completely failed storage device, based on the restored either data element or first redundant code, and either another data element constituting the multiple-failure data or the first redundant code corresponding to the multiple-failure data.Type: ApplicationFiled: February 6, 2008Publication date: April 23, 2009Inventors: Manabu Kitamura, Junji Ogawa, Shunji Kawamura, Takao Sato, Naoto Matsunami, Shintaro Ito, Tomohiro Yoshihara, Takuji Ogawa