Patents by Inventor Tomokazu Yokoi

Tomokazu Yokoi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10679017
    Abstract: To provide an authentication system and a semiconductor device utilizing the system. The semiconductor device includes a transmission/reception circuit, a control circuit, an analog-to-digital converter circuit, a memory device, and a fingerprint sensor. At least one of the control circuit, the analog-to-digital converter circuit, and the memory device includes a transistor including an oxide semiconductor in a channel formation region. The control circuit has a function of receiving an instruction signal from the outside of the semiconductor device through the transmission/reception circuit. The memory device has fingerprint data for comparison and confidential information. The control circuit has a function of comparing fingerprint data to be compared which is obtained by the fingerprint sensor and the fingerprint data for comparison.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: June 9, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomokazu Yokoi, Masayuki Sakakura
  • Patent number: 10192990
    Abstract: A transistor which includes an oxide semiconductor and is capable of high-speed operation and a method of manufacturing the transistor. In addition, a highly reliable semiconductor device including the transistor and a method of manufacturing the semiconductor device. The semiconductor device includes an oxide semiconductor layer including a channel formation region, and a source and drain regions which are provided so that the channel formation region is interposed therebetween and have lower resistance than the channel formation region. The channel formation region and the source and drain regions each include a crystalline region.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: January 29, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomokazu Yokoi, Yasumasa Yamane
  • Publication number: 20180129831
    Abstract: To provide an authentication system and a semiconductor device utilizing the system. The semiconductor device includes a transmission/reception circuit, a control circuit, an analog-to-digital converter circuit, a memory device, and a fingerprint sensor. At least one of the control circuit, the analog-to-digital converter circuit, and the memory device includes a transistor including an oxide semiconductor in a channel formation region. The control circuit has a function of receiving an instruction signal from the outside of the semiconductor device through the transmission/reception circuit. The memory device has fingerprint data for comparison and confidential information. The control circuit has a function of comparing fingerprint data to be compared which is obtained by the fingerprint sensor and the fingerprint data for comparison.
    Type: Application
    Filed: April 11, 2016
    Publication date: May 10, 2018
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomokazu Yokoi, Masayuki Sakakura
  • Patent number: 9741400
    Abstract: A semiconductor device or a memory device with a reduced area, a large storage capacity, a high-speed operation, or low power consumption is provided. The semiconductor device includes a first transistor, a second transistor, a capacitor, a first wiring, a second wiring, a sense amplifier circuit, a decoder, a step-up circuit, a level shifter, and a buffer circuit. The first wiring is electrically connected to the buffer circuit and a second gate electrode of the first transistor. The second wiring is electrically connected to the sense amplifier circuit and the drain electrode of the second transistor. The capacitor is electrically connected to the drain electrode of the first transistor and the source electrode of the second transistor.
    Type: Grant
    Filed: November 2, 2016
    Date of Patent: August 22, 2017
    Assignee: Semiconductor Energy Laboratory Co., LTD.
    Inventors: Shuhei Nagatsuka, Tomokazu Yokoi, Naoaki Tsutsui, Kazuaki Ohshima, Tatsuya Onuki
  • Publication number: 20170133064
    Abstract: A semiconductor device or a memory device with a reduced area, a large storage capacity, a high-speed operation, or low power consumption is provided. The semiconductor device includes a first transistor, a second transistor, a capacitor, a first wiring, a second wiring, a sense amplifier circuit, a decoder, a step-up circuit, a level shifter, and a buffer circuit. The first wiring is electrically connected to the buffer circuit and a second gate electrode of the first transistor. The second wiring is electrically connected to the sense amplifier circuit and the drain electrode of the second transistor. The capacitor is electrically connected to the drain electrode of the first transistor and the source electrode of the second transistor.
    Type: Application
    Filed: November 2, 2016
    Publication date: May 11, 2017
    Inventors: Shuhei NAGATSUKA, Tomokazu YOKOI, Naoaki TSUTSUI, Kazuaki OHSHIMA, Tatsuya ONUKI
  • Patent number: 9647152
    Abstract: A sensor circuit includes a transistor comprising an oxide semiconductor; a first circuit which supplies one of a first potential and a second potential; a first switch; a second switch; and a second circuit to which a current flowing between a source and a drain of the transistor is applied via the second switch when the first potential is applied to a gate of the transistor. The first potential is lower than a potential of the source or a potential of the drain of the transistor, and the second potential is higher than the potential of the source or the potential of the drain of the transistor. The first switch electrically connects the source and the drain of the transistor when the second potential is applied to the gate of the transistor, and electrically isolates them when the first potential is applied to the gate of the transistor.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: May 9, 2017
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Jun Koyama, Tomokazu Yokoi, Tsutomu Murakawa
  • Patent number: 9035304
    Abstract: The contact resistance between an oxide semiconductor film and a metal film is reduced. A transistor that uses an oxide semiconductor film and has excellent on-state characteristics is provided. A semiconductor device capable of high-speed operation is provided. In a transistor that uses an oxide semiconductor film, the oxide semiconductor film is subjected to nitrogen plasma treatment. Thus, part of oxygen included in the oxide semiconductor film is replaced with nitrogen, so that an oxynitride region is formed. A metal film is formed in contact with the oxynitride region. The oxynitride region has lower resistance than the other region of the oxide semiconductor film. In addition, the oxynitride region is unlikely to form high-resistance metal oxide at the interface with the contacting metal film.
    Type: Grant
    Filed: August 5, 2014
    Date of Patent: May 19, 2015
    Inventors: Junichi Koezuka, Shinji Ohno, Yuichi Sato, Sachiaki Tezuka, Tomokazu Yokoi, Yusuke Shino
  • Publication number: 20150091008
    Abstract: A transistor which includes an oxide semiconductor and is capable of high-speed operation and a method of manufacturing the transistor. In addition, a highly reliable semiconductor device including the transistor and a method of manufacturing the semiconductor device. The semiconductor device includes an oxide semiconductor layer including a channel formation region, and a source and drain regions which are provided so that the channel formation region is interposed therebetween and have lower resistance than the channel formation region. The channel formation region and the source and drain regions each include a crystalline region.
    Type: Application
    Filed: December 11, 2014
    Publication date: April 2, 2015
    Inventors: Tomokazu YOKOI, Yasumasa YAMANE
  • Patent number: 8969866
    Abstract: Provided is a structure to obtain a reliable electrical contact through a narrow contact hole formed in an insulating layer, which is required in the miniaturization of a semiconductor device. An exemplified structure includes a thin film transistor comprising: a lower electrode over and in contact with a semiconductor layer, the lower electrode comprising a metal or a metal compound; an insulating layer over the lower electrode, the insulating layer having a contact hole reaching the lower electrode; a conductive silicon whisker grown from a surface of the lower electrode; and an upper electrode over the insulating layer and in contact with the conductive silicon whisker. The ability of the conductive silicon whisker grown from the lower electrode to ohmically contact with the lower and upper electrodes leads to a reliable electrical contact between the thin film transistor and a wiring.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: March 3, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomokazu Yokoi, Kensuke Yoshizumi
  • Patent number: 8956934
    Abstract: An object is to provide a thin film transistor with small off current, large on current, and high field-effect mobility. A silicon nitride layer and a silicon oxide layer which is formed by oxidizing the silicon nitride layer are stacked as a gate insulating layer, and crystals grow from an interface of the silicon oxide layer of the gate insulating layer to form a microcrystalline semiconductor layer; thus, an inverted staggered thin film transistor is manufactured. Since crystals grow from the gate insulating layer, the thin film transistor can have a high crystallinity, large on current, and high field-effect mobility. In addition, a buffer layer is provided to reduce off current.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: February 17, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Miyako Nakajima, Hidekazu Miyairi, Toshiyuki Isa, Erika Kato, Mitsuhiro Ichijo, Kazutaka Kuriki, Tomokazu Yokoi
  • Patent number: 8946790
    Abstract: A transistor which includes an oxide semiconductor and is capable of high-speed operation and a method of manufacturing the transistor. In addition, a highly reliable semiconductor device including the transistor and a method of manufacturing the semiconductor device. The semiconductor device includes an oxide semiconductor layer including a channel formation region, and a source and drain regions which are provided so that the channel formation region is interposed therebetween and have lower resistance than the channel formation region. The channel formation region and the source and drain regions each include a crystalline region.
    Type: Grant
    Filed: June 5, 2012
    Date of Patent: February 3, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomokazu Yokoi, Yasumasa Yamane
  • Patent number: 8895388
    Abstract: An object is to provide a technique for manufacturing an insulating layer with favorable withstand voltage. Another object is to provide a technique for manufacturing a semiconductor device having an insulating layer with favorable withstand voltage. By subjecting a semiconductor layer or semiconductor substrate mainly containing silicon to a high density plasma treatment, an insulating layer is formed on a surface of the semiconductor layer or a top surface of the semiconductor substrate. At this time, the high density plasma treatment is performed by switching a supply gas in the middle of the treatment from a gas containing a rare gas, oxygen, and hydrogen, to a gas containing a rare gas and oxygen.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: November 25, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuya Kakehata, Tomokazu Yokoi
  • Publication number: 20140342499
    Abstract: The contact resistance between an oxide semiconductor film and a metal film is reduced. A transistor that uses an oxide semiconductor film and has excellent on-state characteristics is provided. A semiconductor device capable of high-speed operation is provided. In a transistor that uses an oxide semiconductor film, the oxide semiconductor film is subjected to nitrogen plasma treatment. Thus, part of oxygen included in the oxide semiconductor film is replaced with nitrogen, so that an oxynitride region is formed. A metal film is formed in contact with the oxynitride region. The oxynitride region has lower resistance than the other region of the oxide semiconductor film. In addition, the oxynitride region is unlikely to form high-resistance metal oxide at the interface with the contacting metal film.
    Type: Application
    Filed: August 5, 2014
    Publication date: November 20, 2014
    Inventors: Junichi KOEZUKA, Shinji OHNO, Yuichi SATO, Sachiaki TEZUKA, Tomokazu YOKOI, Yusuke SHINO
  • Patent number: 8835048
    Abstract: An electrode for a power storage device with less deterioration due to charge and discharge and a power storage device using the electrode are provided. In the electrode for a power storage device and the power storage device, a region including a metal element which functions as a catalyst is selectively provided over a current collector, and then, an active material layer is formed. By selectively providing the region including the metal element, a whisker can be effectively generated in the active material layer over the current collector, and the whisker generation region can be controlled. Accordingly, the discharge capacity can be increased and the cycle characteristics can be improved.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: September 16, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kazutaka Kuriki, Kiyofumi Ogino, Tomokazu Yokoi, Makoto Ishikawa, Toshihiko Takeuchi
  • Publication number: 20140246667
    Abstract: A sensor circuit includes a transistor comprising an oxide semiconductor; a first circuit which supplies one of a first potential and a second potential; a first switch; a second switch; and a second circuit to which a current flowing between a source and a drain of the transistor is applied via the second switch when the first potential is applied to a gate of the transistor. The first potential is lower than a potential of the source or a potential of the drain of the transistor, and the second potential is higher than the potential of the source or the potential of the drain of the transistor. The first switch electrically connects the source and the drain of the transistor when the second potential is applied to the gate of the transistor, and electrically isolates them when the first potential is applied to the gate of the transistor.
    Type: Application
    Filed: February 26, 2014
    Publication date: September 4, 2014
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Jun KOYAMA, Tomokazu Yokoi, Tsutomu Murakawa
  • Patent number: 8821601
    Abstract: A hydrogen generating element which can supply hydrogen efficiently and stably, is safe, and has low environmental load is provided. Further, a hydrogen generation device to which the hydrogen generating element is applied is provided. Furthermore, a power generation device and a driving device to each of which the hydrogen generation device is applied are provided. A hydrogen generating element in which a needle-like or dome-like silicon microstructure is formed over a base may be used and reacted with water, whereby hydrogen is efficiently generated. The hydrogen generating element may be applied to a hydrogen generation device. The hydrogen generation device may be applied to a power generation device and a driving device.
    Type: Grant
    Filed: January 9, 2012
    Date of Patent: September 2, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomokazu Yokoi, Shuhei Yoshitomi, Kensuke Yoshizumi
  • Patent number: 8802493
    Abstract: The contact resistance between an oxide semiconductor film and a metal film is reduced. A transistor that uses an oxide semiconductor film and has excellent on-state characteristics is provided. A semiconductor device capable of high-speed operation is provided. In a transistor that uses an oxide semiconductor film, the oxide semiconductor film is subjected to nitrogen plasma treatment. Thus, part of oxygen included in the oxide semiconductor film is replaced with nitrogen, so that an oxynitride region is formed. A metal film is formed in contact with the oxynitride region. The oxynitride region has lower resistance than the other region of the oxide semiconductor film. In addition, the oxynitride region is unlikely to form high-resistance metal oxide at the interface with the contacting metal film.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: August 12, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Shinji Ohno, Yuichi Sato, Sachiaki Tezuka, Tomokazu Yokoi, Yusuke Shino
  • Patent number: 8785766
    Abstract: A novel photoelectric conversion device in which energy of light can be effectively utilized and performance can be improved is provided. A photoelectric conversion device includes a photoelectric conversion element and an energy conversion layer provided on a light-receiving side of a photoelectric conversion layer included in the photoelectric conversion element. The energy conversion layer includes a plurality of first layers and a plurality of second layers. The first layer and the second layer are alternately stacked. The thickness of the first layer is greater than or equal to 0.5 nm and less than or equal to 10 nm, and the thickness of the second layer is greater than or equal to 0.5 nm and less than or equal to 10 nm. The second layer can be formed using a material having a larger energy band gap than that of a material used for the first layer.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: July 22, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshinobu Asami, Tomokazu Yokoi
  • Patent number: 8643182
    Abstract: Provided are a semiconductor film including silicon microstructures formed at high density, and a manufacturing method thereof. Further, provided are a semiconductor film including silicon microstructures whose density is controlled, and a manufacturing method thereof. Furthermore, a power storage device with improved charge-discharge capacity is provided. A manufacturing method in which a semiconductor film with a silicon layer including silicon structures is formed over a substrate with a metal surface is used. The thickness of a silicide layer formed by reaction between the metal and the silicon is controlled, so that the grain sizes of silicide grains formed at an interface between the silicide layer and the silicon layer are controlled and the shapes of the silicon structures are controlled. Such a semiconductor film can be applied to an electrode of a power storage device.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: February 4, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomokazu Yokoi, Takayuki Inoue, Makoto Furuno
  • Patent number: 8569120
    Abstract: An object is to provide a method for manufacturing a thin film transistor having favorable electric characteristics, with high productivity. A gate electrode is formed over a substrate and a gate insulating layer is formed over the gate electrode. A first semiconductor layer is formed over the gate insulating layer by generating plasma using a deposition gas containing silicon or germanium, hydrogen, and a rare gas. Next, a second semiconductor layer including an amorphous semiconductor and a microcrystal semiconductor is formed in such a manner that the first semiconductor layer is partially grown as a seed crystal by generating plasma using a deposition gas containing silicon or germanium, hydrogen, and a gas containing nitrogen. Then, a semiconductor layer to which an impurity imparting one conductivity is added is formed and a conductive film is formed. Thus, a thin film transistor is manufactured.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: October 29, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Erika Takahashi, Takayuki Kato, Hidekazu Miyairi, Yasuhiro Jinbo, Mitsuhiro Ichijo, Tomokazu Yokoi