Patents by Inventor Tomoko Higashino

Tomoko Higashino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070037321
    Abstract: The semiconductor device having the structure which laminated the chip in many stages is made thin. A reforming area is formed by irradiating a laser beam, where a condensing point is put together with the inside of the semiconductor substrate of a semiconductor wafer. Then, after applying the binding material of liquid state to the back surface of a semiconductor wafer by a spin coating method, this is dried and a solid-like adhesive layer is formed. Then, a semiconductor wafer is divided into each semiconductor chip by making the above-mentioned reforming area into a division origin. By pasting up this semiconductor chip on the main surface of an other semiconductor chip by the adhesive layer of the back surface, the semiconductor device having the structure for which the semiconductor chip was laminated by many stages is manufactured.
    Type: Application
    Filed: August 9, 2006
    Publication date: February 15, 2007
    Inventors: Tomoko Higashino, Chuichi Miyazaki, Yoshiyuki Abe
  • Patent number: 7148081
    Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked on a mounting substrate, an adhesive material formed of resin mainly having a thermosetting property is applied to a semiconductor chip mounting region on the mounting substrate. After mounting semiconductor chips on the adhesive material, the adhesive material is cured by heat treatment. When these parts are naturally cooled to a normal temperature, the mounting substrate warps in a convex shape due to the difference in an ? value between the mounting substrate and the semiconductor chip. However, pads are connected by wire bonding and, an adhesive material formed of resin having a thermoplastic property is laminated to the semiconductor chip. Then, a spacer chip is bonded to the adhesive material by thermal compression bonding. Accordingly, due to heat generated at the time of thermal compression bonding, the mounting substrate and the semiconductor chip become substantially flat.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: December 12, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Tomoko Higashino, Kazunari Suzuki, Chuichi Miyazaki
  • Patent number: 6916686
    Abstract: A contact collect is provided to prevent damage to the top surface of a semiconductor chip at the time of die bonding the semiconductor chip. A protection tape is pasted to the top surface of the semiconductor chip before die bonding of the semiconductor chip is executed by pressing the back surface (underside) of the semiconductor chip sucked and securely held by the contact collect against respective chip-mounting regions of a multi-wiring board. The contact collect is, for example, substantially cylidrical in outside shape, and a bottom part (suction head) thereof is made of soft synthetic rubber, etc. The protection tape pasted to the top surface of the semiconductor chip prevents the top surface of the semiconductor chip from directly contacting with the contact collect even at the time of vacuum suction by pressing the suction head of the contact collect against the top surface of the semiconductor chip.
    Type: Grant
    Filed: January 15, 2003
    Date of Patent: July 12, 2005
    Assignees: Renesas Technology Corporation, Hitachi ULSI Systems Co., Ltd.
    Inventors: Takashi Wada, Kazunari Suzuki, Chuichi Miyazaki, Toshihiro Shiotsuki, Tomoko Higashino
  • Publication number: 20040241907
    Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked on a mounting substrate, an adhesive material formed of resin mainly having a thermosetting property is applied to a semiconductor chip mounting region on the mounting substrate. After mounting semiconductor chips on the adhesive material, the adhesive material is cured by heat treatment. When these parts are naturally cooled to a normal temperature, the mounting substrate warps in a convex shape due to the difference in an &agr; value between the mounting substrate and the semiconductor chip. However, pads are connected by wire bonding and, an adhesive material formed of resin having a thermoplastic property is laminated to the semiconductor chip. Then, a spacer chip is bonded to the adhesive material by thermal compression bonding. Accordingly, due to heat generated at the time of thermal compression bonding, the mounting substrate and the semiconductor chip become substantially flat.
    Type: Application
    Filed: May 28, 2004
    Publication date: December 2, 2004
    Inventors: Tomoko Higashino, Kazunari Suzuki, Chuichi Miyazaki
  • Patent number: 6750080
    Abstract: Two semiconductor chips are bonded to each other with the rear surfaces of the respective semiconductor chips faced to each other, so that two longer sides of the semiconductor chips may confront the side of leads, and supporting leads are bonded and fixed onto the circuit forming surface of one of the semiconductor chips. The semiconductor chips are further bonded to each other in a state where the positions of the respective semiconductor chips are staggered relative to each other so that electrodes of one semiconductor chip may lie outside the other longer side of the other semiconductor chip, and that electrodes of the second semiconductor chip may lie outside the other longer side of the first semiconductor chip.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: June 15, 2004
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Masachika Masuda, Tamaki Wada, Michiaki Sugiyama, Tomoko Higashino, Takafumi Nishita, Hiroshi Ohno
  • Publication number: 20030153127
    Abstract: Techniques are provided for preventing occurrence of damage to the top surface of a semiconductor chip at the time of die bonding the semiconductor chip by use of a contact collet. A protection tape is pasted to the top surface of the semiconductor chip before die bonding of the semiconductor chip is executed by pressing the back surface (underside) of the semiconductor chip sucked and securely held by the contact collect against respective chip-mounting regions of a multi-wiring board. The contact collect is, for example, substantially cylindrical in outside shape, and a bottom part (suction head) thereof is made of a soft synthetic rubber, and so forth. The protection tape pasted to pasted to the top surface of the semiconductor chip can prevent the top surface of the semiconductor chip from coming in direct contact with the contact collet even at the time of vacuum suction by pressing the suction head of the contact collect against the top surface of the semiconductor chip.
    Type: Application
    Filed: January 15, 2003
    Publication date: August 14, 2003
    Applicant: Hitachi, Ltd. Hitachi ULSI Systems Co., Ltd.
    Inventors: Takashi Wada, Kazunari Suzuki, Chuichi Miyazaki, Toshihiro Shiotsuki, Tomoko Higashino
  • Publication number: 20030122262
    Abstract: Semiconductor chips (4), (5) are bonded and fixed to each other in a state where the rear surfaces of the respective semiconductor chips are faced to each other so that the other longer latus (4A2) of the semiconductor chip (4) and one longer latus (5A1) of the semiconductor chip (5) may confront the side of leads (10B), and supporting leads (8) are bonded and fixed onto the circuit forming surface (4A) of the semiconductor chip (4) or the circuit forming surface (5A) of the semiconductor chip (5). Owing to such a construction, the structure of a semiconductor device can be thinned.
    Type: Application
    Filed: February 25, 2003
    Publication date: July 3, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Masachika Masuda, Tamaki Wada, Michiaki Sugiyama, Tomoko Higashino, Takafumi Nishita, Hiroshi Ohno
  • Patent number: 6552437
    Abstract: Semiconductor chips (4), (5) are bonded and fixed to each other in a state where the rear surfaces of the respective semiconductor chips are faced to each other so that the other longer latus (4A2) of the semiconductor chip (4) and one longer latus (5A1) of the semiconductor chip (5) may confront the side of leads (10B), and supporting leads (8) are bonded and fixed onto the circuit forming surface (4A) of the semiconductor chip (4) or the circuit forming surface (5A) of the semiconductor chip (5). Owing to such a construction, the structure of a semiconductor device can be thinned.
    Type: Grant
    Filed: April 6, 2001
    Date of Patent: April 22, 2003
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Masachika Masuda, Tamaki Wada, Michiaki Sugiyama, Tomoko Higashino, Takafumi Nishita, Hiroshi Ohno
  • Patent number: 6445076
    Abstract: An insulating adhesive for electronic parts, which is to be used for bonding a semiconductor chip to a lead frame and comprises a resin and a solvent, the resin having (A) a weight average molecular weight (Mw) of 30,000 to 300,000 based on conversion into polystyrene and (B) a ratio of weight average molecular weight (Mw)/number average molecular weight (Mn) of 5 or less, and (C) the insulating adhesive for electronic parts having a viscosity of 5,000 to 100,000 mPa.s at a rotation number of 10 rpm and a viscosity ratio (&eegr;1 rpm/&eegr;10 rpm) of 1.0 to 6.0 as measured at 25° C. with an E-type viscometer.
    Type: Grant
    Filed: November 16, 2000
    Date of Patent: September 3, 2002
    Assignees: Hitachi Chemical Company, Ltd., Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Takehiro Shimizu, Takafumi Dohdoh, Kazumi Tameshige, Hidekazu Matsuura, Yoshihiro Nomura, Kunihiro Tsubosaki, Toshihiro Shiotsuki, Kazunari Suzuki, Tomoko Higashino