Patents by Inventor Tomoko Tamura
Tomoko Tamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7534702Abstract: An efficient mass-production method of very small devices that can receive or transmit data in touch, preferably, out of touch is provided by forming an integrated circuit made of a thin film over a large glass substrate and transferring the integrated circuit to another backing to be divided. Especially, the integrated circuit made of a thin film is difficult to use since there is a threat that the integrated circuit is scattered in the handling of the integrated circuit since the integrated circuit is extremely thin. According to the present invention, multiple openings reaching a peel layer are provided, a material body having a pattern shape that does not cover regions (the openings and a device portion) is provided, and then, a gas or liquid containing fluorine halide is introduced to partially remove the peel layer.Type: GrantFiled: June 21, 2005Date of Patent: May 19, 2009Inventors: Tatsuya Arao, Yoshitaka Dozen, Daiki Yamada, Eiji Sugiyama, Tomoko Tamura, Junya Maruyama, Nozomi Horikoshi, Yuugo Goto
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Patent number: 7504317Abstract: It is an object to provide a manufacturing method of a semiconductor device with high reliability. A plurality of first semiconductor integrated circuits, a plurality of second semiconductor integrated circuits each of which is arranged to be adjacent to one of the first semiconductor integrated circuits, a plurality of third semiconductor integrated circuits each of which is arranged to be adjacent to one of the first semiconductor integrated circuits and one of the second semiconductor integrated circuits, and a plurality of fourth semiconductor integrated circuits each of which is arranged to be adjacent to one of the first semiconductor integrated circuits, one of the second semiconductor integrated circuits, and one of the third semiconductor integrated circuits are formed over a first substrate. The first semiconductor integrated circuits are transferred to a second substrate.Type: GrantFiled: November 16, 2006Date of Patent: March 17, 2009Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Tomoyuki Aoki, Tomoko Tamura, Takuya Tsurume, Koji Dairiki
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Publication number: 20090050964Abstract: Application form of and demand for an IC chip formed with a silicon wafer are expected to increase, and further reduction in cost is required. An object of the invention is to provide a structure of an IC chip and a process capable of producing at a lower cost. A feature of the invention is to use a metal film and a reactant having the metal film as a separation layer. An etching rate of the metal film or the reactant having metal is high, and a physical means in addition to a chemical means of etching the metal film or the reactant having metal can be used in the invention. Thus, the IDF chip can be manufactured more simply and easily in a short time.Type: ApplicationFiled: October 21, 2008Publication date: February 26, 2009Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yoshitaka DOZEN, Tomoko TAMURA, Takuya TSURUME, Koji DAIRIKI
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Patent number: 7482248Abstract: A manufacturing method of a semiconductor device at low cost with high reliability, wherein a semiconductor device is manufactured by peeling an element forming layer having a thin film transistor and the like provided over a substrate from the substrate. A metal film is formed on a substrate, plasma treatment is applied thereto to form a metal oxide film on the metal film, an element forming layer is formed on the metal oxide film, an insulating film is formed to cover the element forming layer, an opening is formed in the insulating film and the element forming layer, an etchant is injected through the opening to remove the insulating film and the element forming layer, and the element forming layer is peeled off the substrate. The peeling may be performed by removing the metal film and the metal oxide film partially and then employing a physical means.Type: GrantFiled: November 16, 2005Date of Patent: January 27, 2009Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Tomoko Tamura
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Patent number: 7465674Abstract: An object of the present invention is to provide a method for manufacturing a semiconductor device with high reliability, at low cost, in which an element forming layer having a thin film transistor and the like provided over a substrate is peeled from the substrate, so that a semiconductor device is manufactured. According to the invention, a metal film is formed over a substrate, a plasma treatment is performed to the metal film in a dinitrogen monoxide atmosphere to form a metal oxide film over the metal film, a first insulating film is formed continuously without being exposed to the air, an element forming layer is formed over the first insulating film, and the element forming layer is peeled from the substrate, so that a semiconductor device is manufactured.Type: GrantFiled: May 22, 2006Date of Patent: December 16, 2008Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Tomoko Tamura, Kaori Ogita, Koji Dairiki, Junya Maruyama
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Patent number: 7452786Abstract: Application form of and demand for an IC chip formed with a silicon wafer are expected to increase, and further reduction in cost is required. An object of the invention is to provide a structure of an IC chip and a process capable of producing at a lower cost. A feature of the invention is to use a metal film and a reactant having the metal film as a separation layer. An etching rate of the metal film or the reactant having metal is high, and a physical means in addition to a chemical means of etching the metal film or the reactant having metal can be used in the invention. Thus, the IDF chip can be manufactured more simply and easily in a short time.Type: GrantFiled: June 14, 2005Date of Patent: November 18, 2008Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshitaka Dozen, Tomoko Tamura, Takuya Tsurume, Koji Dairiki
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Publication number: 20080093464Abstract: It is an object of the present invention to reduce the cost of a wireless chip, further, to reduce the cost of a wireless chip by enabling the mass production of a wireless chip, and furthermore, to provide a downsized and lightweight wireless chip. A wireless chip in which a thin film integrated circuit peeled from a glass substrate or a quartz substrate is formed between a first base material and a second base material is provided according to the invention. As compared with a wireless chip formed from a silicon substrate, the wireless chip according to the invention realizes downsizing, thinness, and lightweight. The thin film integrated circuit included in the wireless chip according to the invention at least has an n-type thin film transistor having an LDD (Lightly Doped Drain) structure, a p-type thin film transistor having a single drain structure, and a conductive layer functioning as an antenna.Type: ApplicationFiled: August 10, 2005Publication date: April 24, 2008Applicant: c/o Semiconductor Energy Laboratory Co., Ltd.Inventors: Koji Dairiki, Junya Maruyama, Tomoko Tamura, Eiji Sugiyama, Yoshitaka Dozen
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Publication number: 20070292997Abstract: It is an object of the present invention to provide a method for manufacturing a semiconductor device, capable of keeping a peeling layer from being peeled from a substrate in the phase before the completion of a semiconductor element and peeling a semiconductor element rapidly. It is considered that a peeling layer tends to be peeled from a substrate because the stress is applied to a peeling layer due to the difference in thermal expansion coefficient between a substrate and a peeling layer, or because the volume of a peeling layer is reduced and thus the stress is applied thereto by crystallization of the peeling layer due to heat treatment. Therefore, according to one feature of the invention, the adhesion of a substrate and a peeling layer is enhanced by forming an insulating film (buffer film) for relieving the stress on the peeling layer between the substrate and the peeling layer before forming the peeling layer over the substrate.Type: ApplicationFiled: August 9, 2007Publication date: December 20, 2007Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junya Maruyama, Atsuo Isobe, Susumu Okazaki, Koichiro Tanaka, Yoshiaki Yamamoto, Koji Dairiki, Tomoko Tamura
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Patent number: 7282380Abstract: It is an object of the present invention to provide a method for manufacturing a semiconductor device, capable of keeping a peeling layer from being peeled from a substrate in the phase before the completion of a semiconductor element and peeling a semiconductor element rapidly. It is considered that a peeling layer tends to be peeled from a substrate because the stress is applied to a peeling layer due to the difference in thermal expansion coefficient between a substrate and a peeling layer, or because the volume of a peeling layer is reduced and thus the stress is applied thereto by crystallization of the peeling layer due to heat treatment. Therefore, according to one feature of the invention, the adhesion of a substrate and a peeling layer is enhanced by forming an insulating film (buffer film) for relieving the stress on the peeling layer between the substrate and the peeling layer before forming the peeling layer over the substrate.Type: GrantFiled: March 15, 2005Date of Patent: October 16, 2007Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junya Maruyama, Atsuo Isobe, Susumu Okazaki, Koichiro Tanaka, Yoshiaki Yamamoto, Koji Dairiki, Tomoko Tamura
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Publication number: 20070196999Abstract: A release layer formed over a substrate; at least one of thin film integrated circuits is formed over the release layer; a film is formed over each of the at least one of thin film integrated circuits; and the release layer is removed by using an etchant; thus, the at least one of thin film integrated circuits is peeled from the substrate. A semiconductor device is formed by sealing the peeled thin film integrated circuit by lamination or the like.Type: ApplicationFiled: July 28, 2005Publication date: August 23, 2007Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Tomoko Tamura, Eiji Sugiyama, Yoshitaka Dozen, Koji Dairiki, Takuya Tsurume
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Publication number: 20070128747Abstract: First semiconductor integrated circuits and second semiconductor integrated circuits arranged over a first substrate so that each of the second semiconductor integrated circuits is adjacent to one of the first semiconductor integrated circuits are transferred to additional substrates through multiple transfer operations. After the first semiconductor integrated circuits and the second semiconductor integrated circuits formed over the first substrate are transferred to the additional substrates (a fourth substrate and a fifth substrate) respectively, the circuits are divided into a semiconductor device corresponding to each semiconductor integrated circuit. The first semiconductor integrated circuits are arranged while keeping a distance from each other over the fourth substrate, and the second semiconductor integrated circuits are arranged while keeping a distance from each other over the fifth substrate. Thus, a large division margin of each of the fourth substrate and the fifth substrate can be obtained.Type: ApplicationFiled: November 21, 2006Publication date: June 7, 2007Inventors: Tomoko Tamura, Tomoyuki Aoki, Takuya Tsurume, Koji Dairiki
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Publication number: 20070128833Abstract: It is an object to provide a manufacturing method of a semiconductor device with high reliability. A plurality of first semiconductor integrated circuits, a plurality of second semiconductor integrated circuits each of which is arranged to be adjacent to one of the first semiconductor integrated circuits, a plurality of third semiconductor integrated circuits each of which is arranged to be adjacent to one of the first semiconductor integrated circuits and one of the second semiconductor integrated circuits, and a plurality of fourth semiconductor integrated circuits each of which is arranged to be adjacent to one of the first semiconductor integrated circuits, one of the second semiconductor integrated circuits, and one of the third semiconductor integrated circuits are formed over a first substrate. The first semiconductor integrated circuits are transferred to a second substrate.Type: ApplicationFiled: November 16, 2006Publication date: June 7, 2007Inventors: Tomoyuki Aoki, Tomoko Tamura, Takuya Tsurume, Koji Dairiki
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Publication number: 20060266410Abstract: The present invention provides a manufacturing method of a thinned semiconductor device with high reliability at low cost and a semiconductor device manufactured by the method. A peeling layer, a transistor, and an insulating layer are formed in this order over a substrate, an opening is formed so as to expose at least a part of the peeling layer, and the transistor is peeled off from the substrate by a physical means. The peeling layer is formed by forming a metal film and a metal oxide film so as to be in contact with the metal film by a method using a solution.Type: ApplicationFiled: May 4, 2006Publication date: November 30, 2006Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kaori Ogita, Tomoko Tamura, Junya Maruyama, Koji Dairiki
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Publication number: 20060270191Abstract: An object of the present invention is to provide a method for manufacturing a semiconductor device with high reliability, at low cost, in which an element forming layer having a thin film transistor and the like provided over a substrate is peeled from the substrate, so that a semiconductor device is manufactured. According to the invention, a metal film is formed over a substrate, a plasma treatment is performed to the metal film in a dinitrogen monoxide atmosphere to form a metal oxide film over the metal film, a first insulating film is formed continuously without being exposed to the air, an element forming layer is formed over the first insulating film, and the element forming layer is peeled from the substrate, so that a semiconductor device is manufactured.Type: ApplicationFiled: May 22, 2006Publication date: November 30, 2006Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Tomoko Tamura, Kaori Ogita, Koji Dairiki, Junya Maruyama
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Publication number: 20060270189Abstract: To simplify a peeling step in a method for manufacturing a semiconductor device including the peeling step. A first layer having a metal film is formed over a substrate; a second layer having a transistor is formed over the first layer having the metal film; a resin material is applied over the layer having the transistor; the resin material is cured by a heat treatment at a first heat treatment temperature to form a resin layer; the layer having the transistor is peeled from the substrate by a heat treatment at a second heat treatment temperature which is higher than the first heat treatment temperature; and the resin layer is peeled from the layer having the transistor by a heat treatment at a third heat treatment temperature which is higher than the second heat treatment temperature.Type: ApplicationFiled: May 30, 2006Publication date: November 30, 2006Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kaori Ogita, Tomoko Tamura
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Publication number: 20060121694Abstract: A manufacturing method of a semiconductor device at low cost with high reliability, wherein a semiconductor device is manufactured by peeling an element forming layer having a thin film transistor and the like provided over a substrate from the substrate. A metal film is formed on a substrate, plasma treatment is applied thereto to form a metal oxide film on the metal film, an element forming layer is formed on the metal oxide film, an insulating film is formed to cover the element forming layer, an opening is formed in the insulating film and the element forming layer, an etchant is injected through the opening to remove the insulating film and the element forming layer, and the element forming layer is peeled off the substrate. The peeling may be performed by removing the metal film and the metal oxide film partially and then employing a physical means.Type: ApplicationFiled: November 16, 2005Publication date: June 8, 2006Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventor: Tomoko Tamura
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Publication number: 20050285231Abstract: An efficient mass-production method of very small devices that can receive or transmit data in touch, preferably, out of touch is provided by forming an integrated circuit made of a thin film over a large glass substrate and transferring the integrated circuit to another backing to be divided. Especially, the integrated circuit made of a thin film is difficult to use since there is a threat that the integrated circuit is flied in all directions as the integrated circuit is extremely thin. According to the present invention, multiple holes or grooves reaching the peel layer are provided, and a material body having a pattern shape that does not cover the holes (or grooves) and the device portion is provided, then, gas or liquid containing fluorine halide is introduced to remove selectively the peel layer.Type: ApplicationFiled: June 21, 2005Publication date: December 29, 2005Inventors: Tatsuya Arao, Yoshitaka Dozen, Daiki Yamada, Eiji Sugiyama, Tomoko Tamura, Junya Maruyama, Nozomi Horikoshi, Yuugo Goto
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Publication number: 20050287846Abstract: Application form of and demand for an IC chip formed with a silicon wafer are expected to increase, and further reduction in cost is required. An object of the invention is to provide a structure of an IC chip and a process capable of producing at a lower cost. A feature of the invention is to use a metal film and a reactant having the metal film as a separation layer. An etching rate of the metal film or the reactant having metal is high, and a physical means in addition to a chemical means of etching the metal film or the reactant having metal can be used in the invention. Thus, the IDF chip can be manufactured more simply and easily in a short time.Type: ApplicationFiled: June 14, 2005Publication date: December 29, 2005Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshitaka Dozen, Tomoko Tamura, Takuya Tsurume, Koji Dairiki
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Publication number: 20050214984Abstract: It is an object of the present invention to provide a method for manufacturing a semiconductor device, capable of keeping a peeling layer from being peeled from a substrate in the phase before the completion of a semiconductor element and peeling a semiconductor element rapidly. It is considered that a peeling layer tends to be peeled from a substrate because the stress is applied to a peeling layer due to the difference in thermal expansion coefficient between a substrate and a peeling layer, or because the volume of a peeling layer is reduced and thus the stress is applied thereto by crystallization of the peeling layer due to heat treatment. Therefore, according to one feature of the invention, the adhesion of a substrate and a peeling layer is enhanced by forming an insulating film (buffer film) for relieving the stress on the peeling layer between the substrate and the peeling layer before forming the peeling layer over the substrate.Type: ApplicationFiled: March 15, 2005Publication date: September 29, 2005Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junya Maruyama, Atsuo Isobe, Susumu Okazaki, Koichiro Tanaka, Yoshiaki Yamamoto, Koji Dairiki, Tomoko Tamura
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Patent number: 5869536Abstract: A pharmaceutical composition for treating hyperkinetic disorders, which contains as an active ingredient an effective amount of 2-(4-methylamino butoxy)diphenylmethane, is provided. A method of treating hyperkinetic disorders with said pharmaceutical composition and use of said diphenylmethane for preparing said composition are also provided.Type: GrantFiled: July 11, 1995Date of Patent: February 9, 1999Assignee: Mitsubishi Chemical CorporationInventors: Akihiro Tobe, Tadashi Tanaka, Tomoko Tamura