Abstract: A semiconductor device including: a first semiconductor layer having a first conductive type; a second semiconductor layer provided on the first semiconductor layer, the second semiconductor layer having a second conductive type that is a conductive type different from the first conductive type; an impurity region of the first conductive type formed at a surface of the second semiconductor layer; first electrodes contacting the impurity region, the second semiconductor layer, and the first semiconductor layer via a first insulating film; and second electrodes contacting the first electrodes via a second insulating film, and contacting the first semiconductor layer via a third insulating film, the second electrodes including PN junctions at borders between upper portions that contact the first semiconductor layer via the third insulating film and lower portions that contact the first semiconductor layer via the third insulating film.

Abstract: A semiconductor device including: a first semiconductor layer having a first conductive type; a second semiconductor layer provided on the first semiconductor layer, the second semiconductor layer having a second conductive type that is a conductive type different from the first conductive type; an impurity region of the first conductive type formed at a surface of the second semiconductor layer; first electrodes contacting the impurity region, the second semiconductor layer, and the first semiconductor layer via a first insulating film; and second electrodes contacting the first electrodes via a second insulating film, and contacting the first semiconductor layer via a third insulating film, the second electrodes including PN junctions at borders between upper portions that contact the first semiconductor layer via the third insulating film and lower portions that contact the first semiconductor layer via the third insulating film.

Abstract: The disclosure reduces the risk of collapse of the wall surrounding the trench and suppresses the withstand voltage fluctuation that accompanies the manufacturing variation for a semiconductor device having a super junction structure. The semiconductor device includes a drift layer of a first conductivity type and a plurality of embedded parts embedded in the drift layer. The embedded parts are of a second conductivity type different from the first conductivity type, and the embedded parts are arranged with a first direction as a longitudinal direction and spaced from each other along a second direction that intersects the first direction. A width of each of the embedded parts in the second direction changes continuously along the first direction.

Abstract: A semiconductor device including: a first semiconductor layer having a first conductive type; a second semiconductor layer provided on the first semiconductor layer, the second semiconductor layer having a second conductive type that is a conductive type different from the first conductive type; an impurity region of the first conductive type formed at a surface of the second semiconductor layer; first electrodes contacting the impurity region, the second semiconductor layer, and the first semiconductor layer via a first insulating film; and second electrodes contacting the first electrodes via a second insulating film, and contacting the first semiconductor layer via a third insulating film, the second electrodes including PN junctions at borders between upper portions that contact the first semiconductor layer via the third insulating film and lower portions that contact the first semiconductor layer via the third insulating film.

Abstract: The disclosure reduces the risk of collapse of the wall surrounding the trench and suppresses the withstand voltage fluctuation that accompanies the manufacturing variation for a semiconductor device having a super junction structure. The semiconductor device includes a drift layer of a first conductivity type and a plurality of embedded parts embedded in the drift layer. The embedded parts are of a second conductivity type different from the first conductivity type, and the embedded parts are arranged with a first direction as a longitudinal direction and spaced from each other along a second direction that intersects the first direction. A width of each of the embedded parts in the second direction changes continuously along the first direction.

Abstract: A semiconductor device includes field effect transistors, each having a semiconductor layer formed on a major surface of a semiconductor substrate, a base region formed in a surface layer portion of a semiconductor layer, a source region formed in a surface layer portion of the base region, a source electrode formed on the base region and the source region, a gate electrode formed on the semiconductor layer and the base region via a gate insulating film interposed therebetween, and a drain electrode formed on a back surface of the semiconductor substrate, and which are placed side by side. A columnar intermediate region is formed in its corresponding predetermined region of the surface layer portion of the semiconductor layer placed below each gate electrode. Connection regions are formed in the surface layer portion of the semiconductor layer to contact the intermediate region and the base regions.

Abstract: A method for fabricating a semiconductor device includes the steps of forming an oxide film on a silicon carbide substrate; forming a gate electrode layer on the oxide film thereafter to pattern the gate electrode layer so as to form a gate electrode, comprising: and performing a thermal treatment to the gate electrode layer or the gate electrode in a mixed gas atmosphere of an oxidized gas and an inert gas.

Abstract: A semiconductor memory device includes a first word-line, a first non-inverted bit-line, a first inverted bit-line, a first global interconnection layer, a first memory capacitor having a first storage electrode, a first counter electrode, and a first oxide dielectric film, a second memory capacitor having a second storage electrode, a second counter electrode, and a second oxide dielectric film, a first local interconnection layer including a first contact portion, a second contact portion, and a first non-contact portion, a first hydrogen barrier layer covering at least the first contact portion and the second contact portion of the first local interconnection layer, a first switching transistor having a first gate electrode, a second switching transistor having a second gate electrode, and a third switching transistor having a third gate electrode.

Abstract: A semiconductor device includes field effect transistors, each having a semiconductor layer formed on a major surface of a semiconductor substrate, a base region formed in a surface layer portion of a semiconductor layer, a source region formed in a surface layer portion of the base region, a source electrode formed on the base region and the source region, a gate electrode formed on the semiconductor layer and the base region via a gate insulating film interposed therebetween, and a drain electrode formed on a back surface of the semiconductor substrate, and which are placed side by side. A columnar intermediate region is formed in its corresponding predetermined region of the surface layer portion of the semiconductor layer placed below each gate electrode. Connection regions are formed in the surface layer portion of the semiconductor layer to contact the intermediate region and the base regions.

Abstract: Wiring layers through that come into direct contact with an electrode of a ferroelectric capacitor provide a wiring layer structure configured so that the characteristic of the ferroelectric substance is not degraded by production of a reducing agent. One of coating layers through is provided on the periphery of the Al main wiring layer. A single Ti film or TiN film or a combination of both is used as the coating film. The TiN film suppresses reaction between water and aluminum. The Ti film occludes hydrogen. Therefore, the coating layer provided on the periphery of the Al wiring layer inhibits water or molecular hydrogen from entering the Al wiring layer from the outside and therefore there is no degradation of the characteristics of the ferroelectric capacitor.

Abstract: A semiconductor memory device includes a first word-line, a first non-inverted bit-line, a first inverted bit-line, a first global interconnection layer, a first memory capacitor having a first storage electrode, a first counter electrode, and a first oxide dielectric film, a second memory capacitor having a second storage electrode, a second counter electrode, and a second oxide dielectric film, a first local interconnection layer including a first contact portion, a second contact portion, and a first non-contact portion, a first hydrogen barrier layer covering at least the first contact portion and the second contact portion of the first local interconnection layer, a first switching transistor having a first gate electrode, a second switching transistor having a second gate electrode, and a third switching transistor having a third gate electrode.

Abstract: A ferroelectric memory includes read-write memory cells having a comparatively weak imprint characteristic and read-only memory cells having a comparatively strong imprint characteristic. Data written in the read-only memory cells are imprinted by, for example, writing the same data repeatedly, after which the imprinted data cannot be altered at the normal read-write voltage. The memory can be fabricated by forming a first base layer and a second base layer having different chemical compositions, and forming ferroelectric capacitors on the different base layers. The first and second base layers may serve as adhesion layers promoting adhesion between lower electrodes of the ferroelectric capacitors and an underlying insulation layer. The ferroelectric capacitors may include a ferroelectric film having a constituent metallic element present in the second base film but not in the first base film.

Abstract: Wiring layers through that come into direct contact with an electrode of a ferroelectric capacitor provide a wiring layer structure configured so that the characteristic of the ferroelectric substance is not degraded by production of a reducing agent. One of coating layers through is provided on the periphery of the Al main wiring layer. A single Ti film or TiN film or a combination of both is used as the coating film. The TiN film suppresses reaction between water and aluminum. The Ti film occludes hydrogen. Therefore, the coating layer provided on the periphery of the Al wiring layer inhibits water or molecular hydrogen from entering the Al wiring layer from the outside and therefore there is no degradation of the characteristics of the ferroelectric capacitor.

Abstract: A semiconductor element in which the hydrogen-induced degradation of ferroelectric characteristics can be controlled includes a hydrogen penetration prevention film 400 for preventing hydrogen from penetrating into a ferroelectric film is formed above top electrodes 28. The width of the hydrogen penetration prevention film 400 in the direction orthogonal to a specific direction in which the top electrodes 28 are arranged in a parallel manner is set to be equal to or greater than the maximum width of the top electrodes 28 in the orthogonal direction. The hydrogen penetration prevention film 400 is used as a main WL that connects sub-WL drivers 60a and a main WL driver 60b extended in the same direction as the specific direction in the which the top electrodes 28 are aligned parallel to each other in a peripheral circuit 60.

Abstract: Wiring layers through that come into direct contact with an electrode of a ferroelectric capacitor provide a wiring layer structure configured so that the characteristic of the ferroelectric substance is not degraded by production of a reducing agent. One of coating layers through is provided on the periphery of the Al main wiring layer. A single Ti film or TiN film or a combination of both is used as the coating film. The TiN film suppresses reaction between water and aluminum. The Ti film occludes hydrogen. Therefore, the coating layer provided on the periphery of the Al wiring layer inhibits water or molecular hydrogen from entering the Al wiring layer from the outside and therefore there is no degradation of the characteristics of the ferroelectric capacitor.

Abstract: A ferroelectric memory includes read-write memory cells having a comparatively weak imprint characteristic and read-only memory cells having a comparatively strong imprint characteristic. Data written in the read-only memory cells are imprinted by, for example, writing the same data repeatedly, after which the imprinted data cannot be altered at the normal read-write voltage. The memory can be fabricated by forming a first base layer and a second base layer having different chemical compositions, and forming ferroelectric capacitors on the different base layers. The first and second base layers may serve as adhesion layers promoting adhesion between lower electrodes of the ferroelectric capacitors and an underlying insulation layer. The ferroelectric capacitors may include a ferroelectric film having a constituent metallic element present in the second base film but not in the first base film.

Abstract: This invention provides a semiconductor element in which the hydrogen-induced degradation of ferroelectric characteristics can be controlled. A hydrogen penetration prevention film 400 for preventing hydrogen from penetrating into a ferroelectric film is formed above top electrodes 28. The width of the hydrogen penetration prevention film 400 in the direction orthogonal to a specific direction in which the top electrodes 28 are arranged in a parallel manner is set to be equal to or greater than the maximum width of the top electrodes 28 in the orthogonal direction. Furthermore, the hydrogen penetration prevention film 400 is used as a main WL that connects sub-WL drivers 60a and a main WL driver 60b extended in the same direction as the specific direction in the which the top electrodes 28 are aligned parallel to each other in a peripheral circuit 60.

Abstract: An inventive method of forming a Ti film above an oxide material electrode in a semiconductor device involves forming a contact hole to an upper electrode and a lower electrode, forming a TiN film by a sputtering method, then remaining TiN film on the bottom of the contact when, by a lift off method, the other TiN film is removed. Forming of TiOx on the oxide material electrode and peeling can thereby be prevented. The bottom of the diffusion layer contact to a diffusion layer is formed by the multilayer metal of Ti film and Al film; a loose contact with a Si substrate can thereby be prevented.

Abstract: Wiring layers through that come into direct contact with an electrode of a ferroelectric capacitor provide a wiring layer structure configured so that the characteristic of the ferroelectric substance is not degraded by production of a reducing agent. One of coating layers through is provided on the periphery of the Al main wiring layer. A single Ti film or TiN film or a combination of both is used as the coating film. The TiN film suppresses reaction between water and aluminum. The Ti film occludes hydrogen. Therefore, the coating layer provided on the periphery of the Al wiring layer inhibits water or molecular hydrogen from entering the Al wiring layer from the outside and therefore there is no degradation of the characteristics of the ferroelectric capacitor.

Abstract: When a Ti film is formed above an oxide material electrode, the Ti film reacts with the oxide material electrode, and a TiOX film, an insulator, is formed. This TiOX film can cause a loose connection. When a TiOX is formed, it expands to twice the volume of the original Ti film, and the problem that adhesion between the Ti film and the conductive oxide electrode deteriorates occurs. To solve the problem described above, forming a contact hole to an upper electrode and a lower electrode, forming a TiN film by a sputtering method, then remaining TiN film on the bottom of the contact by lift off method, the other TiN film is removed. Forming of TiOx on the oxide material electrode and peeling can be prevented. The bottom of the diffusion layer contact to a diffusion layer is formed by the multilayer metal of Ti film and Al film; a loose contact with a Si substrate can be prevented.