Patents by Inventor Tomomi Yamanobe

Tomomi Yamanobe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6342337
    Abstract: A method for fabricating ferroelectric memory cells includes forming a first interlayer insulating film having a first opening on an underlayer, and forming a preparatory first electrode layer over the entire surface thereof. The preparatory first electrode layer is partially removed in a CMP process and a first electrode is formed by the remaining portion. Next, a second interlayer insulating film having a second opening that exposes the first electrode is formed. Portions of a preparatory ferroelectric film on the exposed surface of the first electrode and the upper surface of the second interlayer insulating film are formed mutually stepped. The portion of the preparatory ferroelectric film on the second interlayer insulating film is removed by a CMP process and the portion on the exposed surface is left remaining to form a ferroelectric film. A second electrode is formed on the ferroelectric film by CMP processing or photolithography.
    Type: Grant
    Filed: December 15, 1999
    Date of Patent: January 29, 2002
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Tomomi Yamanobe
  • Patent number: 5989927
    Abstract: A non-volatile semiconductor memory cell employing a field effect transistor having a gate of the metal/ferroelectric structure or the metal/ferroelectric/metal/insulator structure, wherein the ferroelectric layer is a layer of bismuth titanate containing bismuth more than the stoichiometric quantity or a piled layer of bismuth titanate of the stoichiometric composition and bismuth titanate containing bismuth more than the stoichiometric quantity, both of which have a less amount of dielectric constant and remanent polarization, thereby enabling the non-volatile memory cell to memorize and erase binary information with a less amount of voltage to be applied to the gate.
    Type: Grant
    Filed: January 6, 1998
    Date of Patent: November 23, 1999
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Tomomi Yamanobe
  • Patent number: 5780886
    Abstract: A non-volatile semiconductor memory cell employing a field effect transistor having a gate of the metal/ferroelectric structure or the metal/ferroelectric/metal/insulator insulator structure, wherein the ferroelectric layer is a layer of bismuth titanate containing bismuth more than the stoichiometric quantity or a piled layer of bismuth titanate of the stoichiometric composition and bismuth titanate containing bismuth more than the stoichiometric quantity, both of which have a less amount of dielectric constant and remanent polarization, thereby enabling the non-volatile memory cell to memorize and erase binary information with a less amount of voltage to be applied to the gate.
    Type: Grant
    Filed: May 16, 1997
    Date of Patent: July 14, 1998
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Tomomi Yamanobe