Patents by Inventor Tomotake Morita
Tomotake Morita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8334210Abstract: A method of manufacturing a semiconductor device, includes: (a) obtaining a surface of a polishing target, wherein an insulating film and a metal film are exposed; and (b) polishing the surface having the exposed insulating film and the exposed metal film. The step (b) includes; (b1) polishing the surface in a condition with high frictional force, and (b2) polishing the surface in a condition with usual frictional force lower than the high frictional force after the step (b1).Type: GrantFiled: August 29, 2007Date of Patent: December 18, 2012Assignee: Renesas Electronics CorporationInventors: Masafumi Shiratani, Tomotake Morita
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Publication number: 20120070396Abstract: The present invention includes as an active ingredient at least one biosurfactant, in particular mannosyl alditol lipid (such as MEL and MML) or triacylated mannosyl alditol lipid. This allows providing an activator and anti-aging agent that is excellent in activating and anti-aging effects on cells and that is safe enough to be used for a long time, and also providing cosmetics, quasi-drugs, drugs, and drinks and foods including the activator and the anti-aging agent as active ingredients. Further, the present invention provides MEL whose mannosyl erythritol skeleton in a molecular structure is 1-O-?-D-mannopyranosyl-meso-erythritol and a method for producing the MEL with use of a microorganism.Type: ApplicationFiled: October 19, 2011Publication date: March 22, 2012Applicants: National Institute of Advanced Industrial Science and Technology, TOYO BOSEKI KABUSHIKI KAISHAInventors: Michiko Suzuki, Masaru Kitagawa, Shuhei Yamamoto, Atsushi Sogabe, Dai Kitamoto, Tomotake Morita, Tokuma Fukuoka, Tomohiro Imura
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Publication number: 20110257116Abstract: The present invention relates to a cosmetic for skin roughness improvement/skin care containing a biosurfactant, particularly MEL-A, MEL-B or MEL-C.Type: ApplicationFiled: June 28, 2011Publication date: October 20, 2011Applicants: National Institute Of Advanced Industrial Science And Technology, Toyo Boseki Kabushiki KaishaInventors: Masaru Kitagawa, Michiko Suzuki, Shuhei Yamamoto, Atsushi Sogabe, Dai Kitamoto, Tomohiro Imura, Tokuma Fukuoka, Tomotake Morita
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Publication number: 20110237074Abstract: The method of manufacturing a semiconductor device comprises forming a metal film over silicon regions and insulating films; performing a first heat treatment under an oxygen atmosphere containing oxygen as a main ingredient, to form a first silicide film in the silicon region by reacting the metal film and the silicon region, and to simultaneously form a metal oxide by oxidizing the entire surface of the metal film from the surface side thereof; and selectively removing the metal oxide and the unreacted metal film using a chemical.Type: ApplicationFiled: March 23, 2011Publication date: September 29, 2011Applicant: RENESAS ELECTRONICS CORPORATIONInventors: TAKASHI TONEGAWA, TOMOTAKE MORITA, NORIHIKO MATSUZAKA
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Patent number: 7989599Abstract: The present invention includes as an active ingredient at least one biosurfactant, in particular mannosyl alditol lipid (such as MEL and MML) or triacylated mannosyl alditol lipid. This allows providing an activator and anti-aging agent that is excellent in activating and anti-aging effects on cells and that is safe enough to be used for a long time, and also providing cosmetics, quasi-drugs, drugs, and drinks and foods including the activator and the anti-aging agent as active ingredients. Further, the present invention provides MEL whose mannosyl erythritol skeleton in a molecular structure is 1-O-?-D-mannopyranosyl-meso-erythritol and a method for producing the MEL with use of a microorganism.Type: GrantFiled: February 9, 2009Date of Patent: August 2, 2011Assignees: Toyo Boseki Kabushiki Kaisha, National Institute of Advanced Industrial Science and TechnologyInventors: Michiko Suzuki, Masaru Kitagawa, Shuhei Yamamoto, Atsushi Sogabe, Dai Kitamoto, Tomotake Morita, Tokuma Fukuoka, Tomohiro Imura
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Publication number: 20100228013Abstract: The present invention includes as an active ingredient at least one biosurfactant, in particular mannosyl alditol lipid (such as MEL and MML) or triacylated mannosyl alditol lipid. This allows providing an activator and anti-aging agent that is excellent in activating and anti-aging effects on cells and that is safe enough to be used for a long time, and also providing cosmetics, quasi-drugs, drugs, and drinks and foods including the activator and the anti-aging agent as active ingredients. Further, the present invention provides MEL whose mannosyl erythritol skeleton in a molecular structure is 1-O-?-D-mannopyranosyl-meso-erythritol and a method for producing the MEL with use of a microorganism.Type: ApplicationFiled: February 9, 2009Publication date: September 9, 2010Applicants: Toyo Boseki Kabushiki Kaisha, National Institute of Advanced Industrial Science and TechnologyInventors: Michiko Suzuki, Masaru Kitagawa, Shuhei Yamamoto, Atsushi Sogabe, Dai Kitamoto, Tomotake Morita, Tokuma Fukuoka, Tomohiro Imura
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Patent number: 7780505Abstract: A semiconductor manufacturing apparatus includes a supporting unit for supporting a semiconductor wafer received from a CMP apparatus and a vacuuming system for holding the wafer on the supporting unit. The vacuuming is applied only in a peripheral area of the wafer. In the peripheral area of the wafer, any circuit such as interconnections and devices are not manufactured. When the wafer is released by supplying gas to the vacuumed space, even if static electricity occurs, the electronic circuit to be manufactured on the wafer does not harmed, because the static electricity occurs only in the peripheral area where any circuit does not exist.Type: GrantFiled: December 3, 2007Date of Patent: August 24, 2010Assignee: NEC Electronics CorporationInventor: Tomotake Morita
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Publication number: 20100168405Abstract: The present invention includes as an active ingredient at least one biosurfactant, in particular mannosyl alditol lipid (such as MEL and MML) or triacylated mannosyl alditol lipid. This allows providing an activator and anti-aging agent that is excellent in activating and anti-aging effects on cells and that is safe enough to be used for a long time, and also providing cosmetics, quasi-drugs, drugs, and drinks and foods including the activator and the anti-aging agent as active ingredients. Further, the present invention provides MEL whose mannosyl erythritol skeleton in a molecular structure is 1-O-?-D-mannopyranosyl-meso-erythritol and a method for producing the MEL with use of a microorganism.Type: ApplicationFiled: August 7, 2007Publication date: July 1, 2010Applicants: Toyo Boseki Kabushiki Kaisha, National Institute of Advanced Industrial Science and TechnologyInventors: Michiko Suzuki, Masaru Kitagawa, Shuhei Yamamoto, Atsushi Sogabe, Dai Kitamoto, Tomotake Morita, Tokuma Fukuoka, Tomohiro Imura
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Publication number: 20100004472Abstract: The present invention relates to a cosmetic for skin roughness improvement/skin care containing a biosurfactant, particularly MEL-A, MEL-B or MEL-C.Type: ApplicationFiled: November 21, 2006Publication date: January 7, 2010Applicants: TOYO BOSEKI KABUSHIKI KAISHA, NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGYInventors: Masaru Kitagawa, Michiko Suzuki, Shuhei Yamamoto, Atsushi Sogabe, Dai Kitamoto, Tomohiro Imura, Tokuma Fukuoka, Tomotake Morita
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Patent number: 7534166Abstract: An edge section of a wafer can be polished, and at same time, a polishing surface of a polishing member can be dressed by a dresser mechanism. A polishing member has annular concave trenches, which are coaxially formed in the front surface thereof, and at least an inner surface of the concave trenches is composed of an inclined polishing surface for polishing an edge section of the wafer, and a wafer pressing mechanism presses the edge section of the wafer against the inner surfaces in at least one side of the concave trench of the polishing member, and a dresser mechanism dresses at least the inner surfaces in at least one side of the concave trench of the polishing member.Type: GrantFiled: October 2, 2007Date of Patent: May 19, 2009Assignee: NEC Electronics CorporationInventor: Tomotake Morita
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Publication number: 20080153400Abstract: An edge section of a wafer can be polished, and at same time, a polishing surface of a polishing member can be dressed by a dresser mechanism. A polishing member has annular concave trenches, which are coaxially formed in the front surface thereof, and at least an inner surface of the concave trenches is composed of an inclined polishing surface for polishing an edge section of the wafer, and a wafer pressing mechanism presses the edge section of the wafer against the inner surfaces in at least one side of the concave trench of the polishing member, and a dresser mechanism dresses at least the inner surfaces in at least one side of the concave trench of the polishing member.Type: ApplicationFiled: October 2, 2007Publication date: June 26, 2008Applicant: NEC ELECTRONICS CORPORATIONInventor: Tomotake Morita
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Publication number: 20080146124Abstract: A semiconductor manufacturing apparatus includes a supporting unit for supporting a semiconductor wafer received from a CMP apparatus and a vacuuming system for holding the wafer on the supporting unit. The vacuuming is applied only in a peripheral area of the wafer. In the peripheral area of the wafer, any circuit such as interconnections and devices are not manufactured. When the wafer is released by supplying gas to the vacuumed space, even if static electricity occurs, the electronic circuit to be manufactured on the wafer does not harmed, because the static electricity occurs only in the peripheral area where any circuit does not exist.Type: ApplicationFiled: December 3, 2007Publication date: June 19, 2008Applicant: NEC ELECTRONICS CORPORATIONInventor: Tomotake MORITA
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Publication number: 20080057837Abstract: A method of manufacturing a semiconductor device, includes: (a) obtaining a surface of a polishing target, wherein an insulating film and a metal film are exposed; and (b) polishing the surface having the exposed insulating film and the exposed metal film. The step (b) includes; (b1) polishing the surface in a condition with high frictional force, and (b2) polishing the surface in a condition with usual frictional force lower than the high frictional force after the step (b1).Type: ApplicationFiled: August 29, 2007Publication date: March 6, 2008Applicant: NEC Electronics CorporationInventors: Masafumi SHIRATANI, Tomotake Morita
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Publication number: 20030045218Abstract: A wafer holder includes a mounting plate for mounting a wafer and having a plurality of fluid holes, a decompressor for absorbing the wafer toward the mounting plate while sucking air between the mounting plate and the wafer through the fluid holes, and a liquid supply unit for supplying a liquid toward the wafer to release the wafer from the wafer holder. The liquid has a specific resistance lower than the specific resistance of water.Type: ApplicationFiled: August 30, 2002Publication date: March 6, 2003Applicant: NEC CorporationInventors: Masayoshi Kasahara, Masamichi Kudou, Yasunori Watanabe, Tomotake Morita, Yoshirou Ishiguro
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Patent number: 6102778Abstract: In a wafer lapping method including a first step of lapping irregularities of a surface of a wafer to flatten the surface of the wafer by pressing the surface of the wafer against an abrasion pad (2) with an abrasive agent containing abrasive particles fed onto the abrasion pad, the method further includes a second step of feeding, instead of the abrasive agent upon completion of the lapping step, onto the abrasion pad a chemical solution (6) for use in preventing agglomeration of the abrasive particles contained in the abrasive agent which remains on the abrasion pad. This results in preventing the abrasion pad from drying. Following the second step, a third step is carried out for lapping irregularities of a surface of a different wafer to flatten the surface of the different wafer by pressing the surface of the different wafer against the abrasion pad with the abrasive agent fed onto the abrasion pad instead of the chemical solution.Type: GrantFiled: December 6, 1996Date of Patent: August 15, 2000Assignee: NEC CorporationInventor: Tomotake Morita
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Patent number: 5961794Abstract: A method of manufacturing semiconductor devices that provides excellent controllability and workability in planarizing the isolation area. The novel method comprises the steps of: forming a filling material on a semiconductor substrate formed with a plurality of trenches such that the plurality of trenches are filled up with the filling material; forming a mask having a pattern obtained by inverting a pattern of the plurality of trenches onto the surface of the filling material; etching the filling material to a predetermined depth by use of the mask to leave a protruding portion composed of the filling material on each of the plurality of trenches; and removing the mask and then the protruding portion for planarization.Type: GrantFiled: October 4, 1996Date of Patent: October 5, 1999Assignee: NEC CorporationInventor: Tomotake Morita
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Patent number: 5944590Abstract: A polishing apparatus has a retainer for retaining a semiconductor wafer on a polishing pad, and the outer periphery of the retainer ring is rounded so as to minimize a deformation produced in the polishing pad, thereby improving the surface profile of the semiconductor wafer.Type: GrantFiled: November 7, 1996Date of Patent: August 31, 1999Assignee: NEC CorporationInventors: Akira Isobe, Tomotake Morita