Abstract: A semiconductor device includes a semiconductor chip 5 having a first surface 5a on which a first pole 5a1 of a semiconductor element is arranged and a second surface 5b on which a second pole 5b1 is arranged and which is opposed to the first surface 5a, a first conductive member 6a connected to the first surface 5a, a second conductive member 6b connected to the second surface 5b, a first external electrode 2a connected to the first conductive member 6a and having a contact area larger than the member 6a, a second external electrode 2b connected to the second conductive member 6b and having a contact area larger than the conductive member 6b and a sealing member 3 sealing up the semiconductor chip 6 and the conductive members 6 between the first external electrode 2a and the second external electrode 2b. The sealing member 3 is provided as a result of heating a sealing material for melting and subsequent hardening.

Abstract: A manufacturing method for semiconductor devices includes a process of forming a conductive layer 4 on the other principle surface of a semiconductor wafer 10 having circuit elements 2 formed in one principle surface of the semiconductor wafer, a process of forming a protecting layer 5 on at least a part of the conductive layer, the protecting layer 5 being made from material having hard-to-shave characteristics in comparison with the conductive layer and a process of cutting the semiconductor wafer 10 into pieces with respect to each of the semiconductor devices 1. By the manufacturing method, each semiconductor device 1 is provided with a semiconductor substrate 3 having the circuit elements 2 formed in one principle surface of the semiconductor substrate 3, the conductive layer 4 formed on the other principle surface of the semiconductor substrate 3 and the protecting layer 5 formed on the conductive layer 4 in lamination to have hard-to-shave characteristics in comparison with the conductive layer 4.

Abstract: A semiconductor device (3) is provided with a first electrode (A), a lead (4) has a second electrode (B), and a metallic film (6) electrically interconnects the first electrode (A) and the second electrode (B), allowing for a more reduced internal resistance, high reliability, and facilitated fabrication.

Abstract: A microwave integrated circuit, includes: a dielectric substrate having a signal line on a front surface of the dielectric substrate and a mount pad disposed adjacent to an end of the signal line in a longitudinal direction of the signal line; a semiconductor chip having an upper electrode and a lower electrode provided on opposite surfaces of the semiconductor chip, the lower electrode being mounted on the mount pad; a bonding block connecting a bottom surface of the bonding block to the end in the longitudinal direction of the signal line; and a wiring member configured to bond the upper electrode of the semiconductor chip and a top surface of the bonding block together.

Abstract: A microwave integrated circuit, includes: a dielectric substrate having a signal line on a front surface of the dielectric substrate and a mount pad disposed adjacent to an end of the signal line in a longitudinal direction of the signal line; a semiconductor chip having an upper electrode and a lower electrode provided on opposite surfaces of the semiconductor chip, the lower electrode being mounted on the mount pad; a bonding block connecting a bottom surface of the bonding block to the end in the longitudinal direction of the signal line; and a wiring member configured to bond the upper electrode of the semiconductor chip and a top surface of the bonding block together.