Patents by Inventor Tomoyuki Shibata

Tomoyuki Shibata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110222785
    Abstract: An acquisition unit acquires feature vectors (the number is N). A first selection unit selects first neighbor features (k (1?k?N)) of each feature vector in order of higher similarity from the feature vectors. A second selection unit generates a plurality of groups each including similar feature vectors from the feature vectors, and selects second neighbor features (u (1?k+u?N?2)) of each feature vector in order of higher similarity. Each of the second neighbor features is differently included in a group. A determination unit calculates a density of each feature vector by using a threshold, the first neighbor features and the second neighbor features, and determines feature vectors to be classified into the same class as each feature vector by using the density and a threshold. A classification unit classifies the feature vectors into a plurality of classes by using the selection result. A control unit controls each threshold.
    Type: Application
    Filed: September 13, 2010
    Publication date: September 15, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Makoto Hirohata, Tomoyuki Shibata
  • Patent number: 7941573
    Abstract: Data transfer bus charging/discharging current is reduced in a semiconductor memory device. In a data transfer device that sequentially transfers bit sequences in parallel through a plurality of buses from a transmit unit 10 to a receive unit 20, the transmit circuit 10 includes a flag generation circuit 11 and an encoding circuit 12. The flag generation circuit 11 generates a flag indicating whether bit inversion has occurred in consecutive bits in each of the bit sequences to be transferred through the buses and transmits the generated flag to the receive unit 20. The encoding circuit 12 encodes the bit sequences based on the flag, for transmission to the receive unit 20. The receive unit includes a decoding circuit 21 that decodes the bit sequences based on the bit sequences and the flag.
    Type: Grant
    Filed: June 25, 2008
    Date of Patent: May 10, 2011
    Assignee: Elpida Memory, Inc.
    Inventor: Tomoyuki Shibata
  • Publication number: 20110052459
    Abstract: A compound container which is comprised of a container main body 2 forming a first accommodation chamber 20 and an auxiliary container 3 forming a second accommodation chamber 30, wherein a mounting part 22 on which the auxiliary container 3 is mounted is provided in the container main body 2 and a cutting part 221 which cuts a second accommodation chamber partition wall 30a which partitions part of the second accommodation chamber 30 formed in the auxiliary container 3 is formed, and when the auxiliary container 3 is mounted on the container main body 2, the second accommodation chamber partition wall 30a is cut, whereby the first accommodation chamber 20 and the second accommodation chamber 30 are intercommunicated.
    Type: Application
    Filed: March 3, 2009
    Publication date: March 3, 2011
    Applicants: Toyo Seikan Kaisha Ltd, Eiken Kagaku Kabushiki Kaisha
    Inventors: Tomoyuki Shibata, Natsuki Masuya, Yoshiaki Seto, Shingo Saito, Yasuyoshi Mori, Yutaka Kubota, Hidetoshi Kanda, Tsugunori Notomi, Teijirou Kanada, Youichi Takano, Yasuyuki Takeuchi, Akira Onishi
  • Publication number: 20100320580
    Abstract: A conduction member is used to connect in-chip equipotential pads 20 that have the same potential in a semiconductor device through PKG ball 10 arranged on the semiconductor device.
    Type: Application
    Filed: May 27, 2010
    Publication date: December 23, 2010
    Inventors: Tomoyuki Shibata, Toru Chonan, Tsuneo Abe
  • Publication number: 20100266166
    Abstract: An image processing apparatus includes: a sequence creating section configured to create a plurality of sequences in such a manner that one sequence includes consecutive face images of a same person in video image data; a similarity calculating section configured to calculate a first similarity of each pair in a plurality of face image dictionaries created for each sequence and a second similarity of each pair of each face image dictionary and a predetermined plurality of dictionaries; a similarity correcting section configured to correct the calculated and obtained plurality of first similarities by the second similarities; and a face clustering section configured to compare the plurality of first similarities corrected by the similarity correcting section with a predetermined threshold to cluster the plurality of face image dictionaries.
    Type: Application
    Filed: April 14, 2010
    Publication date: October 21, 2010
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tomokazu Kawahara, Tomoyuki Shibata, Tomokazu Wakasugi
  • Patent number: 7811160
    Abstract: A mode selection unit, a blower unit and a temperature control unit are mounted on a cluster panel of a vehicle. The mode selection unit, the blower unit and the temperature control unit have a function of controlling the wind blow position, a function of controlling the wind blow rate and a function of controlling the wind blow temperature respectively, and are constituted by operating mechanisms mechanically separated from one another. Accordingly, the degree of freedom in the layout of the mode selection unit to the temperature control unit is improved so that it becomes easy to dispose them in accordance with the vehicle-side design.
    Type: Grant
    Filed: September 23, 2004
    Date of Patent: October 12, 2010
    Assignee: Kabushiki Kaisha Tokai Rika Denki Seisakusho
    Inventors: Satoshi Ogawa, Tomoyuki Shibata, Ryoji Watanabe
  • Patent number: 7808848
    Abstract: In a semiconductor memory having a plurality of memory banks that can be independently accessed, remedying bit registers that are substituted for defective memory cells are respectively provided for memory banks in a one-to-one relationship. Also, means for sharing the plurality of remedying bit registers in each memory bank is arranged.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: October 5, 2010
    Assignee: Elpida Memory, Inc.
    Inventors: Tomoyuki Shibata, Kanji Oishi
  • Publication number: 20100052739
    Abstract: A frequency divider section generates a frequency-divided clock RSELO by dividing the frequency of an internal clock LCLK, which lags behind an external clock in phase, and generates a delayed frequency-divided clock RSELI by delaying the frequency-divided clock RSELO. A signal input from the outside in synchronization with an internal clock PCLK which lags behind the external clock in phase is held in a latch circuit in synchronization with the delayed frequency-divided clock RSELI. Then, an output signal of the latch circuit is read into a latch circuit in synchronization with the frequency-divided clock RSELO and is output as a signal which is synchronized with the internal clock LCLK. In addition, a frequency divider section includes a variable divider which divides the frequency of the internal clock LCLK by a predetermined divide ratio which can be changed.
    Type: Application
    Filed: August 25, 2009
    Publication date: March 4, 2010
    Applicant: ELPIDA MEMORY, INC
    Inventor: Tomoyuki Shibata
  • Publication number: 20100044337
    Abstract: Provided is a container 1 for inspection which stores and pours out contents therein, and the container is provided with a container main body 2 having a mouth portion 22 formed thereon, a cover portion 3 attached to the mouth portion 22 to seal the container main body 2, and an opening cap 4 attached to the cover portion 3. The cover portion 3 has a closing wall 34 for closing the mouth portion 22, and the opening cap 4 is provided with an pouring outlet 421, and a cutting portion 431 for cutting the closing wall 34. When the opening cap 4 is attached to the cover portion 3, the cutting section 431 cuts the closing wall 34 to enable pouring out the contents. Thus, in the provided container 1 for inspection, sealing properties of the container main body 2 are ensured by the cover portion 3, and the closing wall 34 of the cover portion 3 is cut by the opening cap 4 attached to the cover portion 3 without removing the cover portion 3, whereby the contents can be poured out.
    Type: Application
    Filed: January 18, 2008
    Publication date: February 25, 2010
    Applicants: TOKYO SEIKAN KAISHA, EIKEN KAGAKU KABUSHIKI KAISHA
    Inventors: Tomoyuki Shibata, Manabu Hosokawa, Hiroaki Hayashi, Natsuki Masuya, Yoshiaki Seto, Shingo Saito, Hidetoshi Kanda
  • Publication number: 20090168572
    Abstract: In a semiconductor memory having a plurality of memory banks that can be independently accessed, remedying bit registers that are substituted for defective memory cells are respectively provided for memory banks in a one-to-one relationship. Also, means for sharing the plurality of remedying bit registers in each memory bank is arranged.
    Type: Application
    Filed: February 27, 2009
    Publication date: July 2, 2009
    Inventors: Tomoyuki Shibata, Kanji Oishi
  • Patent number: 7542359
    Abstract: In a semiconductor memory having a plurality of memory banks that can be independently accessed, remedying bit registers that are substituted for defective memory cells are respectively provided for memory banks in a one-to-one relationship. Also, means for sharing the plurality of remedying bit registers in each memory bank is arranged.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: June 2, 2009
    Assignee: Elpida Memory, Inc.
    Inventors: Tomoyuki Shibata, Kanji Oishi
  • Publication number: 20090019044
    Abstract: A pattern search apparatus includes a storage unit, a distribution acquisition unit, a hash function unit, a training unit, and a search unit. A cumulative probability distribution of the training pattern on an arbitrary axis is obtained, and hash function each of which divides a probability value are defined based on the cumulative probability distribution.
    Type: Application
    Filed: July 10, 2008
    Publication date: January 15, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tomoyuki Shibata, Osamu Yamaguchi, Toshikazu Wada
  • Publication number: 20090006687
    Abstract: Data transfer bus charging/discharging current is reduced in a semiconductor memory device. In a data transfer device that sequentially transfers bit sequences in parallel through a plurality of buses from a transmit unit 10 to a receive unit 20, the transmit circuit 10 includes a flag generation circuit 11 and an encoding circuit 12. The flag generation circuit 11 generates a flag indicating whether bit inversion has occurred in consecutive bits in each of the bit sequences to be transferred through the buses and transmits the generated flag to the receive unit 20. The encoding circuit 12 encodes the bit sequences based on the flag, for transmission to the receive unit 20. The receive unit includes a decoding circuit 21 that decodes the bit sequences based on the bit sequences and the flag.
    Type: Application
    Filed: June 25, 2008
    Publication date: January 1, 2009
    Applicant: Elpida Memory, Inc.
    Inventor: Tomoyuki Shibata
  • Publication number: 20080158340
    Abstract: A video chat apparatus includes an image pickup unit having two cameras, a three-dimensional information acquiring unit, a window position acquiring unit, a rotational amount determining unit, an image generating unit, an image output unit, and a parameter storage unit. Eye-gaze correction is achieved only by changing the position of viewpoint of virtual cameras by the position of a window on the display and gazing at the other party of the chat.
    Type: Application
    Filed: December 4, 2007
    Publication date: July 3, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tomoyuki Shibata, Osamu Yamaguchi
  • Patent number: 7381128
    Abstract: A gear portion is provided on the inner peripheral surface of a dial, and a large diameter portion of a main driving gear is mated with the gear portion. A driven gear is mated with a small diameter portion of the main driving gear, and the state of an air conditioner is switched based on the moving operation of a cable through the gear portion, the main driving gear and the driven gear in the rotating operation of the dial. With this structure, it is not necessary to provide a rotary shaft as a member for transmitting an operating force to the central part or the dial. Consequently, it is possible to maintain a space in the central part of the dial. Thus, restrictions can be decreased in the case in which a knob is to be arranged.
    Type: Grant
    Filed: September 23, 2004
    Date of Patent: June 3, 2008
    Assignee: Kabushiki Kaisha Tokai Rika Denki Seisakusho
    Inventors: Satoshi Ogawa, Tomoyuki Shibata, Yoshiyuki Aoki
  • Publication number: 20080062784
    Abstract: In a semiconductor memory having a plurality of memory banks that can be independently accessed, remedying bit registers that are substituted for defective memory cells are respectively provided for memory banks in a one-to-one relationship. Also, means for sharing the plurality of remedying bit registers in each memory bank is arranged.
    Type: Application
    Filed: October 19, 2007
    Publication date: March 13, 2008
    Inventors: Tomoyuki Shibata, Kanji Oishi
  • Publication number: 20070297652
    Abstract: A face recognition apparatus includes an image sequence acquiring unit, a face image acquiring unit, an intra-sequence classifying unit, an inter-sequence classifying unit, an identification unit, and a reference image storing unit. A plurality of cameras are attached in a corridor for monitoring one place with these cameras, so that when a plurality of moving people pass through, identification is performed for each moving people. Face images are classified into fragmental face image sets, and the fragmental face image sets are classified into integrated sets to achieve the identification.
    Type: Application
    Filed: May 25, 2007
    Publication date: December 27, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masashi Nishiyama, Mayumi Yuasa, Tomoyuki Shibata, Tomokazu Wakasugi, Osamu Yamaguchi
  • Patent number: 7304900
    Abstract: In a semiconductor memory having a plurality of memory banks that can be independently accessed, remedying bit registers that are substituted for defective memory cells are respectively provided for memory banks in a one-to-one relationship. Also, means for sharing the plurality of remedying bit registers in each memory bank is arranged.
    Type: Grant
    Filed: March 23, 2006
    Date of Patent: December 4, 2007
    Assignee: Elpida Memory, Inc.
    Inventors: Tomoyuki Shibata, Kanji Oishi
  • Publication number: 20070253598
    Abstract: An image monitoring apparatus includes: plural cameras, each of which obtains a plurality of images; a detection unit that detects an area occupied by at least one target candidates from each of the plural images; a storage that stores a first data for recognizing at least one target; a recognizing unit that recognizes the at least one target in each of the areas based on the first data; a camera evaluation unit that obtains evaluation values for respective cameras based on the plural images obtained by the respective cameras; a selection unit that selects one of the cameras based on the evaluation values; and an output unit that outputs a recognition obtained by using one of the plural images obtained by the selected one of the cameras.
    Type: Application
    Filed: April 26, 2007
    Publication date: November 1, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Mayumi Yuasa, Masashi Nishiyama, Tomokazu Wakasugi, Tomoyuki Shibata, Osamu Yamaguchi
  • Patent number: 7163455
    Abstract: A plurality of click portions is formed integrally with a unit body. The click portions are arranged on a common circular track, and a dial is engaged with the click portions so as to be unstable and to be prevented from slipping off. Therefore, it is not necessary to provide a D spring for coupling the dial to a shaft so as to be unstable and to be prevented from slipping off. Consequently, it is possible to reduce the number of components and a cost.
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: January 16, 2007
    Assignee: Kabushiki Kaisha Tokai Rika Denki Seisakusho
    Inventors: Satoshi Ogawa, Tomoyuki Shibata