Abstract: A motor drive device includes an inverter circuit, a switching circuit that switches between conduction and interruption between a power supply and the inverter circuit, and a switching driver that outputs, to the switching circuit, a command voltage which commands a switching operation. The switching circuit includes a first field-effect transistor (FET) and a second FET connected in series with sources of each other in order from a side of the power supply, and the switching driver includes an output circuit that outputs an interruption command voltage in a case in which a potential difference between drains of the FETs exceeds a threshold value, and a delay circuit that causes a timing at which the command voltage is input to a gate of the first FET to be later than a timing at which the command voltage is input to a gate of the second FET.

Abstract: A motor includes a shaft to rotate about a central axis extending in a vertical direction, a metal heat sink including a through-hole through which the shaft extends, a substrate disposed at an upper side of the heat sink through a gap, a sensor magnet fixed to an upper end of the shaft, a rotation sensor located at an upper side of the sensor magnet, and a heat dissipating material located in a gap between the substrate and the heat sink. The heat sink includes a heat sink main body portion and a wall portion located between the substrate and the heat sink main body portion and between the heat dissipating material and the through-hole when viewed from the vertical direction.

Abstract: A motor includes a shaft to rotate about a central axis extending in a vertical direction, a metal heat sink including a through-hole through which the shaft extends, a substrate disposed at an upper side of the heat sink through a gap, a sensor magnet fixed to an upper end of the shaft, a rotation sensor located at an upper side of the sensor magnet, and a heat dissipating material located in a gap between the substrate and the heat sink. On at least one of the substrate and the heat sink, a relief portion that retains the heat dissipating material is located between the heat dissipating material and the through-hole when viewed from the vertical direction and is open toward a gap between the substrate and the heat sink.

Abstract: A production apparatus ensures wireless communication without interference. An antenna portion 310 at a robotic arm includes a transmitting antenna portion 311 having a plurality of transmitting antennas 321 to 328 and a receiving antenna portion 312 having a plurality of receiving antennas 331 to 338. A transmitting side switcher circuit 361 changes over a transmitting antenna to be connected to a transmitter 351 among the plurality of transmitting antennas 321 to 328 in conjunction with an attitude information of the robotic arm, and changes an effective direction of a directional characteristic of the transmitting antenna portion 311. A receiving side switcher circuit 362 changes over a receiving antenna to be connected to a receiver 352 among the plurality of receiving antennas 331 to 338 in conjunction with the attitude information of the robotic arm and changes the effective direction of the directional characteristic of the receiving antenna portion 312.

Abstract: There is provided a fabrication technique of a MOS structure that has a small EOT without increasing the interface trap density. More specifically, provided is a method of producing a semiconductor wafer that includes a semiconductor crystal layer, an interlayer made of an oxide, nitride, or oxynitride of a semiconductor crystal constituting the semiconductor crystal layer, and a first insulating layer made of an oxide and in which the semiconductor crystal layer, the interlayer, and the first insulating layer are arranged in the stated order. The method includes (a) forming the first insulating layer on an original semiconductor crystal layer, and (b) exposing a surface of the first insulating layer with a nitrogen plasma to nitride, oxidize, or oxynitride a part of the original semiconductor crystal layer, thereby forming the interlayer, together with the semiconductor crystal layer that is the rest of the original semiconductor crystal layer.

Abstract: A semiconductor wafer is provided. The semiconductor wafer comprises a sacrificial layer, a first semiconductor crystal layer, and a second semiconductor crystal layer above a semiconductor crystal layer forming wafer, wherein the semiconductor crystal layer forming wafer, the sacrificial layer, the first semiconductor crystal layer and the second semiconductor crystal layer are arranged in the order of the semiconductor crystal layer forming wafer, the sacrificial layer, the first semiconductor crystal layer and the second semiconductor crystal layer, a first atom of one type selected from a plurality of types of atoms constituting the semiconductor crystal layer forming wafer or the sacrificial layer is contained in the first semiconductor crystal layer and the second semiconductor crystal layer as an impurity, and the concentration of the first atom in the second semiconductor crystal layer is lower than the concentration of the first atom in the first semiconductor crystal layer.

Abstract: A semiconductor wafer is provided. The semiconductor wafer comprises a sacrificial layer and a semiconductor crystal layer above a semiconductor crystal layer forming wafer, the semiconductor crystal layer forming wafer, the sacrificial layer and the semiconductor crystal layer being arranged in the order of the semiconductor crystal layer forming wafer, the sacrificial layer and the semiconductor crystal layer, wherein the semiconductor wafer comprises a diffusion inhibiting layer that inhibits diffusion of a first atom of one type selected from a plurality of types of atoms constituting the semiconductor crystal layer forming wafer or the sacrificial layer, at any cross-sectional position between (a) the interface of the semiconductor crystal layer forming wafer that faces the sacrificial layer and (b) a middle of the semiconductor crystal layer.

Abstract: A burst signal generator generates a burst signal that is a variable length portion whose length changes in accordance with fluctuations in data input at a predetermined period. An OFDM modulator generates an OFDM signal (including a guard interval portion and an effective symbol portion) that is a fixed length portion containing data corresponding to n (n is a positive integer) times or 1/n of the predetermined period. A frame includes the variable length portion and the fixed length portion. This makes a transmission signal actually have a frame period almost equal to the period of a signal synchronized with the clock of a player, including the fluctuations.

Abstract: A production apparatus ensures wireless communication without interference. An antenna portion 310 at a robotic arm includes a transmitting antenna portion 311 having a plurality of transmitting antennas 321 to 328 and a receiving antenna portion 312 having a plurality of receiving antennas 331 to 338. A transmitting side switcher circuit 361 changes over a transmitting antenna to be connected to a transmitter 351 among the plurality of transmitting antennas 321 to 328 in conjunction with an attitude information of the robotic arm, and changes an effective direction of a directional characteristic of the transmitting antenna portion 311. A receiving side switcher circuit 362 changes over a receiving antenna to be connected to a receiver 352 among the plurality of receiving antennas 331 to 338 in conjunction with the attitude information of the robotic arm and changes the effective direction of the directional characteristic of the receiving antenna portion 312.

Abstract: There is provided a semiconductor wafer including a base wafer whose surface is entirely or partially a silicon crystal plane, an inhibitor positioned on the base wafer to inhibit crystal growth and having an opening that reaches the silicon crystal plane, a first crystal layer made of SixGe1-x (0?x<1) and positioned on the silicon crystal plane that is exposed in the opening, a second crystal layer positioned on the first crystal layer and made of a III-V Group compound semiconductor that has a band gap width larger than a band gap width of the first crystal layer, and a pair of metal layers positioned on the inhibitor and the second crystal layer. The pair of the metal layers are each in contact with the first crystal layer and the second crystal layer.

Abstract: Electronic device is provided, including: a base wafer whose surface is made of silicon crystal; a Group 3-5 compound semiconductor crystal formed directly or indirectly on partial region of the silicon crystal; an electronic element including a portion of the Group 3-5 compound semiconductor crystal as active layer; an insulating film formed directly or indirectly on the base wafer and covering the electronic element; an electrode formed directly or indirectly on the insulating film; a first coupling wiring extending through the insulating film, having at least a portion thereof formed directly or indirectly on the insulating film, and electrically coupling the electronic element with the electrode; a passive element formed directly or indirectly on the insulating film; a second coupling wiring extending through the insulating film, having at least a portion thereof formed directly or indirectly on the insulating film, and electrically coupling the electronic element with the passive element.

Abstract: A communication apparatus performs communication of data using assigned time slots within a frame. In a case where data cannot be transmitted in a transmission time slot that has been assigned in order to transmit data, a time slot later than this transmission time slot is reserved as a time slot used to transmit the data, this later time slot being reserved within the frame having the transmission time slot in which the data cannot be transmitted.

Abstract: A sensor includes: a base wafer containing silicon; a seed member provided directly or indirectly on the base wafer; and a photothermal absorber that is made of a Group 3-5 compound semiconductor lattice-matching or pseudo lattice-matching the seed member and being capable of generating a carrier upon absorbing light or heat, where the photothermal absorber outputs an electric signal in response to incident light to be introduced into the photothermal absorber or heat to be applied to the photothermal absorber. A semiconductor wafer includes: a base wafer containing silicon; a seed member provided directly or indirectly on the base wafer; and a photothermal absorber that is made of a Group 3-5 compound semiconductor lattice-matching or pseudo lattice-matching the seed member and being capable of generating a carrier upon absorbing light or heat.

Abstract: A communication system including a parent station and a plurality of child stations, the parent station and the plurality of child stations being line-connected or loop-connected in a plurality of stages, and the parent station comprises a decision unit configured to decide, based on information representing states of the plurality of child stations, which one a first data relay method of transmitting data to a subsequent station in accordance with a clock reproduced from data received from a preceding station and a second data relay method of transmitting data to the subsequent station in accordance with a local clock generated in a local station should be employed by each of the plurality of child stations.

Abstract: The semiconductor wafer includes: a base wafer; and an inhibition layer that is disposed on the base wafer as one piece or to be separate portions from each other, and inhibits growth of a crystal of a compound semiconductor, where the inhibition layer has a plurality of first opening regions that have a plurality of openings penetrating the inhibition layer and leading to the base wafer, each of the plurality of first opening regions includes therein a plurality of first openings disposed in the same arrangement, some of the plurality of first openings are first element forming openings each provided with a first compound semiconductor on which an electronic element is to be formed, and the other of the plurality of first openings are first dummy openings in which no electronic element is to be formed.

Abstract: A high-quality GaAs-type crystal thin film using an inexpensive Si wafer with good thermal release characteristics is achieved. Provided is a semiconductor wafer comprising an Si wafer; a Ge layer that is crystal-grown on the wafer and shaped as an isolated island; a buffer layer that is crystal-grown on the Ge layer and is a group 3-5 compound semiconductor layer containing P; and a functional layer that is crystal-grown on the buffer layer. The Ge layer may be shaped as an island having a size that does not exceed double a distance moved by crystal defects as a result of annealing the Ge layer at a certain temperature for a certain time. The Ge layer may be shaped as an island having a size for which stress due to a difference relative to a thermal expansion coefficient of Si, which is material of the wafer, does not cause crystal defects when the Ge layer is annealed at a certain temperature.

Abstract: There is provided a method that includes forming a sacrificial layer and the semiconductor crystal layer on a semiconductor crystal layer formation wafer in the stated order, bonding together the semiconductor crystal layer formation wafer and a transfer-destination wafer such that a first surface of the semiconductor crystal layer and a second surface of the transfer-destination wafer face each other, and splitting the transfer-destination wafer from the semiconductor crystal layer formation wafer with the semiconductor crystal layer remaining on the transfer-destination wafer side, by etching away the sacrificial layer by immersing the semiconductor crystal layer formation wafer and the transfer-destination wafer wholly or partially in an etchant. Here, the transfer-destination wafer includes an inflexible wafer and an organic material layer, and a surface of the organic material layer is the second surface.

Abstract: A high-quality GaAs-type crystal thin film using an inexpensive Si wafer with good thermal release characteristics is achieved. Provided is a semiconductor wafer comprising an Si wafer; an inhibiting layer that is formed on the wafer and that inhibits crystal growth, the inhibiting layer including a covering region that covers a portion of the wafer and an open region that does not cover a portion of the wafer within the covering region; a Ge layer that is crystal-grown in the open region; a buffer layer that is crystal-grown on the Ge layer and is a group 3-5 compound semiconductor layer containing P; and a functional layer that is crystal-grown on the buffer layer. The Ge layer may be formed then annealing with a temperature and duration that enables movement of crystal defects.

Abstract: The objective is to improve capabilities such as high-speed switching of a compound semiconductor device. Provided is a semiconductor wafer comprising a silicon wafer; an insulating film that is formed on the silicon wafer and that has an open portion reaching the silicon wafer; a Ge crystal formed in the open portion; a seed compound semiconductor crystal that is grown with the Ge crystal as a nucleus and that protrudes beyond a surface of the insulating film; and a laterally grown compound semiconductor layer that is laterally grown on the insulating film with a specified surface of the seed compound semiconductor crystal as a seed surface.

Abstract: A semiconductor wafer including: a base wafer; a seed crystal disposed on the base wafer; a compound semiconductor disposed above the seed crystal; and a high resistance layer disposed between the seed crystal and the compound semiconductor, the high resistance layer having a larger resistivity than the seed crystal, and the seed crystal lattice matching or pseudo lattice matching the compound semiconductor is provided.