Abstract: A semiconductor component includes a semiconductor substrate, conductive vias in the substrate having terminal portions, a polymer layer on the substrate and back side conductors formed by the terminal portions of the conductive vias embedded in the polymer layer. A stacked semiconductor component includes a plurality of components having aligned conductive vias in electrical communication with one another.

Abstract: A device is disclosed which includes at least one integrated circuit die, at least a portion of which is positioned in a body of encapsulant material, and at least one conductive via extending through the body of encapsulant material.

Abstract: A device is disclosed which includes at least one integrated circuit die, at least a portion of which is positioned in a body of encapsulant material, and at least one conductive via extending through the body of encapsulant material.

Abstract: A device is disclosed which includes at least one integrated circuit die, at least a portion of which is positioned in a body of encapsulant material, and at least one conductive via extending through the body of encapsulant material.

Abstract: A device is disclosed which includes at least one integrated circuit die, at least a portion of which is positioned in a body of encapsulant material, and at least one conductive via extending through the body of encapsulant material.

Abstract: Microelectronic devices and method of forming a plurality of microelectronic devices on a semiconductor workpiece are disclosed herein. One such method includes placing a plurality of first interconnect elements on a side of a semiconductor workpiece, forming a layer on the side of the workpiece, reshaping the first interconnect elements by heating the first interconnect elements, and coupling a first portion of a plurality of individual second interconnect elements to corresponding first interconnect elements with a second portion of the individual second interconnect elements exposed.

Abstract: Microelectronic devices and method of forming a plurality of microelectronic devices on a semiconductor workpiece are disclosed herein. One such method includes placing a plurality of first interconnect elements on a side of a semiconductor workpiece, forming a layer on the side of the workpiece, reshaping the first interconnect elements by heating the first interconnect elements, and coupling a first portion of a plurality of individual second interconnect elements to corresponding first interconnect elements with a second portion of the individual second interconnect elements exposed.

Abstract: A semiconductor component includes a semiconductor substrate, conductive vias in the substrate having terminal portions, a polymer layer on the substrate and back side conductors formed by the terminal portions of the conductive vias embedded in the polymer layer. A stacked semiconductor component includes a plurality of components having aligned conductive vias in electrical communication with one another.

Abstract: A device is disclosed which includes at least one integrated circuit die, at least a portion of which is positioned in a body of encapsulant material, and at least one conductive via extending through the body of encapsulant material.

Abstract: A device is disclosed which includes at least one integrated circuit die, at least a portion of which is positioned in a body of encapsulant material, and at least one conductive via extending through the body of encapsulant material.

Abstract: Microelectronic devices and method of forming a plurality of microelectronic devices on a semiconductor workpiece are disclosed herein. One such method includes placing a plurality of first interconnect elements on a side of a semiconductor workpiece, forming a layer on the side of the workpiece, reshaping the first interconnect elements by heating the first interconnect elements, and coupling a first portion of a plurality of individual second interconnect elements to corresponding first interconnect elements with a second portion of the individual second interconnect elements exposed.

Abstract: Microelectronic devices and method of forming a plurality of microelectronic devices on a semiconductor workpiece are disclosed herein. One such method includes placing a plurality of first interconnect elements on a side of a semiconductor workpiece, forming a layer on the side of the workpiece, reshaping the first interconnect elements by heating the first interconnect elements, and coupling a first portion of a plurality of individual second interconnect elements to corresponding first interconnect elements with a second portion of the individual second interconnect elements exposed.

Abstract: Sensor packages and manners of formation are described. In an embodiment, a sensor package includes a supporting die characterized by a recess area and a support anchor protruding above the recess area. A sensor die is bonded to the support anchor such that an air gap exists between the sensor die and the recess area. The sensor die includes a sensor positioned directly above the air gap.

Abstract: MEMS packages, modules, and methods of fabrication are described. In an embodiment, a MEMS package includes a MEMS die and an IC die mounted on a front side of a surface mount substrate, and a molding compound encapsulating the IC die and the MEMS die on the front side of the surface mount substrate. In an embodiment, a landing pad arrangement on a back side of the surface mount substrate forms and anchor plane area for bonding the surface mount substrate to a module substrate that is not directly beneath the MEMS die.

Abstract: MEMS packages and modules are described. In an embodiment, a module includes a package mounted within an opening in a module board. The package includes a flexible wiring board mounted to a back surface of the module board and spanning across the opening in the module board. A die is mounted on the flexible wiring board and is encapsulated within an overmold. An air gap exists laterally between the overmold and side surface of the opening in the module board.

Abstract: Sensor packages and manners of formation are described. In an embodiment, a sensor package includes a supporting die characterized by a recess area and a support anchor protruding above the recess area. A sensor die is bonded to the support anchor such that an air gap exists between the sensor die and the recess area. The sensor die includes a sensor positioned directly above the air gap.

Abstract: Sensor packages and manners of formation are described. In an embodiment, a sensor package includes a supporting die characterized by a recess area and a support anchor protruding above the recess area. A sensor die is bonded to the support anchor such that an air gap exists between the sensor die and the recess area. The sensor die includes a sensor positioned directly above the air gap.

Abstract: MEMS packages, modules, and methods of fabrication are described. In an embodiment, a MEMS package includes a MEMS die and an IC die mounted on a front side of a surface mount substrate, and a molding compound encapsulating the IC die and the MEMS die on the front side of the surface mount substrate. In an embodiment, a landing pad arrangement on a back side of the surface mount substrate forms and anchor plane area for bonding the surface mount substrate to a module substrate that is not directly beneath the MEMS die.

Abstract: MEMS packages, modules, and methods of fabrication are described. In an embodiment, a MEMS package includes a MEMS die and an IC die mounted on a front side of a surface mount substrate, and a molding compound encapsulating the IC die and the MEMS die on the front side of the surface mount substrate. In an embodiment, a landing pad arrangement on a back side of the surface mount substrate forms and anchor plane area for bonding the surface mount substrate to a module substrate that is not directly beneath the MEMS die.

Abstract: MEMS packages, modules, and methods of fabrication are described. In an embodiment, a MEMS package includes a MEMS die and an IC die mounted on a front side of a surface mount substrate, and a molding compound encapsulating the IC die and the MEMS die on the front side of the surface mount substrate. In an embodiment, a landing pad arrangement on a back side of the surface mount substrate forms and anchor plane area for bonding the surface mount substrate to a module substrate that is not directly beneath the MEMS die.