Patents by Inventor Tony D. Flaim
Tony D. Flaim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210033975Abstract: Methods are disclosed to prepare permanent materials that can be coated onto microelectronic substrates or used for other structural or optical applications. The materials are thermally stable to at least about 300° C., curable using a photo or thermal process, exhibit good chemical resistance (including during metal passivation), and have a lifespan of at least about 5 years, preferably at least about 10 years, in the final device. Advantageously, these materials can also be bonded at room temperature. The materials exhibit no movement or squeeze-out after bonding and adhere to a variety of substrate types.Type: ApplicationFiled: July 31, 2020Publication date: February 4, 2021Inventors: Reihaneh Sejoubsari, Tony D. Flaim, Xiao Liu
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Publication number: 20200257202Abstract: Methods of preparing poly(cyanocinnamate)s are provided, with those involving mild conditions and resulting in a soluble polymer that is stable at room temperature and can be coated onto microelectronic substrates. The polymer includes at least one bis(cyanoacetate) monomer and at least one aromatic dialdehyde monomer. The polymer exhibits good thermal and structural properties and high absorbance in the UV range.Type: ApplicationFiled: February 7, 2020Publication date: August 13, 2020Inventors: Tony D. Flaim, Gu Xu, Jennifer S. See
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Patent number: 10617010Abstract: The present invention provides stencil-based processes for fan-out wafer-level packaging (“FOWLP”) that addresses the limitations associated with prior art over-molding of dies. In the inventive process, a temporary carrier is coated with a release layer and curable adhesive backing layer. A die stencil film is then laminated to the coated carrier, and the dies are placed inside pre-formed cavities created in the laminated stencil. The gaps between the dies and the stencil are filled with a curable polymeric material, and a redistribution layer is constructed according to conventional processes. This process results in better repeatability, lower bowing in the carrier, and enhanced downstream processing.Type: GrantFiled: August 29, 2017Date of Patent: April 7, 2020Assignee: Brewer Science, Inc.Inventor: Tony D. Flaim
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Patent number: 10304720Abstract: Dielectric materials with optimal mechanical properties for use in laser ablation patterning are proposed. These materials include a polymer selected from the group consisting of polyureas, polyurethane, and polyacylhydrazones. New methods to prepare suitable polyacylhydrazones are also provided. Those methods involve mild conditions and result in a soluble polymer that is stable at room temperature and can be incorporated into formulations that can be coated onto microelectronic substrates. The dielectric materials exhibit high elongation, low CTE, low cure temperature, and leave little to no debris post-ablation.Type: GrantFiled: July 14, 2017Date of Patent: May 28, 2019Assignee: Brewer Science, Inc.Inventors: Christina R. Matos-Perez, Tony D. Flaim, Arthur O. Southard, Lisa M. Kirchner, Deborah Blumenshine
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Patent number: 10103048Abstract: A process is disclosed for using two polymeric bonding material layers to bond a device wafer and carrier wafer in a way that allows debonding to occur between the two layers under low-force conditions at room temperature. Optionally, a third layer is included at the interface between the two layers of polymeric bonding material to facilitate the debonding at this interface. This process can potentially improve bond line stability during backside processing of temporarily bonded wafers, simplify the preparation of bonded wafers by eliminating the need for specialized release layers, and reduce wafer cleaning time and chemical consumption after debonding.Type: GrantFiled: August 28, 2014Date of Patent: October 16, 2018Assignee: Brewer Science, Inc.Inventors: Tony D. Flaim, Jeremy McCutcheon
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Publication number: 20180063963Abstract: The present invention provides stencil-based processes for fan-out wafer-level packaging (“FOWLP”) that addresses the limitations associated with prior art over-molding of dies. In the inventive process, a temporary carrier is coated with a release layer and curable adhesive backing layer. A die stencil film is then laminated to the coated carrier, and the dies are placed inside pre-formed cavities created in the laminated stencil. The gaps between the dies and the stencil are filled with a curable polymeric material, and a redistribution layer is constructed according to conventional processes. This process results in better repeatability, lower bowing in the carrier, and enhanced downstream processing.Type: ApplicationFiled: August 29, 2017Publication date: March 1, 2018Inventor: Tony D. Flaim
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Publication number: 20180019156Abstract: Dielectric materials with optimal mechanical properties for use in laser ablation patterning are proposed. These materials include a polymer selected from the group consisting of polyureas, polyurethane, and polyacylhydrazones. New methods to prepare suitable polyacylhydrazones are also provided. Those methods involve mild conditions and result in a soluble polymer that is stable at room temperature and can be incorporated into formulations that can be coated onto microelectronic substrates. The dielectric materials exhibit high elongation, low CTE, low cure temperature, and leave little to no debris post-ablation.Type: ApplicationFiled: July 14, 2017Publication date: January 18, 2018Inventors: Cristina R. Matos-Perez, Tony D. Flaim, Arthur O. Southard, Lisa M. Kirchner, Deborah Blumenshine
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Patent number: 9827740Abstract: The invention broadly relates to release layer compositions that enable thin wafer handling during microelectronics manufacturing. Preferred release layers are formed from compositions comprising a polyamic acid or polyimide dissolved or dispersed in a solvent system, followed by curing and/or solvent removal at about 250° C. to about 350° C. for less than about 10 minutes, yielding a thin film. This process forms the release compositions into polyimide release layers that can be used in temporary bonding processes, and laser debonded after the desired processing has been carried out.Type: GrantFiled: July 22, 2015Date of Patent: November 28, 2017Assignee: Brewer Science Inc.Inventors: Xiao Liu, Dongshun Bai, Tony D. Flaim, Xing-Fu Zhong, Qi Wu
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Patent number: 9827757Abstract: New temporary bonding methods and articles formed from those methods are provided. In one embodiment, the methods comprise coating a device or other ultrathin layer on a growth substrate with a rigid support layer and then bonding that stack to a carrier substrate. The growth substrate can then be removed and the ultrathin layer mounted on a final support. In another embodiment, the invention provides methods of handling device layers during processing that must occur on both sides of the fragile layer without damaging it. This is accomplished via the sequential use of two carriers, one on each side of the device layer, bonded with different bonding compositions for selective debonding.Type: GrantFiled: July 9, 2012Date of Patent: November 28, 2017Assignee: Brewer Science Inc.Inventors: Jeremy McCutcheon, Tony D. Flaim, Susan Bailey
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Patent number: 9472436Abstract: Multiple bonding layer schemes that temporarily join semiconductor substrates are provided. In the inventive bonding scheme, at least one of the layers is directly in contact with the semiconductor substrate and at least two layers within the scheme are in direct contact with one another. The present invention provides several processing options as the different layers within the multilayer structure perform specific functions. More importantly, it will improve performance of the thin-wafer handling solution by providing higher thermal stability, greater compatibility with harsh backside processing steps, protection of bumps on the front side of the wafer by encapsulation, lower stress in the debonding step, and fewer defects on the front side.Type: GrantFiled: May 8, 2014Date of Patent: October 18, 2016Assignee: Brewer Science Inc.Inventors: Rama Puligadda, Xing-Fu Zhong, Tony D. Flaim, Jeremy McCutcheon
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Patent number: 9263314Abstract: Multiple bonding layer schemes that temporarily join semiconductor substrates are provided. In the inventive bonding scheme, at least one of the layers is directly in contact with the semiconductor substrate and at least two layers within the scheme are in direct contact with one another. The present invention provides several processing options as the different layers within the multilayer structure perform specific functions. More importantly, it will improve performance of the thin-wafer handling solution by providing higher thermal stability, greater compatibility with harsh backside processing steps, protection of bumps on the front side of the wafer by encapsulation, lower stress in the debonding step, and fewer defects on the front side.Type: GrantFiled: August 4, 2011Date of Patent: February 16, 2016Assignee: Brewer Science Inc.Inventors: Rama Puligadda, Xing-Fu Zhong, Tony D. Flaim, Jeremy McCutcheon
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Publication number: 20160023436Abstract: The invention broadly relates to release layer compositions that enable thin wafer handling during microelectronics manufacturing. Preferred release layers are formed from compositions comprising a polyamic acid or polyimide dissolved or dispersed in a solvent system, followed by curing and/or solvent removal at about 250° C. to about 350° C. for less than about 10 minutes, yielding a thin film. This process forms the release compositions into polyimide release layers that can be used in temporary bonding processes, and laser debonded after the desired processing has been carried out.Type: ApplicationFiled: July 22, 2015Publication date: January 28, 2016Inventors: Xiao Liu, Dongshun Bai, Tony D. Flaim, Xing-Fu Zhong, Qi Wu
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Patent number: 9224631Abstract: Multiple bonding layer schemes that temporarily join semiconductor substrates are provided. In the inventive bonding scheme, at least one of the layers is directly in contact with the semiconductor substrate and at least two layers within the scheme are in direct contact with one another. The present invention provides several processing options as the different layers within the multilayer structure perform specific functions. More importantly, it will improve performance of the thin-wafer handling solution by providing higher thermal stability, greater compatibility with harsh backside processing steps, protection of bumps on the front side of the wafer by encapsulation, lower stress in the debonding step, and fewer defects on the front side.Type: GrantFiled: February 27, 2014Date of Patent: December 29, 2015Assignee: Brewer Science Inc.Inventors: Rama Puligadda, Xing-Fu Zhong, Tony D. Flaim, Jeremy McCutcheon
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Patent number: 9127126Abstract: New compositions and methods of using those compositions as bonding compositions for temporary wafer bonding are provided. The compositions are used to temporarily bond an active wafer to a carrier wafer or substrate in microelectronic fabrication using an in situ polymerization reaction of the components of the bonding composition to yield the bonding layer. The compositions form polymerized bonding layers that are mechanically strong and thermally resistant, but allow the wafers to be separated at the appropriate stage in the fabrication process. The bonding layer also retains its solubility so that residue can be cleaned from the debonded wafers using simple wet methods rather than etching or other harsh treatments.Type: GrantFiled: April 30, 2012Date of Patent: September 8, 2015Assignee: Brewer Science Inc.Inventors: Wenbin Hong, Tony D. Flaim, Rama Puligadda, Susan Bailey
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Patent number: 9111981Abstract: New temporary bonding methods and articles formed from those methods are provided. The methods comprise bonding a device wafer to a carrier wafer or substrate only at their outer perimeters in order to assist in protecting the device wafer and its device sites during subsequent processing and handling. The edge bonds formed by this method are chemically and thermally resistant, but can also be softened, dissolved, or mechanically disrupted to allow the wafers to be easily separated with very low forces and at or near room temperature at the appropriate stage in the fabrication process.Type: GrantFiled: January 23, 2009Date of Patent: August 18, 2015Assignee: Brewer Science Inc.Inventors: Tony D. Flaim, Jeremy McCutcheon
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Patent number: 9099512Abstract: New temporary bonding methods and articles formed from those methods are provided. The methods comprise bonding a device wafer to a carrier wafer or substrate only at their outer perimeters in order to assist in protecting the device wafer and its device sites during subsequent processing and handling. The edge bonds formed by this method are chemically and thermally resistant, but can also be softened, dissolved, or mechanically disrupted to allow the wafers to be easily separated with very low forces and at or near room temperature at the appropriate stage in the fabrication process.Type: GrantFiled: November 22, 2010Date of Patent: August 4, 2015Assignee: Brewer Science Inc.Inventors: Tony D. Flaim, Jeremy McCutcheon
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Publication number: 20150122426Abstract: Multiple bonding layer schemes that temporarily join semiconductor substrates are provided. In the inventive bonding scheme, at least one of the layers is directly in contact with the semiconductor substrate and at least two layers within the scheme are in direct contact with one another. The present invention provides several processing options as the different layers within the multilayer structure perform specific functions. More importantly, it will improve performance of the thin-wafer handling solution by providing higher thermal stability, greater compatibility with harsh backside processing steps, protection of bumps on the front side of the wafer by encapsulation, lower stress in the debonding step, and fewer defects on the front side.Type: ApplicationFiled: November 21, 2014Publication date: May 7, 2015Applicant: BREWER SCIENCE INC.Inventors: Rama Puligadda, Xing-Fu Zhong, Tony D. Flaim, Jeremy McCutcheon
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Publication number: 20150064385Abstract: A process is disclosed for using two polymeric bonding material layers to bond a device wafer and carrier wafer in a way that allows debonding to occur between the two layers under low-force conditions at room temperature. Optionally, a third layer is included at the interface between the two layers of polymeric bonding material to facilitate the debonding at this interface. This process can potentially improve bond line stability during backside processing of temporarily bonded wafers, simplify the preparation of bonded wafers by eliminating the need for specialized release layers, and reduce wafer cleaning time and chemical consumption after debonding.Type: ApplicationFiled: August 28, 2014Publication date: March 5, 2015Applicant: Brewer Science Inc.Inventors: Tony D. Flaim, Jeremy McCutcheon
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Patent number: 8836082Abstract: A novel reversal lithography process without etch back is described. The reversal material comprises nanoparticles that are selectively deposited into the gaps between features without overcoating the tops of the features. As a result, a patterned imaging layer can be removed using solvent, blanket exposure followed by developer washing, or dry etching directly, without an etch-back process, and the original bright field lithography pattern can be reversed into dark field features, and transferred into subsequent layers using the nanoparticle reversal material as an etch mask.Type: GrantFiled: January 31, 2011Date of Patent: September 16, 2014Assignee: Brewer Science Inc.Inventors: Qin Lin, Daniel M. Sullivan, Hao Xu, Tony D. Flaim
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Publication number: 20140239453Abstract: Multiple bonding layer schemes that temporarily join semiconductor substrates are provided. In the inventive bonding scheme, at least one of the layers is directly in contact with the semiconductor substrate and at least two layers within the scheme are in direct contact with one another. The present invention provides several processing options as the different layers within the multilayer structure perform specific functions. More importantly, it will improve performance of the thin-wafer handling solution by providing higher thermal stability, greater compatibility with harsh backside processing steps, protection of bumps on the front side of the wafer by encapsulation, lower stress in the debonding step, and fewer defects on the front side.Type: ApplicationFiled: May 8, 2014Publication date: August 28, 2014Applicant: Brewer Science Inc.Inventors: Rama Puligadda, Xing-Fu Zhong, Tony D. Flaim, Jeremy McCutcheon