Abstract: Digital control of actively mode-locked lasers where an active feedback control system is implemented to include a digital processor such as a microprocessor. The digital processor digitally extracts noise information from multiple monitor signals generated from the laser output and digitally diagnoses the operating condition of the laser based on the noise information. Based on the operating condition of the laser, the digital processor generates control signals to adjust the laser cavity to establish or regain the mode locking condition and to maintain the mode locking by reducing the output noise.

Abstract: A structure of metal-metal capacitor and the method for fabricating the metal-metal capacitor (MMC) is presented. Wherein the lower electrode of the metal-metal capacitor is located in the uppermost layer of said semiconductor structure. A bonding pad employed as the connection of the semiconductor structure and the outside can be fabricated with the upper electrode of said metal-metal capacitor. The above-mentioned process can fabricate a metal-metal capacitor over the uppermost layer of a semiconductor structure efficiently. Moreover, in said method, this invention can not only save a mask in the manufacture, but also raise the capacitance of the metal-metal capacitor by extending the electrode of the metal-metal capacitor.

Abstract: A method of manufacturing a low-leakage, high-performance device. A substrate having a gate electrode thereon is provided. A lightly doped, high-energy implantation is conducted to form a lightly doped source/drain terminal in the substrate. An offset spacer is formed on each sidewall of the gate electrode. A heavily doped implantation is conducted to form a heavily doped source/drain terminal in the substrate. The heavily doped source/drain terminal has a depth smaller than the lightly doped source/drain terminal. A protective spacer structure is formed on each sidewall of the gate electrode. A deep-penetration source/drain implantation is carried out to form a deep source/drain terminal in the substrate.

Abstract: A USB interface flash memory card reader is attached with a built-in flash memory so that the card reader itself provides a function of data storage in addition to a function of reading data in a flash memory card or writing data into the flash memory card.

Abstract: Bi-metal and other passive thermal compensators for mitigating thermal-induced variations in the length of a fiber loop. Exemplary applications in fiber lasers are described.

Abstract: The present invention provides a method to form a titanium-containing glue layer and to reduce the diffusion of boron ion into a titanium-containing glue layer. The primary step is a nitrogen-ion implantation process in which the nitrogen ions are implanted into an interface region between a boron-ion doped region and a titanium-containing glue layer to form a nitrogen-ion-containing doped region. Afterward, a titanium-containing glue layer is conformally deposited on the surface of the nitrogen-ion-containing doped region by a TiCl4-based CVD method. Because the temperature used in the CVD is so high that an ion diffusion occurs in the interface region between the nitrogen-ion-containing doped region and the titanium-containing glue layer, a titanium nitride layer is then formed in the interface region by a contact of the titanium ions and the nitrogen ions. The boron ions can not pass through the nitrogen-ion-containing doped region and the titanium nitride layer into the titanium-containing glue layer.

Abstract: A detachable laser pointer is constructed to include a mounting base, the mounting base having a smoothly arched rear coupling groove for coupling to the shaft of a golf putter and a locating plate of C-shaped cross section upwardly extended from the smoothly arched coupling groove for plugging in between the shaft and grip of the golf putter and a front receiving groove, a joint rotatably coupled to the receiving groove, a laser module pivoted to the joint and adapted for emitting a laser beam to aim the putter head of the golf putter to the hole.

Abstract: A lubricating arrangement for rotary device having an internal rotating member. The arrangement comprising a sleeve put on rotating member; at least one inlet in sleeve, being perpendicular to rotating member, and having one end adjacent rotating member and the other end open to reservoir; at least one outlet in sleeve, being perpendicular to rotating member, and having one end adjacent rotating member and the other end open to reservoir; and a plurality of auxiliary outlets in sleeve and each having one end adjacent rotating member and the other end open to reservoir. Preferably, each auxiliary outlet is at an angle about 0° to about 30° with respect to an axis perpendicular to rotating member.

Abstract: A method of manufacturing a low-leakage, high-performance device. A substrate having a gate electrode thereon is provided. A lightly doped, high-energy implantation is conducted to form a lightly doped source/drain terminal in the substrate. An offset spacer is formed on each sidewall of the gate electrode. A heavily doped implantation is conducted to form a heavily doped source/drain terminal in the substrate. The heavily doped source/drain terminal has a depth smaller than the lightly doped source/drain terminal. A protective spacer structure is formed on each sidewall of the gate electrode. A deep-penetration source/drain implantation is carried out to form a deep source/drain terminal in the substrate.

Abstract: A MOS transistor includes a substrate, an insulation layer, a gate and a dielectric layer. The substrate includes a drain and a source separately positioned on the surface of the substrate. The insulation layer is positioned on the surface of the substrate between the drain and the source. The gate includes a conducting layer positioned on the insulation layer having a bottom side, a top side, a left side and a right side, and a metallic silicide layer positioned on the top side of the conducting layer wherein the width of the metallic silicide layer is greater than that of the bottom side of the conducting layer. The dielectric layer covers the drain, the source and the metallic silicide layer. The transistor includes at least one empty side slot positioned between the dielectric layer and the left side or right side of the conducting layer below the metallic silicide layer.

Abstract: Digital control of actively mode-locked lasers where an active feedback control system is implemented to include a digital processor such as a microprocessor. The digital processor digitally extracts noise information from multiple monitor signals generated from the laser output and digitally diagnoses the operating condition of the laser based on the noise information. Based on the operating condition of the laser, the digital processor generates control signals to adjust the laser cavity to establish or regain the mode locking condition and to maintain the mode locking by reducing the output noise.

Abstract: The present invention provides a method of forming a metal-oxide-semiconductor (MOS) transistor on a surface of a substrate of a semiconductor wafer. A gate is firstly formed in a predetermined area on the surface of the substrate. A first ion implantation process using group VA elements as dopant is performed thereafter to form a first doped area in portions of the substrate adjacent to either side of the gate. By performing a second ion implantation process immediately after the first ion implantation process using group VIIIA or group IVA elements as dopant, a second doped area is formed in portions of the substrate adjacent to portions of the substrate under the first doped area. After depositing a rapid-thermal chemical vapor deposition (RTCVD) dielectric layer that covers both the substrate and the gate, a spacer on either side of the gate is finally formed by etching back the RTCVD dielectric layer.

Abstract: A gate oxide is formed on a silicon substrate of a semiconductor wafer. Fluorine (F) ions are doped into the gate oxide or the silicon substrate. A conductive layer is then formed on the gate oxide and an etching process is performed to etch the conductive layer to form a gate on the surface of the silicon substrate. Next, a low-temperature deposition process is performed in a hydrogen-containing environment to form silicon nitride layer on a surface of the silicon substrate, walls of the gate, and top of the gate. Finally, an etch back process is performed on the silicon nitride layer to form a spacer around the walls of the gate, followed by an ion implantation process to form a source and drain on the surface of the silicon substrate adjacent to the gate.

Abstract: A USB interface flash memory card reader is attached with a built-in flash memory so that the card reader itself provides a function of data storage in addition to a function of reading data in a flash memory card or writing data into the flash memory card.

Abstract: The present invention provides a method to fabricate an MOS transistor and to reduce the gate-induced-drain-leakage current. The method is primarily to form a mask on the top of the gate. Because of the screening of the mask, spaced regions will be formed between the gate and the lightly doped drain/source regions in an ion-implantation process. Afterward, By using another ion-implantation process with opposite conductive type ions, package regions is then formed between the substrate and the lightly doped drain/source regions. Then, a sidewall of the gate is formed, and the drain/source regions are also formed by an ion-implantation process. Finally, an anneal process is performed to complete the fabrication of the MOS transistor. Because of the existence of the spaced regions that we propose in advance, such design can avoid overlap between a gate and lightly doped drain/source regions. Consequently, the method provided in the present invention can decrease the problem of gate-induced-drain-leakage current.

Abstract: The present invention provides a MOS (metal-oxide-semiconductor) transistor with two empty side slots on its gate and method for forming the same. The MOS transistor comprises a substrate, an insulation layer, a gate and a dielectric layer. The substrate has a surface layer which comprises a drain and a source separately positioned on two separate areas of the surface layer. The insulation layer positioned on the surface of the substrate between the drain and the source. The gate comprises a conducting layer positioned on the insulation layer having a bottom side, a top side, a left side and a right side, and a metallic silicide layer positioned on the top side of the conducting layer for reducing resistance of the conducting layer wherein the width of the metallic silicide layer is greater than that of the bottom side of the conducting layer. The dielectric layer covers the drain, the source and the metallic silicide layer.

Abstract: A dual damascene Cu contact plug is provided which has a layer of selective tungsten formed between the dual damascene Cu contact plug and a source, drain, or gate electrode of a MOS transistor formed on a fully-depleted SOI substrate. The layer of selective tungsten is formed by using a selective W deposition and comprises of a WN/W composite to prevent the diffusion of copper atoms into the underlying silicon substrate.

Abstract: An enhanced compact micro memory card with write protection, comprises an enclosed casing, and a switch circuit of data write protection. The enclosed casing provides a micro controller and a plurality of memories therein, and has a connector for external connection. The switch circuit of data write protection provides a micro switch and the micro switch exposing outward the casing for switching an operation of write protection.

Abstract: A method of manufacturing a low-leakage, high-performance device. A substrate having a gate electrode thereon is provided. A lightly doped, high-energy implantation is conducted to form a lightly doped source/drain terminal in the substrate. An offset spacer is formed on each sidewall of the gate electrode. A heavily doped implantation is conducted to form a heavily doped source/drain terminal in the substrate. The heavily doped source/drain terminal has a depth smaller than the lightly doped source/drain terminal. A protective spacer structure is formed on each sidewall of the gate electrode. A deep-penetration source/drain implantation is carried out to form a deep source/drain terminal in the substrate.

Abstract: A method of fabricating a shallow trench isolation structure is disclosed. On a substrate, a pad oxide layer and a mask layer are successively formed. The pad oxide layer, the mask layer and a portion of the substrate are patterned to form a trench. After performing a rapid wet thermal process, a liner layer is formed on the exposed surface of the substrate, including the exposed silicon surface of the substrate in the trench and sidewalls and the surface of the mask layer. An oxide layer is deposited over the trench and the substrate and fills the trench. A planarization process is performed until the mask layer is exposed. The mask layer and the pad oxide layer are removed to complete the shallow trench isolation structure.