Patents by Inventor Tony Vanhoucke
Tony Vanhoucke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9269706Abstract: Methods and systems for processing a silicon wafer are disclosed. A method includes providing a flash memory region in the silicon wafer and providing a bipolar transistor with a polysilicon external base in the silicon wafer. The flash memory region and the bipolar transistor are formed by depositing a single polysilicon layer common to both the flash memory region and the bipolar transistor.Type: GrantFiled: December 6, 2013Date of Patent: February 23, 2016Assignee: NXP, B.V.Inventors: Evelyne Gridelet, Hans Mertens, Michiel Jos van Duuren, Tony Vanhoucke, Viet Thanh Dinh
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Patent number: 9240468Abstract: A semiconductor device and a method of making the same. The device includes a semiconductor substrate. The device also includes a bipolar transistor on the semiconductor substrate. The bipolar transistor includes an emitter. The bipolar transistor also includes a base located above the emitter. The bipolar transistor further includes a laterally extending collector located above the base. The collector includes a portion that extends past an edge of the base.Type: GrantFiled: March 24, 2014Date of Patent: January 19, 2016Assignee: NXP, B.V.Inventors: Tony Vanhoucke, Viet Thanh Dinh, Anco Heringa, Dirk Klaassen, Evelyne Gridelet, Jan Willem Slotboom
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Publication number: 20150263108Abstract: The disclosure relates to bipolar transistor devices and a method of fabricating the same. The device comprises a field plate, in an isolation region adjacent to a base-collector junction of said active region. The isolation region comprises a gate terminal arranged to be biased independently of a collector, base or emitter terminal of said transistor.Type: ApplicationFiled: March 12, 2015Publication date: September 17, 2015Inventors: Johannes Donkers, Viet Thanh Dinh, Tony Vanhoucke, Evelyne Gridelet, Anco Heringa, Dirk Klaassen
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Patent number: 9111987Abstract: Consistent with an example embodiment, a bipolar transistor comprises an emitter region vertically separated from a collector region in a substrate by a base region. The bipolar transistor further comprises a field plate electrically connected to the emitter region; the field plate extends from the emitter region along the base region into the collector region and the field plate is laterally electrically insulated from the base region and the collector region by a spacer. The spacer comprises an electrically isolating material that includes a silicon nitride layer and is vertically electrically isolated from the substrate by a further electrically isolating material.Type: GrantFiled: April 23, 2014Date of Patent: August 18, 2015Assignee: NXP, B.V.Inventors: Evelyne Gridelet, Johannes Donkers, Petrus Hubertus Cornelis Magnee, Viet Dinh, Tony Vanhoucke
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Publication number: 20150145005Abstract: Disclosed is a transistor having a first region of a first conductivity type for injecting charge carriers into the transistor and a laterally extended second region) of the first conductivity type having a portion including a contact terminal for draining said charge carriers from the transistor, wherein the first region is separated from the second region by an intermediate region of a second conductivity type defining a first p-n junction with the first region and a second p-n junction with the second region, wherein the laterally extended region separates the portion from the second p-n junction, and wherein the transistor further comprises a substrate having a doped region of the second conductivity type, said doped region being in contact with and extending along the laterally extended second region and a further contact terminal connected to the doped region for draining minority charge carriers from the laterally extended second region.Type: ApplicationFiled: November 17, 2014Publication date: May 28, 2015Inventors: Viet Thanh Dinh, Tony Vanhoucke, Evelyne Gridelet, Anco Heringa, Jan Willem Slotboom, Dirk Klaassen
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Patent number: 9018681Abstract: Consistent with an example embodiment, there is method of manufacturing a bipolar transistor comprising providing a substrate including an active region; depositing a layer stack; forming a base window over the active region in said layer stack; forming at least one pillar in the base window, wherein a part of the pillar is resistant to polishing; depositing an emitter material over the resultant structure, thereby filling said base window; and planarizing the deposited emitter material by polishing. Consistent with another example embodiment, a bipolar transistor may be manufactured according to the afore-mentioned method.Type: GrantFiled: November 22, 2011Date of Patent: April 28, 2015Assignee: NXP B.V.Inventors: Evelyne Gridelet, Tony Vanhoucke, Johannes Josephus Theodorus Marinus Donkers, Hans Mertens, Blandine Duriez
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Publication number: 20150041862Abstract: Disclosed is a method of manufacturing an integrated circuit comprising a bipolar transistor, the method comprising providing a substrate (10) comprising a pair of first isolation regions (12) separated from each other by an active region (11) comprising a collector impurity said bipolar transistor; forming a base layer stack (14, 14?) over said substrate; forming a further stack of a migration layer (15) having a first migration temperature and an etch stop layer (20) over said base layer stack (14); forming a base contact layer (16) having a second migration temperature over the further stack, the second migration temperature being higher than the first migration temperature; etching an emitter window (28) in the base contact layer over the active region, said etching step terminating at the etch stop layer; at least partially removing the etch stop layer, thereby forming cavities (29) extending from the emitter window in between the base contact layer and the redistribution layer; and exposing the resultanType: ApplicationFiled: October 27, 2014Publication date: February 12, 2015Applicant: NXP B.V.Inventors: Johannes Josephus Theodorus Marinus DONKERS, Petrus Hubertus Cornelis MAGNEE, Blandine DURIEZ, Evelyne GRIDELET, Hans MERTENS, Tony VANHOUCKE
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Patent number: 8946042Abstract: Disclosed is a method of manufacturing a bipolar transistor, comprising providing a substrate (10) comprising a first isolation region (12) separated from a second isolation region by an active region (11) comprising a collector impurity; forming a layer stack over said substrate, said layer stack comprising a base layer (14, 14?), a silicon capping layer (15) over said base layer and a silicon-germanium (SiGe) base contact layer (40) over said silicon capping layer; etching the SiGe base contact layer to form an emitter window (50) over the collector impurity, wherein the silicon emitter cap layer is used as etch stop layer; forming sidewall spacers (22) in the emitter window; and filling the emitter window with an emitter material (24). A bipolar transistor manufactured in accordance with this method and an IC comprising one or more of such bipolar transistors are also disclosed.Type: GrantFiled: February 11, 2014Date of Patent: February 3, 2015Assignee: NXP, B.V.Inventors: Evelyne Gridelet, Johannes Josephus Theodorus Marinus Donkers, Tony Vanhoucke, Petrus Hubertus Cornelis Magnee, Hans Mertens, Blandine Duriez
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Publication number: 20150028847Abstract: A method of identifying a component by a response to a challenge is disclosed, the component comprising an array of bipolar transistors connectable in parallel so as to have a common collector contact, a common emitter contact and a common base contact, the challenge comprising a value representative of a total collector current value, the method comprising: receiving the challenge; supplying the total collector current to the common collector contact; detecting instability in each of a group of the transistors; and determining the response in dependence on the group. A circuit configured to operate such a method is also disclosed.Type: ApplicationFiled: June 18, 2014Publication date: January 29, 2015Inventors: Tony Vanhoucke, Viet Nguyen
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Patent number: 8901669Abstract: A method of manufacturing an integrated circuit comprising bipolar transistors including first and second type bipolar transistors, the method comprising providing a substrate comprising first isolation regions each separated from a second isolation region by an active region comprising a collector impurity of one of the bipolar transistors; forming a base layer stack over the substrate; forming a first emitter cap layer of a first effective thickness over the base layer stack in the areas of the first type bipolar transistor; forming a second emitter cap layer of a second effective thickness different from the first effective thickness over the base layer stack in the areas of the second type bipolar transistor; and forming an emitter over the emitter cap layer of each of the bipolar transistors. An IC in accordance with this method.Type: GrantFiled: July 27, 2012Date of Patent: December 2, 2014Assignee: NXP, B.V.Inventors: Hans Mertens, Johannes Theodorus Marinus Donkers, Evelyne Gridelet, Tony Vanhoucke, Petrus Hubertus Cornelis Magnee
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Publication number: 20140347135Abstract: The invention provides a bipolar transistor circuit and a method of controlling a bipolar transistor, in which the bipolar transistor has a gate terminal for controlling the electric field in a collector region of the transistor. The bias voltage applied to the gate terminal is controlled to achieve different transistor characteristics.Type: ApplicationFiled: May 22, 2014Publication date: November 27, 2014Applicant: NXP B.V.Inventors: Viet Thanh Dinh, Godefridus Adrianus Maria Hurxk, Tony Vanhoucke, Jan Slotboom, Anco Heringa, Ivan Zahariev, Evelyne Gridelet
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Publication number: 20140347131Abstract: A circuit, comprising a semiconductor device with one or more field gate terminals for controlling the electric field in a drift region of the semiconductor device; and a feedback circuit configured to dynamically control a bias voltage or voltages applied to the field gate terminal or terminals, with different control voltages used for different semiconductor device characteristics in real-time in response to a time-varying signal at a further node in the circuit.Type: ApplicationFiled: May 23, 2014Publication date: November 27, 2014Applicant: NXP B.V.Inventors: Viet Thanh Dinh, Godefridus Antonius Maria Hurxk, Tony Vanhoucke, Jan Willem Slotboom, Anco Heringa, Ivan Zahariev, Evelyne Gridelet
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Publication number: 20140327110Abstract: Consistent with an example embodiment, a bipolar transistor comprises an emitter region vertically separated from a collector region in a substrate by a base region. The bipolar transistor further comprises a field plate electrically connected to the emitter region; the field plate extends from the emitter region along the base region into the collector region and the field plate is laterally electrically insulated from the base region and the collector region by a spacer. The spacer comprises an electrically isolating material that includes a silicon nitride layer and is vertically electrically isolated from the substrate by a further electrically isolating material.Type: ApplicationFiled: April 23, 2014Publication date: November 6, 2014Applicant: NXP B.V.Inventors: Evelyne Gridelet, Johannes Donkers, Petrus Hubertus Cornelis Magnee, Viet Dinh, Tony Vanhoucke
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Patent number: 8872237Abstract: Disclosed is a method of manufacturing a heterojunction bipolar transistor comprising a substrate, an upper region of said substrate comprising an active region of the bipolar transistor bordered by shallow trench insulation, said active region comprising a buried collector region extending to a depth beyond the depth of the shallow trench insulation, the method comprising forming a trench in the substrate adjacent to said active region, said trench extending through the shallow trench insulation; at least partially filling said trench with an impurity; and forming a collector sinker in the substrate by developing said impurity to extend into the substrate to a depth beyond the depth of the shallow trench insulation. An IC comprising a heterojunction bipolar transistor manufactured by this method is also disclosed.Type: GrantFiled: November 18, 2011Date of Patent: October 28, 2014Assignee: NXP, B.V.Inventors: Tony Vanhoucke, Johannes Josephus Theodorus Marinus Donkers, Hans Mertens, Blandine Duriez, Evelyne Gridelet
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Patent number: 8871599Abstract: Disclosed is an integrated circuit and a method of manufacturing an integrated circuit comprising a bipolar transistor, the method comprising providing a substrate comprising a pair of isolation regions separated by an active region comprising a collector; forming a base layer stack over said substrate; forming a migration layer having a first migration temperature and an etch stop layer; forming a base contact layer having a second migration temperature; etching an emitter window in the base contact layer, thereby forming cavities extending from the emitter window; and exposing the resultant structure to the first migration temperature in a hydrogen atmosphere, thereby filling the cavities with the migration layer material.Type: GrantFiled: August 30, 2012Date of Patent: October 28, 2014Assignee: NXP, B.V.Inventors: Johannes Josephus Theodorus Marinus Donkers, Petrus Hubertus Cornelis Magnee, Blandine Duriez, Evelyne Gridelet, Hans Mertens, Tony Vanhoucke
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Publication number: 20140312356Abstract: A semiconductor device and a method of making the same. The device includes a semiconductor substrate. The device also includes a bipolar transistor on the semiconductor substrate. The bipolar transistor includes an emitter. The bipolar transistor also includes a base located above the emitter. The bipolar transistor further includes a laterally extending collector located above the base. The collector includes a portion that extends past an edge of the base.Type: ApplicationFiled: March 24, 2014Publication date: October 23, 2014Applicant: NXP B.V.Inventors: Tony Vanhoucke, Viet Thanh Dinh, Anco Heringa, Dirk Claasen, Evelyne Gridelet, Jan Willem Slotboom
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Patent number: 8803156Abstract: A method of manufacturing a heterojunction bipolar transistor, including providing a substrate comprising an active region bordered by shallow trench insulation regions; depositing a stack of a dielectric layer and a polysilicon layer over the substrate; forming a base window in the stack, the base window extending over the active region and part of the shallow trench insulation regions, the base window having a trench extending vertically between the active region and one of the shallow trench insulation regions; growing an epitaxial base material inside the base window; forming a spacer on the exposed side walls of the base material; and filling the base window with an emitter material. A HBT manufactured in this manner and an IC including such an HBT.Type: GrantFiled: August 9, 2011Date of Patent: August 12, 2014Assignee: NXP, B.V.Inventors: Tony Vanhoucke, Johannes Josephus Theodorus Marinus Donkers, Hans Mertens, Blandine Duriez, Evelyne Marie Josephe Fabienne Gridelet
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Publication number: 20140167055Abstract: Methods and systems for processing a silicon wafer are disclosed. A method includes providing a flash memory region in the silicon wafer and providing a bipolar transistor with a polysilicon external base in the silicon wafer. The flash memory region and the bipolar transistor are formed by depositing a single polysilicon layer common to both the flash memory region and the bipolar transistor.Type: ApplicationFiled: December 6, 2013Publication date: June 19, 2014Applicant: NXP B.V.Inventors: Evelyne Gridelet, Hans Mertens, Michiel Jos van Duuren, Tony Vanhoucke, Viet Thanh Dinh
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Publication number: 20140162426Abstract: Disclosed is a method of manufacturing a bipolar transistor, comprising providing a substrate (10) comprising a first isolation region (12) separated from a second isolation region by an active region (11) comprising a collector impurity; forming a layer stack over said substrate, said layer stack comprising a base layer (14, 14?), a silicon capping layer (15) over said base layer and a silicon-germanium (SiGe) base contact layer (40) over said silicon capping layer; etching the SiGe base contact layer to form an emitter window (50) over the collector impurity, wherein the silicon emitter cap layer is used as etch stop layer; forming sidewall spacers (22) in the emitter window; and filling the emitter window with an emitter material (24). A bipolar transistor manufactured in accordance with this method and an IC comprising one or more of such bipolar transistors are also disclosed.Type: ApplicationFiled: February 11, 2014Publication date: June 12, 2014Applicant: NXP B.V.Inventors: Evelyne Gridelet, Johannes Josephus Theodorus Marinus Donkers, Tony Vanhoucke, Petrus Hubertus Cornelis Magnee, Hans Mertens, Blandine Duriez
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Patent number: 8704335Abstract: A bipolar transistor is fabricated having a collector (52) in a substrate (1) and a base (57, 58) and an emitter (59) formed over the substrate. The base has a stack region (57) which is laterally separated from the emitter (59) by an electrically insulating spacer (71). The insulating spacer (71) has a width dimension at its top end at least as large as the width dimension at its bottom end and forms a ?-shape or an oblique shape. The profile reduces the risk of silicide bridging at the top of the spacer in subsequent processing, while maintaining the width of emitter window.Type: GrantFiled: March 30, 2011Date of Patent: April 22, 2014Assignee: NXP, B.V.Inventors: Tony Vanhoucke, Johannes Josephus Theodorus Marinus Donkers, Hans Mertens, Philippe Meunier-Beillard