Patents by Inventor Tooru Iwagami

Tooru Iwagami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6653864
    Abstract: In an interface between a high-active driving circuit for driving a predetermined semiconductor power element and a microcomputer for controlling an output signal of the driving circuit, the microcomputer comprises a transistor, a collector terminal of which is an output side of the microcomputer; and the driving circuit comprises a first resistor, one end of which is directly connected with the output side of the microcomputer; a Schmidt circuit which is connected in series with the other end of the first resistor; a diode, an anode side of which is connected to a path between the first resistor and the Schmidt circuit; a power supply voltage connected with a cathode side of the diode; and a second resistor, one end of which is grounded and the other end of which is connected with a side of the first resistor being an input terminal of the driving circuit.
    Type: Grant
    Filed: April 12, 2002
    Date of Patent: November 25, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tooru Iwagami, Hiroshi Sakata, Shinya Shirakawa
  • Publication number: 20020180481
    Abstract: In an interface between a high-active driving circuit for driving a predetermined semiconductor power element and a microcomputer for controlling an output signal of the driving circuit, the microcomputer comprises a transistor, a collector terminal of which is an output side of the microcomputer; and the driving circuit comprises a first resistor, one end of which is directly connected with the output side of the microcomputer; a Schmidt circuit which is connected in series with the other end of the first resistor; a diode, an anode side of which is connected to a path between the first resistor and the Schmidt circuit; a power supply voltage connected with a cathode side of the diode; and a second resistor, one end of which is grounded and the other end of which is connected with a side of the first resistor being an input terminal of the driving circuit.
    Type: Application
    Filed: April 12, 2002
    Publication date: December 5, 2002
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Tooru Iwagami, Hiroshi Sakata, Shinya Shirakawa
  • Patent number: 6239998
    Abstract: An inverter circuit to reduce a resistor for overcurrent detection and decrease the number of filters in an inverter circuit for supplying polyphase power. Transistors each having a current detection terminal and a protective diode for regenerative current are adopted as switching elements on an “L” side and their current detection terminals are connected in common to a resistor. Therefore, a voltage drop caused by a current flowing in the resistor becomes larger when an overcurrent flows in at least one of the transistors and further when an overcurrent flows in a switching element on an “H” side even if no overcurrent flows in any one of the transistors.
    Type: Grant
    Filed: May 30, 2000
    Date of Patent: May 29, 2001
    Assignee: Mitusbishi Denki Kabushiki Kaisha
    Inventors: Gorab Majumdar, Mitsutaka Iwasaki, Tooru Iwagami, Khalid Hassan Hussein
  • Patent number: 6018474
    Abstract: A capacitive element is charged with no excessive flow of current so that a potential to effect the operation of a switching element can be obtained with stability. A capacitor (30) is charged with a circulating current from a load (40). On the charging path, a resistor (21) is provided in series to prevent an excessive flow of the charging current. Between terminals (V.sub.B, V.sub.S) of an upper-arm driving circuit (25) which receive a voltage to effect the operation of an IGBT (34) of an upper arm, the capacitor (30) and the resistor (21) are provided to suppress a decrease in potential (V.sub.B) at the terminal (V.sub.B).
    Type: Grant
    Filed: June 4, 1999
    Date of Patent: January 25, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Khalid Hassan Hussein, Tooru Iwagami, Mitsutaka Iwasaki, Kazuaki Hiyama
  • Patent number: 6002166
    Abstract: The present invention relates a semiconductor device, and in particular, it aims at providing a semiconductor device having high reliability by making coating of a region where a gold wire has been used, which has been performed for preventing deformation and breakage of the gold wire in pressure fitting of resin, unnecessary and preventing deformation and breakage of the gold wire without increasing the fabrication cost, in a semiconductor device packaging a power device and a control device controlling this power device. In order to attain the aforementioned object, a mold gate (21) is provided on a molding die (20) employed in fabrication of the semiconductor device to be positioned on a side where a power device (PD) is arranged in a state placing a lead frame (10).
    Type: Grant
    Filed: July 28, 1998
    Date of Patent: December 14, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Sukehisa Noda, Shinji Yamada, Tooru Iwagami, Seiki Iwagaki, Hisashi Kawafuji
  • Patent number: 5998856
    Abstract: The present invention relates to a semiconductor device, and more particularly, it aims at providing a semiconductor device which is excellent in workability of assembly and reduces the assembly cost in a semiconductor device packaging a power device and a control device controlling this power device.In order to attain the aforementioned object, it shows a lead frame (10) before mounting a power device (PD) and a control device (CD), and a region where a gold wire (W2) is arranged and a region where the power device (PD) is arranged are silver-plated regions (A). Further, a region where an aluminum wire (W1) is arranged is a nickel-plated region (B). Further, a power device die pad (1A) is connected to a tie bar (5) and a frame (6) by suspension leads (40 to 45), and supported in three directions. Further, an intermediate lead (3A to 3D) is formed in the vicinity of the control device (CD).
    Type: Grant
    Filed: July 28, 1998
    Date of Patent: December 7, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Sukehisa Noda, Shinji Yamada, Tooru Iwagami, Seiki Iwagaki, Hisashi Kawafuji
  • Patent number: 5834842
    Abstract: A groove (21) is formed on an upper surface of sealing resin (2) in the form of a strip. A device (101) is pressed against a flat surface of a radiating fin (55) by a band plate shaped clamper (61) which is engaged with the groove (21). Due to the engagement of the clamper (61) and the groove (21), movement of the device (101) is limited. Namely, the device (101) is stably fixed to the radiating fin (55). Since the device (101) is fixed to the radiating fin (55) by the clamper (61), no hole for receiving a fastening screw is provided in the sealing resin (2). Therefore, the sealing resin (2) is reduced, whereby miniaturization of the device (101) is implemented. Thus, the device is miniaturized at no sacrifice of radiation efficiency.
    Type: Grant
    Filed: October 27, 1997
    Date of Patent: November 10, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Gourab Majumdar, Satoshi Mori, Sukehisa Noda, Tooru Iwagami, Yoshio Takagi, Hisashi Kawafuji
  • Patent number: 5773883
    Abstract: In a device (101) formed as an invertor, terminals connected to floating source pins (VS) which are provided in control circuits (31 to 33) are limited to output terminals (U, V, W). In order to hold voltages across floating source pins (VD, VS), capacitive elements (51 to 53) which are provided around the device (101) are connected to the output terminals (U, V, W). Thus, the terminals which are connected with the floating source pins (VS) are shared by the output terminals (U, V, W), whereby the numbers of the terminals and wiring patterns are reduced. Thus, the device (101) is miniaturized.
    Type: Grant
    Filed: June 13, 1996
    Date of Patent: June 30, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Gourab Majumdar, Satoshi Mori, Sukehisa Noda, Tooru Iwagami, Yoshio Takagi, Hisashi Kawafuji
  • Patent number: 5747876
    Abstract: It is an object to facilitate assembly of an application device. A device (101) is provided with a heat sink (51) to radiate loss heat of an IGBT element (11) as a power semiconductor element to an external radiation fin. External terminals (5 and 6) connected to an external circuit substrate protrude in the direction in which the exposed surface of the heat sink (51) is directed. Accordingly, when assembling an application device by mounting the device (101) on the external circuit substrate together with other circuit elements, it is possible to mount the device (101) and other circuit elements together on the common main surface of the circuit substrate, i.e., on its main surface on the side opposite to the side where the radiation fin is attached. Accordingly, it is possible to collectively apply solder on the common main surface of the circuit substrate and collectively solder the device (101) and the other circuit elements.
    Type: Grant
    Filed: July 16, 1996
    Date of Patent: May 5, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Gourab Majumdar, Satoshi Mori, Sukehisa Noda, Tooru Iwagami, Yoshio Takagi, Hisashi Kawafuji
  • Patent number: 5703399
    Abstract: A blanked lead frame serves both as an interconnection pattern for a control circuit and a power circuit and as external terminals. Highly heat conducting resin having an electric insulating property is put between the lead frame and the heat sink arranged to face each other to maintain good thermal conductivity therebetween. The heat sink and the lead frame are coupled easily and fixedly by performing a simple process of sealing with the highly heat conducting resin. Accordingly, no expensive circuit boards are required, which have been necessary in conventional devices, nor a process of patterning the interconnection pattern and a process of connecting the external terminals to the interconnection pattern when manufacturing the device required. That is to say, the manufacturing cost is reduced without deteriorating the heat radiating characteristic.
    Type: Grant
    Filed: May 15, 1996
    Date of Patent: December 30, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Gourab Majumdar, Tooru Iwagami, Sukehisa Noda
  • Patent number: 5672910
    Abstract: It is an object to downsize a device while maintaining a high breakdown voltage. An external terminal (7) protrudes to the outside from the side wall of a sealing resin (2) and a heat sink (1) is exposed in the bottom of the sealing resin (2). A step surface (21) retracted from the exposed surface of the heat sink (1) is formed in the part of the sealing resin (2) surrounding the periphery of the heat sink (1). When using this semiconductor device, the exposed surface of the heat sink (1) is brought into surface contact with the flat surface (41a) of the radiation fin (41) and an insulation sheet (31) is interposed between the step surface (21) and the flat surface (41a), and which is pressed therebetween. The insulation sheet (31) is disposed to cover the region facing the external terminal (7) in the flat surface (41a).
    Type: Grant
    Filed: June 13, 1996
    Date of Patent: September 30, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Gourab Majumdar, Satoshi Mori, Sukehisa Noda, Tooru Iwagami, Yoshio Takagi, Hisashi Kawafuji
  • Patent number: RE39109
    Abstract: An inverter circuit to reduce a resistor for overcurrent detection and decrease the number of filters in an inverter circuit for supply polyphase power. Transistors each having a current detection terminal and a protective diode for regenerative current are adopted as switching elements on an “L” side and their current detection terminals are connected in common to a resistor. Therefore, a voltage drop caused by a current flowing in the resisytor becomes larger when an overcurrent flows in at least one of the transistors and further when an overcurrent flows in a switching element on an “H” side even if no overcurrent flows in any one of the transistors.
    Type: Grant
    Filed: September 30, 1998
    Date of Patent: May 30, 2006
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Gorab Majumdar, Mitsutaka Iwasaki, Tooru Iwagami, Khalid Hassan Hussein
  • Patent number: D394244
    Type: Grant
    Filed: May 24, 1996
    Date of Patent: May 12, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Gorab Majumdar, Satoshi Mori, Sukehisa Noda, Tooru Iwagami, Yoshio Takagi, Hisashi Kawafuji
  • Patent number: D401912
    Type: Grant
    Filed: May 28, 1996
    Date of Patent: December 1, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Gorab Majumdar, Satoshi Mori, Sukehisa Noda, Tooru Iwagami, Yoshio Takagi, Hisashi Kawafuji