Semiconductor device

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Description

FIG. 1 is a top, front and right side perspective view of semiconductor device showing our new design;

FIG. 2 is a front elevational view thereof;

FIG. 3 is a top plan view thereof;

FIG. 4 is a bottom plan view thereof;

FIG. 5 is a rear elevational view thereof; and,

FIG. 6 is a right side view thereo, the left side being a mirror image of the side shown.

Referenced Cited
U.S. Patent Documents
D288922 March 24, 1987 Olla
D357901 May 2, 1995 Horman
3762039 October 1973 Douglass et al.
4012766 March 15, 1977 Phillips et al.
5095360 March 10, 1992 Kizaki et al.
Foreign Patent Documents
5-15449 February 1993 JPX
7-250485 September 1995 JPX
Other references
  • Toshiba GTR Module 1989, p. 26. Mitsubishi '85 M53200P Series, 1985.
Patent History
Patent number: D401912
Type: Grant
Filed: May 28, 1996
Date of Patent: Dec 1, 1998
Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo)
Inventors: Gorab Majumdar (Tokyo), Satoshi Mori (Tokyo), Sukehisa Noda (Tokyo), Tooru Iwagami (Tokyo), Yoshio Takagi (Tokyo), Hisashi Kawafuji (Tokyo)
Primary Examiner: Jeffrey Asch
Assistant Examiner: Cathron B. Matta
Law Firm: Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
Application Number: 0/55,038
Classifications
Current U.S. Class: Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)
International Classification: 1303;