Abstract: Quantum devices with chains of quantum dots for controlling tunable couplings between Majorana zero modes (MZMs) are described. Methods for controlling tunable couplings between MZMs using such chains of quantum dots are also described. An example quantum device comprises at least one superconducting island configurable to support at least one pair of Majorana zero modes (MZMs). The quantum device may further include a region adjacent to at least one MZM of the at least one pair of MZMs, where the region is configurable to realize a chain of quantum dots for controlling a tunable coupling between the at least one MZM of the at least one pair of MZMs and another MZM.

Abstract: A computing system including a topological quantum computing device, including a plurality of Majorana islands that form a plurality of physical qubits. The computing system further includes a controller configured to, for each of the physical qubits, in a measurement-based qubit benchmarking (MBQB) stage, determine an error metric value of a qubit error metric associated with the physical qubit. Determining the error metric value includes, at the Majorana island that forms the physical qubit, performing a Pauli measurement sequence including a plurality of Pauli measurements. Determining the error metric value further includes computing the error metric value based at least in part on respective results of the plurality of Pauli measurements. The controller is further configured to output the error metric value.

Abstract: Quantum devices formed from a single superconducting wire having a configurable ground connection are described. An example quantum device, configurable to be grounded, comprises a single superconducting wire having at least a first section and a second section, each of which is configurable to be in a topological phase and at least a third section configurable to be in a trivial phase. The quantum device further comprises semiconducting regions formed adjacent to the single superconducting wire, where the single superconducting wire is configurable to store quantum information in at least four Majorana zero modes (MZMs). The semiconducting regions formed adjacent to the single superconducting wire may be used to measure quantum information stored in the at least four MZMs.

Abstract: Examples are disclosed that relate to tuning a topological qubit device. One example provides, on a quantum computing device, a method of tuning a topological qubit device into a Majorana Parity Readout (MPR) configuration. The method comprises performing optimization of an MPR signal by iteratively adjusting one or more tuning parameters of a plurality of tuning parameters, the plurality of tuning parameters comprising a quantum dot (QD) detuning, an enclosed flux, a voltage of a topological wire, a QD-Majorana zero mode (MZM) coupling, and a QD-QD coupling. Performing optimization of the MPR signal further comprises iteratively measuring the MPR signal using a readout resonator. Optimization of the MPR signal is iteratively performed until reaching a success metric.

Abstract: Quantum devices with two-sided or single-sided dual-purpose Majorana zero mode (MZM) junctions are described. An example quantum device comprises at least one superconducting island configurable to support at least one pair of Majorana zero modes (MZMs). The quantum device further includes a first conductor configurable to be coupled with at least one MZM of the at least one pair of MZMs, where the first conductor is configurable to be in at least one of a grounded state or a Coulomb blockade state. The quantum device further includes a second conductor configurable to be coupled with the at least one MZM of the at least one pair of MZMs, where the second conductor is configurable to be in at least one of a grounded state or a Coulomb blockade state.

Abstract: Quantum devices formed from a single superconducting wire having a configurable ground connection are described. An example quantum device, configurable to be grounded, comprises a single superconducting wire having at least a first section and a second section, each of which is configurable to be in a topological phase and at least a third section configurable to be in a trivial phase. The quantum device further comprises semiconducting regions formed adjacent to the single superconducting wire, where the single superconducting wire is configurable to store quantum information in at least four Majorana zero modes (MZMs). The semiconducting regions formed adjacent to the single superconducting wire may be used to measure quantum information stored in the at least four MZMs.

Abstract: A method for use with a topological quantum computing device is provided. The method may include setting a plurality of device parameters for a qubit architecture including a plurality of Majorana zero modes (MZMs). The method may further include calibrating the plurality of device parameters at least in part by determining whether the plurality of MZMs exhibit ground state degeneracy. When the plurality of MZMs are determined to not exhibit ground state degeneracy, calibrating the plurality of device parameters may further include modifying one or more device parameters of the plurality of device parameters. When the plurality of MZMs are determined to exhibit ground state degeneracy, the method may further include modifying one or more parameters of a measurement device coupled to the qubit architecture.

Abstract: Quantum devices with chains of quantum dots for controlling tunable couplings between Majorana zero modes (MZMs) are described. Methods for controlling tunable couplings between MZMs using such chains of quantum dots are also described. An example quantum device comprises at least one superconducting island configurable to support at least one pair of Majorana zero modes (MZMs). The quantum device may further include a region adjacent to at least one MZM of the at least one pair of MZMs, where the region is configurable to realize a chain of quantum dots for controlling a tunable coupling between the at least one MZM of the at least one pair of MZMs and another MZM.

Abstract: Quantum devices formed from a single superconducting wire having a configurable ground connection are described. An example quantum device, configurable to be grounded, comprises a single superconducting wire having at least a first section and a second section, each of which is configurable to be in a topological phase and at least a third section configurable to be in a trivial phase. The quantum device further comprises semiconducting regions formed adjacent to the single superconducting wire, where the single superconducting wire is configurable to store quantum information in at least four Majorana zero modes (MZMs). The semiconducting regions formed adjacent to the single superconducting wire may be used to measure quantum information stored in the at least four MZMs.

Abstract: Quantum devices with two-sided or single-sided dual-purpose Majorana zero mode (MZM) junctions are described. An example quantum device comprises at least one superconducting island configurable to support at least one pair of Majorana zero modes (MZMs). The quantum device further includes a first conductor configurable to be coupled with at least one MZM of the at least one pair of MZMs, where the first conductor is configurable to be in at least one of a grounded state or a Coulomb blockade state. The quantum device further includes a second conductor configurable to be coupled with the at least one MZM of the at least one pair of MZMs, where the second conductor is configurable to be in at least one of a grounded state or a Coulomb blockade state.

Abstract: A method to evaluate a semiconductor-superconductor heterojunction for use in a qubit register of a topological quantum computer includes (a) measuring one or both of a radio-frequency (RF) junction admittance of the semiconductor-superconductor heterojunction and a sub-RF conductance including a non-local conductance of the semiconductor-superconductor heterojunction, to obtain mapping data and refinement data; (b) finding by analysis of the mapping data one or more regions of a parameter space consistent with an unbroken topological phase of the semiconductor-superconductor heterojunction; and (c) finding by analysis of the refinement data a boundary of the unbroken topological phase in the parameter space and a topological gap of the semiconductor-superconductor heterojunction for at least one of the one or more regions of the parameter space.

Abstract: Various embodiments of a modular unit for a topologic qubit and of scalable quantum computing architectures using such modular units are disclosed herein. For example, one example embodiment is a modular unit for a topological qubit comprising 6 Majorana zero modes (MZMs) on a mesoscopic superconducting island. These units can provide the computational MZMs with protection from quasiparticle poisoning. Several possible realizations of these modular units are described herein. Also disclosed herein are example designs for scalable quantum computing architectures comprising the modular units together with gates and reference arms (e.g., quantum dots, Majorana wires, etc.) configured to enable joint parity measurements to be performed for various combinations of two or four MZMs associated with one or two modular units, as well as other operations on the states of MZMs.

Abstract: Various embodiments of a modular unit for a topologic qubit and of scalable quantum computing architectures using such modular units are disclosed herein. For example, one example embodiment is a modular unit for a topological qubit comprising 6 Majorana zero modes (MZMs) on a mesoscopic superconducting island. These units can provide the computational MZMs with protection from quasiparticle poisoning. Several possible realizations of these modular units are described herein. Also disclosed herein are example designs for scalable quantum computing architectures comprising the modular units together with gates and reference arms (e.g., quantum dots, Majorana wires, etc.) configured to enable joint parity measurements to be performed for various combinations of two or four MZMs associated with one or two modular units, as well as other operations on the states of MZMs.

Abstract: A method to evaluate a semiconductor-superconductor heterojunction for use in a qubit register of a topological quantum computer includes (a) measuring one or both of a radio-frequency (RF) junction admittance of the semiconductor-superconductor heterojunction and a sub-RF conductance including a non-local conductance of the semiconductor-superconductor heterojunction, to obtain mapping data and refinement data; (b) finding by analysis of the mapping data one or more regions of a parameter space consistent with an unbroken topological phase of the semiconductor-superconductor heterojunction; and (c) finding by analysis of the refinement data a boundary of the unbroken topological phase in the parameter space and a topological gap of the semiconductor-superconductor heterojunction for at least one of the one or more regions of the parameter space.

Abstract: A method for use with a topological quantum computing device is provided. The method may include setting a plurality of device parameters for a qubit architecture including a plurality of Majorana zero modes (MZMs). The method may further include calibrating the plurality of device parameters at least in part by determining whether the plurality of MZMs exhibit ground state degeneracy. When the plurality of MZMs are determined to not exhibit ground state degeneracy, calibrating the plurality of device parameters may further include modifying one or more device parameters of the plurality of device parameters. When the plurality of MZMs are determined to exhibit ground state degeneracy, the method may further include modifying one or more parameters of a measurement device coupled to the qubit architecture.

Abstract: A method to evaluate a semiconductor-superconductor heterojunction for use in a qubit register of a topological quantum computer includes measuring a radio-frequency (RF) junction admittance of the semiconductor-superconductor heterojunction to obtain mapping data; finding by analysis of the mapping data one or more regions of a parameter space consistent with an unbroken topological phase of the semiconductor-superconductor heterojunction; measuring a sub-RF conductance including a non-local conductance of the semiconductor-superconductor heterojunction in each of the one or more regions of the parameter space, to obtain refinement data; and finding by analysis of the refinement data a boundary of the unbroken topological phase in the parameter space and a topological gap of the semiconductor-superconductor heterojunction for at least one of the one or more regions of the parameter space.

Abstract: A method to evaluate a semiconductor-superconductor heterojunction for use in a qubit register of a topological quantum computer includes measuring a radio-frequency (RF) junction admittance of the semiconductor-superconductor heterojunction to obtain mapping data; finding by analysis of the mapping data one or more regions of a parameter space consistent with an unbroken topological phase of the semiconductor-superconductor heterojunction; measuring a sub-RF conductance including a non-local conductance of the semiconductor-superconductor heterojunction in each of the one or more regions of the parameter space, to obtain refinement data; and finding by analysis of the refinement data a boundary of the unbroken topological phase in the parameter space and a topological gap of the semiconductor-superconductor heterojunction for at least one of the one or more regions of the parameter space.

Abstract: Various embodiments of a modular unit for a topologic qubit and of scalable quantum computing architectures using such modular units are disclosed herein. For example, one example embodiment is a modular unit for a topological qubit comprising 6 Majorana zero modes (MZMs) on a mesoscopic superconducting island. These units can provide the computational MZMs with protection from quasiparticle poisoning. Several possible realizations of these modular units are described herein. Also disclosed herein are example designs for scalable quantum computing architectures comprising the modular units together with gates and reference arms (e.g., quantum dots, Majorana wires, etc.) configured to enable joint parity measurements to be performed for various combinations of two or four MZMs associated with one or two modular units, as well as other operations on the states of MZMs.

Abstract: Various embodiments of a modular unit for a topologic qubit and of scalable quantum computing architectures using such modular units are disclosed herein. For example, one example embodiment is a modular unit for a topological obit comprising 6 Majorana zero modes (MZMs) on a mesoscopic superconducting island. These units can provide the computational MZMs with protection from quasiparticle poisoning. Several possible realizations of these modular units are described herein. Also disclosed herein are example designs for scalable quantum computing, architectures comprising the modular units together with gates and reference arms (e.g., quantum dots, Majorana wires, etc.) configured to enable joint parity measurements to be performed for various combinations of two or four MZMs associated with one or two modular units, as well as other operations on the states of MZMs.

Abstract: The disclosure relates to a quantum device and method of fabricating the same. The device comprises one or more semiconductor-superconductor nanowires, each comprising a length of semiconductor material and a coating of superconductor material coated on the semiconductor material. The nanowires may be formed over a substrate. In a first aspect at least some of the nanowires are full-shell nanowires with superconductor material being coated around a full perimeter of the semiconductor material along some or all of the length of the wire, wherein the device is operable to induce at least one Majorana zero mode, MZM, in one or more active ones of the full-shell nanowires. In a second aspect at least some of the nanowires are arranged vertically relative to the plane of the substrate in the finished device.