Patents by Inventor Torsten Karzig

Torsten Karzig has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220299551
    Abstract: A method to evaluate a semiconductor-superconductor heterojunction for use in a qubit register of a topological quantum computer includes (a) measuring one or both of a radio-frequency (RF) junction admittance of the semiconductor-superconductor heterojunction and a sub-RF conductance including a non-local conductance of the semiconductor-superconductor heterojunction, to obtain mapping data and refinement data; (b) finding by analysis of the mapping data one or more regions of a parameter space consistent with an unbroken topological phase of the semiconductor-superconductor heterojunction; and (c) finding by analysis of the refinement data a boundary of the unbroken topological phase in the parameter space and a topological gap of the semiconductor-superconductor heterojunction for at least one of the one or more regions of the parameter space.
    Type: Application
    Filed: February 15, 2022
    Publication date: September 22, 2022
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Dmitry PIKULIN, Mason L THOMAS, Chetan Vasudeo NAYAK, Roman Mykolayovych LUTCHYN, Bas NIJHOLT, Bernard VAN HECK, Esteban Adrian MARTINEZ, Georg Wolfgang WINKLER, Gijsbertus DE LANGE, John David WATSON, Sebastian HEEDT, Torsten KARZIG
  • Publication number: 20220036227
    Abstract: A method for use with a topological quantum computing device is provided. The method may include setting a plurality of device parameters for a qubit architecture including a plurality of Majorana zero modes (MZMs). The method may further include calibrating the plurality of device parameters at least in part by determining whether the plurality of MZMs exhibit ground state degeneracy. When the plurality of MZMs are determined to not exhibit ground state degeneracy, calibrating the plurality of device parameters may further include modifying one or more device parameters of the plurality of device parameters. When the plurality of MZMs are determined to exhibit ground state degeneracy, the method may further include modifying one or more parameters of a measurement device coupled to the qubit architecture.
    Type: Application
    Filed: July 29, 2020
    Publication date: February 3, 2022
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Torsten KARZIG, Roman Mykolayovych LUTCHYN, Jukka Ilmari VAYRYNEN, Roman Bela BAUER
  • Patent number: 11151470
    Abstract: A method to evaluate a semiconductor-superconductor heterojunction for use in a qubit register of a topological quantum computer includes measuring a radio-frequency (RF) junction admittance of the semiconductor-superconductor heterojunction to obtain mapping data; finding by analysis of the mapping data one or more regions of a parameter space consistent with an unbroken topological phase of the semiconductor-superconductor heterojunction; measuring a sub-RF conductance including a non-local conductance of the semiconductor-superconductor heterojunction in each of the one or more regions of the parameter space, to obtain refinement data; and finding by analysis of the refinement data a boundary of the unbroken topological phase in the parameter space and a topological gap of the semiconductor-superconductor heterojunction for at least one of the one or more regions of the parameter space.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: October 19, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Dmitry Pikulin, Mason L Thomas, Chetan Vasudeo Nayak, Roman Mykolayovych Lutchyn, Georg Wolfgang Winkler, Sebastian Heedt, Gijsbertus De Lange, Bernard Van Heck, Esteban Adrian Martinez, Lucas Casparis, Torsten Karzig
  • Publication number: 20210279626
    Abstract: A method to evaluate a semiconductor-superconductor heterojunction for use in a qubit register of a topological quantum computer includes measuring a radio-frequency (RF) junction admittance of the semiconductor-superconductor heterojunction to obtain mapping data; finding by analysis of the mapping data one or more regions of a parameter space consistent with an unbroken topological phase of the semiconductor-superconductor heterojunction; measuring a sub-RF conductance including a non-local conductance of the semiconductor-superconductor heterojunction in each of the one or more regions of the parameter space, to obtain refinement data; and finding by analysis of the refinement data a boundary of the unbroken topological phase in the parameter space and a topological gap of the semiconductor-superconductor heterojunction for at least one of the one or more regions of the parameter space.
    Type: Application
    Filed: May 28, 2020
    Publication date: September 9, 2021
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Dmitry PIKULIN, Mason L THOMAS, Chetan Vasudeo NAYAK, Roman Mykolayovych LUTCHYN, Georg Wolfgang WINKLER, Sebastian HEEDT, Gijsbertus DE LANGE, Bernard VAN HECK, Esteban Adrian MARTINEZ, Lucas CASPARIS, Torsten KARZIG
  • Publication number: 20210005661
    Abstract: Various embodiments of a modular unit for a topologic qubit and of scalable quantum computing architectures using such modular units are disclosed herein. For example, one example embodiment is a modular unit for a topological qubit comprising 6 Majorana zero modes (MZMs) on a mesoscopic superconducting island. These units can provide the computational MZMs with protection from quasiparticle poisoning. Several possible realizations of these modular units are described herein. Also disclosed herein are example designs for scalable quantum computing architectures comprising the modular units together with gates and reference arms (e.g., quantum dots, Majorana wires, etc.) configured to enable joint parity measurements to be performed for various combinations of two or four MZMs associated with one or two modular units, as well as other operations on the states of MZMs.
    Type: Application
    Filed: September 11, 2020
    Publication date: January 7, 2021
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Michael Freedman, Chetan Nayak, Roman Lutchyn, Torsten Karzig, Parsa Bonderson
  • Patent number: 10777605
    Abstract: Various embodiments of a modular unit for a topologic qubit and of scalable quantum computing architectures using such modular units are disclosed herein. For example, one example embodiment is a modular unit for a topological obit comprising 6 Majorana zero modes (MZMs) on a mesoscopic superconducting island. These units can provide the computational MZMs with protection from quasiparticle poisoning. Several possible realizations of these modular units are described herein. Also disclosed herein are example designs for scalable quantum computing, architectures comprising the modular units together with gates and reference arms (e.g., quantum dots, Majorana wires, etc.) configured to enable joint parity measurements to be performed for various combinations of two or four MZMs associated with one or two modular units, as well as other operations on the states of MZMs.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: September 15, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Michael Freedman, Chetan Nayak, Roman Lutchyn, Torsten Karzig, Parsa Bonderson
  • Patent number: 10692010
    Abstract: The disclosure relates to a quantum device and method of fabricating the same. The device comprises one or more semiconductor-superconductor nanowires, each comprising a length of semiconductor material and a coating of superconductor material coated on the semiconductor material. The nanowires may be formed over a substrate. In a first aspect at least some of the nanowires are full-shell nanowires with superconductor material being coated around a full perimeter of the semiconductor material along some or all of the length of the wire, wherein the device is operable to induce at least one Majorana zero mode, MZM, in one or more active ones of the full-shell nanowires. In a second aspect at least some of the nanowires are arranged vertically relative to the plane of the substrate in the finished device.
    Type: Grant
    Filed: September 3, 2018
    Date of Patent: June 23, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Michael Hartley Freedman, Bernard van Heck, Georg Wolfgang Winkler, Torsten Karzig, Roman Lutchyn, Peter Krogstrup Jeppesen, Chetan Nayak, Charles Masamed Marcus, Saulius Vaitiekenas
  • Patent number: 10665701
    Abstract: The disclosure relates to a quantum device and method of fabricating the same. The device comprises one or more semiconductor-superconductor nanowires, each comprising a length of semiconductor material and a coating of superconductor material coated on the semiconductor material. The nanowires may be formed over a substrate. In a first aspect at least some of the nanowires are full-shell nanowires with superconductor material being coated around a full perimeter of the semiconductor material along some or all of the length of the wire, wherein the device is operable to induce at least one Majorana zero mode, MZM, in one or more active ones of the full-shell nanowires. In a second aspect at least some of the nanowires are arranged vertically relative to the plane of the substrate in the finished device.
    Type: Grant
    Filed: September 3, 2018
    Date of Patent: May 26, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Michael Hartley Freedman, Bernard van Heck, Georg Wolfgang Winkler, Torsten Karzig, Roman Lutchyn, Peter Krogstrup Jeppesen, Chetan Nayak, Charles Masamed Marcus, Saulius Vaitiek─Śnas
  • Patent number: 10635988
    Abstract: Embodiments of the disclosed technology comprise methods and/or devices for performing measurements and/or manipulations of the collective state of a set of Majorana quasiparticles/Majorana zero modes (MZMs). Example methods/devices utilize the shift of the combined energy levels due to coupling multiple quantum systems (e.g., in a Stark-effect-like fashion). The example methods can be used for performing measurements of the collective topological charge or fermion parity of a group of MZMs (e.g., a pair of MZMs or a group of 4 MZMs). The example devices can be utilized in any system supporting MZMs.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: April 28, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Roman Lutchyn, Parsa Bonderson, Michael Freedman, Torsten Karzig, Chetan Nayak, Jason Alicea, Christina Knapp
  • Publication number: 20200098821
    Abstract: Various embodiments of a modular unit for a topologic qubit and of scalable quantum computing architectures using such modular units are disclosed herein. For example, one example embodiment is a modular unit for a topological obit comprising 6 Majorana zero modes (MZMs) on a mesoscopic super-conducting island. These units can provide the computational MZMs with protection from quasiparticle poisoning. Several possible realizations of these modular units are described herein. Also disclosed herein are example designs for scalable quantum computing, architectures comprising the modular units together with gates and reference arms (e.g., quantum dots, Majorana wires, etc.) configured to enable joint parity measurements to be performed for various combinations of two or four MZMs associated with one or two modular units, as well as other operations on the states of MZMs.
    Type: Application
    Filed: November 11, 2019
    Publication date: March 26, 2020
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Michael Freedman, Chetan Nayak, Roman Lutchyn, Torsten Karzig, Parsa Bonderson
  • Publication number: 20200027971
    Abstract: The disclosure relates to a quantum device and method of fabricating the same. The device comprises one or more semiconductor-superconductor nanowires, each comprising a length of semiconductor material and a coating of superconductor material coated on the semiconductor material. The nanowires may be formed over a substrate. In a first aspect at least some of the nanowires are full-shell nanowires with superconductor material being coated around a full perimeter of the semiconductor material along some or all of the length of the wire, wherein the device is operable to induce at least one Majorana zero mode, MZM, in one or more active ones of the full-shell nanowires. In a second aspect at least some of the nanowires are arranged vertically relative to the plane of the substrate in the finished device.
    Type: Application
    Filed: September 3, 2018
    Publication date: January 23, 2020
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Michael Hartley Freedman, Bernard van Heck, Georg Wolfgang Winkler, Torsten Karzig, Roman Lutchyn, Peter Krogstrup Jeppesen, Chetan Nayak, Charles Masamed Marcus, Saulius Vaitiekenas
  • Publication number: 20200027030
    Abstract: The disclosure relates to a quantum device and method of fabricating the same. The device comprises one or more semiconductor-superconductor nanowires, each comprising a length of semiconductor material and a coating of superconductor material coated on the semiconductor material. The nanowires may be formed over a substrate. In a first aspect at least some of the nanowires are full-shell nanowires with superconductor material being coated around a full perimeter of the semiconductor material along some or all of the length of the wire, wherein the device is operable to induce at least one Majorana zero mode, MZM, in one or more active ones of the full-shell nanowires. In a second aspect at least some of the nanowires are arranged vertically relative to the plane of the substrate in the finished device.
    Type: Application
    Filed: September 3, 2018
    Publication date: January 23, 2020
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Michael Hartley Freedman, Bernard van Heck, Georg Wolfgang Winkler, Torsten Karzig, Roman Lutchyn, Peter Krogstrup Jeppesen, Chetan Nayak, Charles Masamed Marcus, Saulius Vaitiekenas
  • Patent number: 10496933
    Abstract: Embodiments of the disclosed technology concern a method for implementing a ?/8 phase gate in a quantum computing device. In certain embodiments, a quantum circuit is evolved from an initial state to a target state using a hybrid-measurement scheme. The hybrid-measurement scheme can comprise applying one or more measurements to the quantum circuit that project the quantum circuit toward the target state; and applying one or more adiabatic or non-adiabatic techniques that adiabatically evolve the quantum circuit toward the target state.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: December 3, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventor: Torsten Karzig
  • Patent number: 10490600
    Abstract: Various embodiments of a modular unit for a topologic qubit and of scalable quantum computing architectures using such modular units are disclosed herein. For example, one example embodiment is a modular unit for a topological qubit comprising 6 Majorana zero modes (MZMs) on a mesoscopic superconducting island. These units can provide the computational MZMs with protection from quasiparticle poisoning. Several possible realizations of these modular units are described herein. Also disclosed herein are example designs for scalable quantum computing architectures comprising the modular units together with gates and reference arms (e.g., quantum dots, Majorana wires, etc.) configured to enable joint parity measurements to be performed for various combinations of two or four MZMs associated with one or two modular units, as well as other operations on the states of MZMs.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: November 26, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Michael Freedman, Chetan Nayak, Roman Lutchyn, Torsten Karzig, Parsa Bonderson
  • Patent number: 10346348
    Abstract: Among the embodiments disclosed herein are example methods for generating all Clifford gates for a system of Majorana Tetron qubits (quasiparticle poisoning protected) given the ability to perform certain 4 Majorana zero mode measurements. Also disclosed herein are example designs for scalable quantum computing architectures that enable the methods for generating the Clifford gates, as well as other operations on the states of MZMs. These designs are configured in such a way as to allow the generation of all the Clifford gates with topological protection and non-Clifford gates (e.g. a ?/8-phase gate) without topological protection, thereby producing a computationally universal gate set. Several possible realizations of these architectures are disclosed.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: July 9, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Matthew Hastings, Torsten Karzig, Parsa Bonderson, Michael Freedman, Roman Lutchyn, Chetan Nayak
  • Publication number: 20180053113
    Abstract: Embodiments of the disclosed technology comprise methods and/or devices for performing measurements and/or manipulations of the collective state of a set of Majorana quasiparticles/Majorana zero modes (MZMs). Example methods/devices utilize the shift of the combined energy levels due to coupling multiple quantum systems (e.g., in a Stark-effect-like fashion). The example methods can be used for performing measurements of the collective topological charge or fermion parity of a group of MZMs (e.g., a pair of MZMs or a group of 4 MZMs). The example devices can be utilized in any system supporting MZMs.
    Type: Application
    Filed: June 27, 2017
    Publication date: February 22, 2018
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Roman Lutchyn, Parsa Bonderson, Michael Freedman, Torsten Karzig, Chetan Nayak, Jason Alicea, Christina Knapp
  • Publication number: 20180052806
    Abstract: Among the embodiments disclosed herein are example methods for generating all Clifford gates for a system of Majorana Tetron qubits (quasiparticle poisoning protected) given the ability to perform certain 4 Majorana zero mode measurements. Also disclosed herein are example designs for scalable quantum computing architectures that enable the methods for generating the Clifford gates, as well as other operations on the states of MZMs. These designs are configured in such a way as to allow the generation of all the Clifford gates with topological protection and non-Clifford gates (e.g. a ?/8-phase gate) without topological protection, thereby producing a computationally universal gate set. Several possible realizations of these architectures are disclosed.
    Type: Application
    Filed: June 28, 2017
    Publication date: February 22, 2018
    Applicant: Microsof Technology Licensing, LLC
    Inventors: Matthew Hastings, Torsten Karzig, Parsa Bonderson, Michael Freedman, Roman Lutchyn, Chetan Nayak
  • Publication number: 20180053809
    Abstract: Various embodiments of a modular unit for a topologic qubit and of scalable quantum computing architectures using such modular units are disclosed herein. For example, one example embodiment is a modular unit for a topological qubit comprising 6 Majorana zero modes (MZMs) on a mesoscopic superconducting island. These units can provide the computational MZMs with protection from quasiparticle poisoning. Several possible realizations of these modular units are described herein. Also disclosed herein are example designs for scalable quantum computing architectures comprising the modular units together with gates and reference arms (e.g., quantum dots, Majorana wires, etc.) configured to enable joint parity measurements to be performed for various combinations of two or four MZMs associated with one or two modular units, as well as other operations on the states of MZMs.
    Type: Application
    Filed: June 28, 2017
    Publication date: February 22, 2018
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Michael Freedman, Chetan Nayak, Roman Lutchyn, Torsten Karzig, Parsa Bonderson