Abstract: A temperature control apparatus comprises a light-emitting device, a light-emitting device controller, a Peltier device for controlling the temperature of the light-emitting device to a target temperature, a temperature detector for the light-emitting device, a first reference voltage holding unit for holding a voltage corresponding to the target temperature, a reference voltage controller for outputting a holding signal and a switching signal, a second reference voltage holding unit for holding the output voltage of the temperature detector on the basis of the holding signal, a reference voltage switching unit for selecting either the output of the first reference voltage holding unit or the output of the second reference voltage holding unit as a reference voltage, and a Peltier controller for controlling the Peltier device so as to minimize a difference between the output voltage of the temperature detector and the output voltage of the reference voltage switching unit.

Abstract: Correction tables store correction data. Based on the correction data, a linear interpolation circuit generates data in accordance with a data value of input image data. A latch circuit group latches each piece of output data of the linear interpolation circuit in synchronization with a rising edge of a block signal. A selector selects correction data based on an address signal and outputs the correction data to an adder circuit. The adder circuit adds delayed image data to the selected correction data, thus generating corrected image data. Accordingly, an error among channels, which is caused by phase expansion, can be corrected.

Abstract: A subtractor obtains a difference between an image signal, which is supplied in accordance with horizontal scanning and vertical scanning, and which carries information corresponding to a gray level of a pixel and a reference signal Ref representing a predetermined gray level. The result is integrated by an integrator on a horizontal scanning basis, multiplied with an appropriate coefficient, generating a correction signal Igr, which simulates the voltage variation of an opposing electrode, a capacitor line, etc. The correction signal Igr is added to the original image signal VID, and a corrected image signal VID? is supplied to a liquid crystal panel. Thus, a voltage to which the voltage variation of the opposing electrode is added is applied to a pixel electrode, canceling the voltage variation of the opposing electrode, preventing degradation of the display quality due to horizontal crosstalk.

Abstract: A liquid crystal device has a pixel electrode connected to a scanning line and a data line through a TFT, and an opposing electrode opposed to the pixel electrode with a liquid crystal sandwiched therebetween. An almost constant common potential LCcom is applied to the opposing electrode. When this common potential LCcom is adjusted, first, the common potential LCcom is adjusted to a potential Vcom?, which minimizes the variation amount of light emitted from the liquid crystal device in the course of displaying a specific image, and, second, the common potential LCcom is set to a potential V0, which is higher than the potential Vcom?. Thus, it is possible to select, in an easy procedure, a common potential which can suppress a flicker while reducing a direct current component applied to the electro-optical material.

Abstract: To improve the display quality of a moving picture by performing a hold-type display of a liquid crystal, etc. using an impulse-type response. A selection voltage is applied to a selected scanning line during an effective horizontal scan period, and a voltage corresponding to the brightness of a pixel corresponding to an intersection with the selected scanning line is applied to one data line. During a horizontal flyback period when another scanning line is selected, a selection voltage is applied to the selected scanning line and a voltage allowing the pixel to display black as the least brightness is applied to the data line. As a result, the display of the pixel is erased and the data lines are precharged with the voltage erasing the display, for preparation of the subsequent writing operation.

Abstract: To reduce a display irregularity when a phase expansion for grouping a plurality of data lines into a block to sample image signals. The difference of brightness of an image data Vid6 to be provided to the data line arranged at one side of the block is obtained, and a correction data V1 corresponding to the difference of brightness is added to an image data Vid1 to be provided to the data line arranged at the other end of the block.

Abstract: There is provided a circuit for driving an electro-optical device having a precharge voltage generating circuit. The precharge voltage generating circuit has a subtracter for obtaining a difference between a gray scale level of each of pixels which is disposed along one of scanning lines and a reference gray scale previously set, an integrator for integrating the subtraction result for the pixels of one row which are disposed along the one of the scanning lines, an adder for adding a reference value of a precharge voltage to the integrated value, a D/A converter for converting a voltage corresponding to the added result into an analog signal, and an inversion circuit for outputting a precharge signal Vpre which is obtained by inverting the analog signal corresponding to writing polarity.

Abstract: A signal processor performs error correction on data which has been subjected to predetermined signal processing, for each predetermined block unit, by an error correction block, in parallel with an operation of sequentially storing the data in a cache memory. Then, error detection is performed on the data for each predetermined block unit by a descrambling/error detection block, and the data is stored in a buffer memory. Based on the results of the error detection and the error correction, when there exists some error in the data, the data with the error, which is stored in the buffer memory, is read out to be subjected to error correction again. When there is no error, the data corresponding to one block and stored in the buffer memory is transmitted to a host computer without performing error correction again.

Abstract: Exemplary embodiments of the present invention reduce display irregularity in order to enhance display quality. A liquid crystal panel includes a plurality of pixel electrodes provided at intersections of a plurality of scanning lines and a plurality of data lines, a scanning line driving circuit to sequentially select the plurality of scanning lines, and a data line driving circuit to sample an image signal VID supplied to an image signal line that is provided in common to the plurality of data lines and to supply the sampled signal to each data line.

Abstract: To correct unevenness of brightness caused from unevenness in a cell gap, etc. with high accuracy. When unevenness of brightness of pixels is corrected by adding correction data corresponding to a pixel to image data specifying the brightness of the pixel, a plurality of vertical scan periods is used as a reference cycle, and during the respective vertical scan periods of the reference cycle, one of two data values between which a correction amount of the pixel is interposed is selected and the selected data value is output as correction data. At this time, the number of times when one of the two data values is supplied during the reference cycle is increased as the correction amount comes close to the one data value.

Abstract: To make a vertical cross-talk and a vertical stripe pattern invisible.

Abstract: To provide a circuit for preventing degradation of a display quality caused by horizontal crosstalk. An image signal correcting circuit supplies a corrected image signal to a display panel to apply the image signal using the corresponding data line after pre-charging each data line to the predetermined voltage, for a pixel electrode located at the selected scanning line. The image signal correcting circuit comprises a subtractor 312 for calculating a difference between a gray scale level shown as a reference signal Ref and a gray scale level of the pixel indicated by an image signal VID, an integrator 314 for integrating the result of the subtraction output to one row of pixel located at the selected scanning line, and an adder 322 that provides the integration Int multiplied by the coefficient k1 as the corrected image signal.

Abstract: A liquid crystal display device of the present invention includes a subtracter that calculates the difference between an image signal and a reference signal. The image signal has information corresponding to the density of a pixel arranged in a matrix extending in row and column directions and being supplied in synchronization with horizontal scanning in the row direction and vertical scanning in the column direction. The reference signal has information corresponding to a reference density. The liquid crystal display device also includes a first accumulator group and a second accumulator group that accumulate the difference for each column for one vertical scanning period; and an adder that adds a value corresponding to an accumulated value associated with a column to the image signal, DV, of the column for correction. With this arrangement, the deterioration of display quality caused by vertical cross-talk is reduced, minimized or resolved by correcting the image signal.

Abstract: A video signal is sampled in response to a sampling signal, and is fed to a data line. The sampling signal is generated based on an enable signal. A timing control circuit includes a group of delay circuits to delay a reference clock signal, a selector circuit to select signals in response to a selection signal, and an enable signal generator circuit to generate an enable signal based on an enable clock signal. The selection signal is generated based on a phase difference signal and has a constant fluctuation.

Abstract: The present invention provides an image processing circuit for use in an electrooptic device having a plurality of scanning lines, a plurality of data lines, switching elements which are respectively disposed in correspondence with intersections between the scanning lines and the data lines, and pixel electrodes which are electrically coupled to the corresponding switching elements.

Abstract: An image signal compensation circuit includes a compensation-level output unit that outputs a compensation level Cmp which corresponds to the level of an uncompensated image signal; a selector that selects the compensation level Cmp for positive writing and a zero value for negative writing; and an adder that adds the selected value to the original image signal. The sum is subjected to polarity inversion every predetermined period on the basis of a predetermined constant potential and is applied to a pixel electrode. As a result, effective voltages applied to a liquid crystal capacitor for positive writing and negative writing are approximately the same, and application of a DC component to the liquid crystal capacitor is prevented.

Abstract: A select lever device for an automatic transmission includes: a torque sensor to detect an input torque to a drive shaft of a select lever; a select position sensor to detect the stroke angle of the select lever; a characteristic data storing unit in which a mechanical load characteristic of the select lever is stored; and a control unit to which signals and data of these elements are inputted. Further, the control unit includes an electric motor to output to the select lever assist torque for assisting the operating force by a driver, the assist torque being controlled based on the input torque to the select lever, the stroke angle of the select lever, and the mechanical load characteristic of the select lever.

Abstract: An image processing circuit having a delay unit U1 that delays image data Da and outputs image data as image data Db. The delay time of the delay units U1 is equivalent to the unit time of phase-rendered image signals VID1 through VID6. Upon a first difference circuit 31 subtracting image data Db from image data Da, and thus generating first difference image data Ds1, a first coefficient circuit 32 multiplies the first difference image data Ds1 by a first coefficient K1 and generates first correction data Dh1. Corrected image data Dout is generated by adding the image data Da and the first correction data Dh1. Therefore, ghosting is removed in the event of sequentially selecting blocks of batched multiple data lines to make display.

Abstract: An image display apparatus including an image correction section, a data storage device, and an image forming section. The image correction section corrects levels of given image data in accordance with the correction data stored in the data storage device. The image forming section is provided with a plurality of pixels each transmitting image-forming light responsive to corrected image data supplied from the image correction section, and the image-forming light reproduces a displayed image. The correction data are determined by obtaining data-correction values based on input-output characteristics of the image forming section. The data-correction values represent correction amounts of the image data needed to bring, closer to a predetermined reference level, the output levels of light at a plural locations of a displayed image which is displayed responsive to uniform image data representing a specific uniform image.

Abstract: The bus width of the data bus among blocks for transferring data among respective blocks such as the memory control block, the error correction block, and the host I/F block is 32-bit width, and the bus width of the memory data bus for transferring data between the buffer memory and the memory control block is 64-bit width, whereby an access to the buffer memory is performed by the unit of 64 bits, while respective block processings are performed by the unit of 32 bits out of the 64 bits. Therefore, 32-bit data transferred through the data bus among blocks are always valid data, whereby the access rate from respective blocks in the system to the buffer memory can be increased.