Patents by Inventor Toru HISAMATSU

Toru HISAMATSU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10777425
    Abstract: A method of processing a substrate is provided. The substrate includes an etching target region and a patterned region. The patterned region is provided on the etching target region. In the method, an organic film is formed on a surface of the substrate. Subsequently, the etching target region is etched by plasma generated from a processing gas. The organic film is formed in a state that the substrate is placed in a processing space within a chamber. When the organic film is formed, a first gas containing a first organic compound is supplied toward the substrate, and then, a second gas containing a second organic compound is supplied toward the substrate. An organic compound constituting the organic film is generated by polymerization of the first organic compound and the second organic compound.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: September 15, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Masahiro Tabata, Toru Hisamatsu, Sho Kumakura, Ryuichi Asako, Shinya Ishikawa, Masanobu Honda
  • Patent number: 10777422
    Abstract: In a method according to an embodiment, before etching a target layer of a wafer, a main surface of the target layer is divided into a plurality of areas. A difference value between a groove width of a mask and a reference value of the groove width is calculated for each of the plurality of areas, a temperature of the target layer is adjusted by using correspondence data indicating correspondence between a temperature of the target layer and a film thickness of a formed film. Then, a film is formed on the mask for each atom layer, and a film having a film thickness corresponding to the difference value is formed on the mask to correct the groove width in each of the plurality of areas to the reference value.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: September 15, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Yoshihide Kihara, Toru Hisamatsu, Masanobu Honda
  • Patent number: 10763123
    Abstract: In an embodiment, a wafer W includes a layer EL to be etched and a mask MK4 provided on the layer EL to be etched, and a method MT of an embodiment, the layer EL to be etched is etched by removing the layer EL to be etched for each atomic layer, by repeating sequence SQ3 including step ST9a of irradiating the mask MK4 with secondary electrons by generating plasma and applying a DC voltage to an upper electrode 30 of a parallel plate electrode, and covering the mask MK4 with silicon oxide compound, step ST9b of generating plasma of fluorocarbon-based gas and forming a mixed layer MX2 including radicals on an atomic layer of the layer EL to be etched, and ST9d of generating plasma of Ar gas and applying a bias voltage to remove the mixed layer MX2.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: September 1, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Yoshihide Kihara, Toru Hisamatsu
  • Publication number: 20200251344
    Abstract: A method for processing a substrate in a plasma chamber is provided. The method includes providing a substrate on which an underlying layer to be etched and a mask are formed. The method further includes forming a protective film on the mask. The method further includes performing an anisotropic deposition to selectively form a deposition layer on a top portion of the mask.
    Type: Application
    Filed: January 31, 2019
    Publication date: August 6, 2020
    Applicant: Tokyo Electron Limited
    Inventors: Toru HISAMATSU, Masanobu HONDA, Yoshihide KIHARA
  • Publication number: 20200243298
    Abstract: An etching method includes: providing a substrate having a film and a patterned mask on the film; forming a silicon-containing layer including silicon, carbon, and nitrogen on the substrate using a precursor gas containing silicon; and performing a plasma etching on the film. The substrate is placed under a depressurized environment for a time period from a start time point of the step of forming the silicon-containing layer on the substrate to an end time point of the step of performing the plasma etching on the film.
    Type: Application
    Filed: January 29, 2020
    Publication date: July 30, 2020
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Daisuke NISHIDE, Toru HISAMATSU, Shinya ISHIKAWA
  • Publication number: 20200234970
    Abstract: An etching method includes a step of selectively forming deposit on a top surface of a mask disposed on a film of a substrate, a step of etching the film after the step of forming the deposit, a step of forming a layer of chemical species included in plasma of a processing gas, on the substrate, and a step of supplying ions from plasma of an inert gas to the substrate so that the chemical species react with the film.
    Type: Application
    Filed: January 17, 2020
    Publication date: July 23, 2020
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Takayuki HOSHI, Masanobu HONDA, Masahiro TABATA, Toru HISAMATSU
  • Patent number: 10714340
    Abstract: According to an embodiment, a wafer W includes a layer EL to be etched, an organic film OL, an antireflection film AL, and a mask MK1, and a method MT according to an embodiment includes a step of performing an etching process on the antireflection film AL by using the mask MK1 with plasma generated in a processing container 12, in the processing container 12 of a plasma processing apparatus 10 in which the wafer W is accommodated, and the step includes steps ST3a to ST4 of conformally forming a protective film SX on the surface of the mask MK1, and steps ST6a to ST7 of etching the antireflection film AL by removing the antireflection film AL for each atomic layer by using the mask MK1 on which the protective film SX is formed.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: July 14, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Yoshihide Kihara, Toru Hisamatsu, Tomoyuki Oishi
  • Patent number: 10707100
    Abstract: A substrate processing method includes: selectively forming a first film on a surface of a substrate disposed in a processing container by plasma enhanced vapor deposition (PECVD); and forming a second film by atomic layer deposition (ALD) in a region of the substrate where the first film does not exist. The second film is formed by repeatedly performing a sequence including: forming a precursor layer on the surface of the substrate; purging an interior of the processing container after forming of the precursor; converting the precursor layer into the second film; and purging a space in the processing container after the converting. A plasma processing apparatus performing the method is also provided.
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: July 7, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Masahiro Tabata, Toru Hisamatsu
  • Publication number: 20200194257
    Abstract: A substrate processing method includes: providing a substrate having a pattern formed on a surface layer thereof; setting a temperature of the substrate such that a change in the pattern becomes a predetermined change amount; forming a reaction layer having a thickness corresponding to the temperature set in the setting on the surface layer of the substrate; and applying energy to the substrate formed with the reaction layer thereby removing the reaction layer from the surface layer of the substrate.
    Type: Application
    Filed: December 13, 2019
    Publication date: June 18, 2020
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Toru HISAMATSU, Takayuki KATSUNUMA, Shinya ISHIKAWA, Yoshihide KIHARA, Masanobu HONDA
  • Publication number: 20200194274
    Abstract: A plasma processing method performed using a plasma processing apparatus includes a first step of forming a first film on a pattern formed on a substrate and having dense and coarse areas, and a second step of performing sputtering or etching on the first film.
    Type: Application
    Filed: December 13, 2019
    Publication date: June 18, 2020
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Yoshihide KIHARA, Toru HISAMATSU, Kensuke TANIGUCHI, Yoshinari HATAZAKI
  • Publication number: 20200176265
    Abstract: A substrate processing method includes providing a processing target substrate having a pattern, forming a film on the substrate, forming a reaction layer on a surface layer of the substrate by plasma, and removing the reaction layer by applying energy to the substrate.
    Type: Application
    Filed: September 9, 2019
    Publication date: June 4, 2020
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Takayuki KATSUNUMA, Toru HISAMATSU, Shinya ISHIKAWA, Yoshihide KIHARA, Masanobu HONDA, Maju TOMURA, Sho KUMAKURA
  • Publication number: 20200144071
    Abstract: A method includes anisotropically etching an etching target layer of a target object through an opening of the target object by generating plasma of a first gas within a processing vessel in which the target object is accommodated; and then forming a film on an inner surface of the opening by repeating a sequence comprising: a first process of supplying a second gas into the processing vessel; a second process of purging a space within the processing vessel; a third process of generating plasma of a third gas containing an oxygen atom within the processing vessel; and a fourth process of purging the space within the processing vessel. The first gas contains a carbon atom and a fluorine atom. The second gas contains an aminosilane-based gas. The etching target layer is a hydrophilic insulating layer containing silicon. Plasma of the first gas is not generated in the first process.
    Type: Application
    Filed: December 20, 2019
    Publication date: May 7, 2020
    Inventors: Yoshihide Kihara, Toru Hisamatsu, Masahiro Tabata
  • Publication number: 20200135480
    Abstract: An embodiment of the present disclosure provides a method of processing a workpiece in which a plurality of holes are formed on a surface of the workpiece. The method includes a first sequence including a first process of forming a film with respect to an inner surface of each of the holes and a second process of isotropically etching the film. The first process includes a film forming process using a plasma CVD method, and the film contains silicon.
    Type: Application
    Filed: December 31, 2019
    Publication date: April 30, 2020
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masahiro TABATA, Toru HISAMATSU, Yoshihide KIHARA
  • Publication number: 20200075343
    Abstract: In a method according to an embodiment, before etching a target layer of a wafer, a main surface of the target layer is divided into a plurality of areas. A difference value between a groove width of a mask and a reference value of the groove width is calculated for each of the plurality of areas, a temperature of the target layer is adjusted by using correspondence data indicating correspondence between a temperature of the target layer and a film thickness of a formed film. Then, a film is formed on the mask for each atom layer, and a film having a film thickness corresponding to the difference value is formed on the mask to correct the groove width in each of the plurality of areas to the reference value.
    Type: Application
    Filed: November 8, 2019
    Publication date: March 5, 2020
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Yoshihide KIHARA, Toru HISAMATSU, Masanobu HONDA
  • Patent number: 10559472
    Abstract: An embodiment of the present disclosure provides a method of processing a workpiece in which a plurality of holes are formed on a surface of the workpiece. The method includes a first sequence including a first process of forming a film with respect to an inner surface of each of the holes and a second process of isotropically etching the film. The first process includes a film forming process using a plasma CVD method, and the film contains silicon.
    Type: Grant
    Filed: August 24, 2018
    Date of Patent: February 11, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Masahiro Tabata, Toru Hisamatsu, Yoshihide Kihara
  • Patent number: 10553446
    Abstract: A method includes anisotropically etching an etching target layer of a target object through an opening of the target object by generating plasma of a first gas within a processing vessel in which the target object is accommodated; and then forming a film on an inner surface of the opening by repeating a sequence comprising: a first process of supplying a second gas into the processing vessel; a second process of purging a space within the processing vessel; a third process of generating plasma of a third gas containing an oxygen atom within the processing vessel; and a fourth process of purging the space within the processing vessel. The first gas contains a carbon atom and a fluorine atom. The second gas contains an aminosilane-based gas. The etching target layer is a hydrophilic insulating layer containing silicon. Plasma of the first gas is not generated in the first process.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: February 4, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Yoshihide Kihara, Toru Hisamatsu, Masahiro Tabata
  • Publication number: 20200032395
    Abstract: A plasma processing method executed by a plasma processing apparatus in the present disclosure includes a first step and a second step. In the first step, the plasma processing apparatus forms a first film on the side walls of an opening in the processing target, the first film having different thicknesses along a spacing between pairs of side walls facing each other. In the second step, the plasma processing apparatus forms a second film by performing a film forming cycle once or more times after the first step, the second film having different thicknesses along the spacing between the pairs of side walls facing each other.
    Type: Application
    Filed: July 26, 2019
    Publication date: January 30, 2020
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Michiko NAKAYA, Toru HISAMATSU, Shinya ISHIKAWA, Sho KUMAKURA, Masanobu HONDA, Yoshihide KIHARA
  • Publication number: 20190393031
    Abstract: A substrate processing method includes: providing a substrate in a processing container; selectively forming a first film on a surface of a substrate by plasma enhanced vapor deposition (PECVD); and forming a second film by atomic layer deposition (ALD) in a region of the substrate where the first film does not exist. The second film is formed by repeatedly performing a sequence including: forming a precursor layer on the surface of the substrate; purging an interior of the processing container after forming of the precursor; converting the precursor layer into the second film; and purging a space in the processing container after the converting. A plasma processing apparatus performing the method is also provided.
    Type: Application
    Filed: August 29, 2019
    Publication date: December 26, 2019
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masahiro TABATA, Toru HISAMATSU
  • Publication number: 20190378730
    Abstract: A substrate processing method includes: selectively forming a first film on a surface of a substrate disposed in a processing container by plasma enhanced vapor deposition (PECVD); and forming a second film by atomic layer deposition (ALD) in a region of the substrate where the first film does not exist. The second film is formed by repeatedly performing a sequence including: forming a precursor layer on the surface of the substrate; purging an interior of the processing container after forming of the precursor; converting the precursor layer into the second film; and purging a space in the processing container after the converting. A plasma processing apparatus performing the method is also provided.
    Type: Application
    Filed: December 10, 2018
    Publication date: December 12, 2019
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masahiro TABATA, Toru HISAMATSU
  • Patent number: 10504741
    Abstract: A semiconductor manufacturing method includes a first process of etching an insulating film over a conductive layer of an object into a pattern of a mask, and exposing the conductive layer to a recessed portion formed in the insulating film, and a second process of forming an organic film in the recessed portion of the insulating film to which the conductive layer is exposed, the second process including, maintaining a chamber at a predetermined pressure, cooling a stage to ?20° C. or less, and placing the object on the stage, supplying a gas including a gas containing a low vapor pressure material to the chamber, and generating plasma from the gas including the gas containing the low vapor pressure material, and causing precursors generated from the low vapor pressure material and included in the plasma to be deposited in the recessed portion such that the organic film is formed.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: December 10, 2019
    Assignee: Tokyo Electron Limited
    Inventors: Michiko Nakaya, Masanobu Honda, Toru Hisamatsu, Masahiro Tabata