Patents by Inventor Toru Kawasaki

Toru Kawasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7301184
    Abstract: Shift register electrodes are formed in an imaging area and a peripheral area through use of a single layer of conductive film, and a thick insulating film is deposited over those electrodes and planarized. The thick insulating film overlying the shift register electrodes in the peripheral area is kept as it is and on the other hand, the thick insulating film overlying the shift register electrodes is etched to just fill gaps between the shift register electrodes with the film, thereby allowing a light shielding metal layer overlying the shift register electrodes in the peripheral area and insulating films sandwiched therebetween to be formed without discontinuity. Since metal interconnect lines in the peripheral area have a thick and planarized insulating film formed thereunder, parasitic capacitance between diffusion layers/electrodes and the metal interconnect lines can be reduced, leading to reduction in power consumption of image sensor.
    Type: Grant
    Filed: September 9, 2003
    Date of Patent: November 27, 2007
    Assignee: NEC Electronics Corporation
    Inventor: Toru Kawasaki
  • Publication number: 20040051124
    Abstract: Shift register electrodes are formed in an imaging area and a peripheral area through use of a single layer of conductive film, and a thick insulating film is deposited over those electrodes and planarized. The thick insulating film overlying the shift register electrodes in the peripheral area is kept as it is and on the other hand, the thick insulating film overlying the shift register electrodes is etched to just fill gaps between the shift register electrodes with the film, thereby allowing a light shielding metal layer overlying the shift register electrodes in the peripheral area and insulating films sandwiched therebetween to be formed without discontinuity. Since metal interconnect lines in the peripheral area have a thick and planarized insulating film formed thereunder, parasitic capacitance between diffusion layers/electrodes and the metal interconnect lines can be reduced, leading to reduction in power consumption of image sensor.
    Type: Application
    Filed: September 9, 2003
    Publication date: March 18, 2004
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Toru Kawasaki
  • Patent number: 6518605
    Abstract: A solid state imaging pickup device with a single-layer electrode structure which eliminates the release area at the terminal part of the charge transfer electrodes by surrounding the charge transfer electrodes with a dummy pattern, or with a pattern formed by connecting the charge transfer electrodes of a certain phase with each other at the outermost periphery. Surrounding the charge transfer electrode improves embedding performance when an insulating film is re-flowed for flattening inter-electrode gaps. This enables formation of a good metal wire or shielding film with no step-cut, thus improving the reliability of a solid state imaging pickup device.
    Type: Grant
    Filed: January 29, 2001
    Date of Patent: February 11, 2003
    Assignee: NEC Corporation
    Inventors: Keisuke Hatano, Masayuki Furumiya, Toru Kawasaki
  • Patent number: 5434321
    Abstract: A method for producing a dichloropentafluoropropane, which comprises reacting dichlorofluoromethane (R21) with tetrafluoroethylene (4F) in the presence of a Lewis acid catalyst for addition reaction to obtain dichloropentafluoropropane, wherein a halide containing at least one element selected from the group consisting of Sb, Nb, Ta, B, Ga, In, Zr, Hf and Ti, or AlBr.sub.3, or AlI.sub.3, is used as the Lewis acid.
    Type: Grant
    Filed: April 18, 1994
    Date of Patent: July 18, 1995
    Assignee: Asahi Glass Company Ltd.
    Inventors: Keiichi Ohnishi, Hidekazu Okamoto, Toshihiro Tanuma, Koichi Yanase, Toru Kawasaki, Ryutaro Takei
  • Patent number: 5356739
    Abstract: A stainproof protector for preventing a mask for lithography from staining, which has a protective film made of a polymer having a fluorine-containing aliphatic cyclic structure.
    Type: Grant
    Filed: January 22, 1993
    Date of Patent: October 18, 1994
    Assignee: Asahi Glass Company Ltd.
    Inventors: Toru Kawasaki, Masao Unoki, Masaru Nakamura
  • Patent number: 5227547
    Abstract: A method for producing a dichloropentafluoropropane, which comprises reacting dichlorofluoromethane (R21) with tetrafluoroethylene (4F) in the presence of a Lewis acid catalyst for addition reaction to obtain dichloropentafluoropropane, wherein a halide containing at least one element selected from the group consisting of Sb, Nb, Ta, B, Ga, In, Zr, Hf and Ti, or AlBr.sub.3, or AlI.sub.3, is used as the Lewis acid.
    Type: Grant
    Filed: July 20, 1992
    Date of Patent: July 13, 1993
    Assignee: Asahi Glass Company Ltd.
    Inventors: Keiichi Ohnishi, Hidekazu Okamoto, Toshihiro Tanuma, Koichi Yanase, Toru Kawasaki, Ryutaro Takei
  • Patent number: 5220084
    Abstract: A method for producing a dichloropentafluoropropane, which comprises reacting dichlorofluoromethane (R21) with tetrafluoroethylene (4F) in the presence of a Lewis acid catalyst for addition reaction to obtain dichloropentafluoropropane, wherein a halide containing at least one element selected from the group consisting of Sb, Nb, Ta, B, Ga, In, Zr, Hf and Ti, or AlBr.sub.3, or AlI.sub.3, is used as the Lewis acid.
    Type: Grant
    Filed: July 20, 1992
    Date of Patent: June 15, 1993
    Assignee: Asahi Glass Company Ltd.
    Inventors: Keiichi Ohnishi, Hidekazu Okamoto, Toshihiro Tanuma, Koichi Yanase, Toru Kawasaki, Ryutaro Takei
  • Patent number: 5117272
    Abstract: A semiconductor integrated circuit device having a protective film made of a polymer having a fluorine-containing aliphatic cyclic structure.
    Type: Grant
    Filed: April 16, 1990
    Date of Patent: May 26, 1992
    Assignees: Asahi Glass Company Ltd., NMB Semiconductor Co., Ltd.
    Inventors: Shinzou Nomura, Hiroshi Katsushima, Toru Kawasaki, Masao Unoki, Masaru Nakamura