Patents by Inventor Toru Takayama
Toru Takayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20130015441Abstract: It is an object of the present invention to provide a highly sophisticated functional IC card that can ensure security by preventing forgery such as changing a picture of a face, and display other images as well as the picture of a face. An IC card comprising a display device and a plurality of thin film integrated circuits; wherein driving of the display device is controlled by the plurality of thin film integrated circuits; a semiconductor element used for the plurality of thin film integrated circuits and the display device is formed by using a polycrystalline semiconductor film; the plurality of thin film integrated circuits are laminated; the display device and the plurality of thin film integrated circuits are equipped for the same printed wiring board; and the IC card has a thickness of from 0.05 mm to 1 mm.Type: ApplicationFiled: September 14, 2012Publication date: January 17, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Toru TAKAYAMA, Junya MARUYAMA, Yuugo GOTO, Yumiko OHNO, Mai AKIBA
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Patent number: 8344369Abstract: The object of the invention is to provide a method for fabricating a semiconductor device having a peeled layer bonded to a base material with curvature. Particularly, the object is to provide a method for fabricating a display with curvature, more specifically, a light emitting device having an OLED bonded to a base material with curvature. An external force is applied to a support originally having curvature and elasticity, and the support is bonded to a peeled layer formed over a substrate. Then, when the substrate is peeled, the support returns into the original shape by the restoring force, and the peeled layer as well is curved along the shape of the support. Finally, a transfer object originally having curvature is bonded to the peeled layer, and then a device with a desired curvature is completed.Type: GrantFiled: December 27, 2010Date of Patent: January 1, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masakazu Murakami, Toru Takayama, Junya Maruyama
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Patent number: 8338198Abstract: There is provided a peeling method capable of preventing a damage to a layer to be peeled. Thus, not only a layer to be peeled having a small area but also a layer to be peeled having a large area can be peeled over the entire surface at a high yield. Processing for partially reducing contact property between a first material layer (11) and a second material layer (12) (laser light irradiation, pressure application, or the like) is performed before peeling, and then peeling is conducted by physical means. Therefore, sufficient separation can be easily conducted in an inner portion of the second material layer (12) or an interface thereof.Type: GrantFiled: June 4, 2009Date of Patent: December 25, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toru Takayama, Junya Maruyama, Shunpei Yamazaki
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Publication number: 20120299025Abstract: The present invention provides a structure in which a pixel region 13 is surrounded by a first sealing material (having higher viscosity than a second sealing material) 16 including a spacer (filler, minute particles and/or the like) which maintains a gap between the two substrates, filled with a few drops of the transparent second sealing material 17a which is spread in the region; and sealed by using the first sealing material 16 and the second sealing material 17.Type: ApplicationFiled: July 27, 2012Publication date: November 29, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Junya MARUYAMA, Toru TAKAYAMA, Yumiko OHNO
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Publication number: 20120295375Abstract: The present invention provides a simplifying method for a peeling process as well as peeling and transcribing to a large-size substrate uniformly. A feature of the present invention is to peel a first adhesive and to cure a second adhesive at the same time in a peeling process, thereby to simplify a manufacturing process. In addition, the present invention is to devise the timing of transcribing a peel-off layer in which up to an electrode of a semiconductor are formed to a predetermined substrate. In particular, a feature is that peeling is performed by using a pressure difference in the case that peeling is performed with a state in which plural semiconductor elements are formed on a large-size substrate.Type: ApplicationFiled: July 12, 2012Publication date: November 22, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Toru TAKAYAMA, Junya MARUYAMA, Yuugo GOTO, Yumiko OHNO
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Publication number: 20120286315Abstract: (OBJECT) The object is to provide a lightened semiconductor device and a manufacturing method thereof by pasting a layer to be peeled to various base materials. (MEANS FOR SOLVING THE PROBLEM) In the present invention, a layer to be peeled is formed on a substrate, then a seal substrate provided with an etching stopper film is pasted with a binding material on the layer to be peeled, followed by removing only the seal substrate by etching or polishing. The remaining etching stopper film is functioned as a blocking film. In addition, a magnet sheet may be pasted as a pasting member.Type: ApplicationFiled: July 26, 2012Publication date: November 15, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Toru TAKAYAMA, Junya MARUYAMA, Yumiko OHNO, Masakazu MURAKAMI, Toshiji HAMATANI, Hideaki KUWABARA, Shunpei YAMAZAKI
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Patent number: 8293552Abstract: The present invention provides a structure of a semiconductor device that realizes low power consumption even where increased in screen size, and a method for manufacturing the same. The invention forms an insulating layer, forms a buried interconnection (of Cu, Au, Ag, Ni, Cr, Pd, Rh, Sn, Pb or an alloy thereof) in the insulating layer. Furthermore, after planarizing the surface of the insulating layer, a metal protection film (Ti, TiN, Ta, TaN or the like) is formed in an exposed part. By using the buried interconnection in part of various lines (gate line, source line, power supply line, common line and the like) for a light-emitting device or liquid-crystal display device, line resistance is decreased.Type: GrantFiled: April 29, 2011Date of Patent: October 23, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toru Takayama, Shunpei Yamazaki
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Publication number: 20120256607Abstract: A semiconductor device includes: a voltage-control-type clock generation circuit having a plurality of stages of first delay elements and whose oscillation frequency is controlled according to a control voltage applied to the first delay elements; a delay circuit having a plurality of stages of second delay elements connected serially; and a selection circuit selecting one from pulse signals output by the plurality of stages of respective second delay elements. The first delay elements and the second delay elements have a same structure formed on a same semiconductor substrate, and a delay amount of the second delay elements is adjusted according to the control voltage.Type: ApplicationFiled: June 20, 2012Publication date: October 11, 2012Applicant: Kabushiki Kaisha ToshibaInventors: Kazutoshi NAKAMURA, Toru TAKAYAMA, Yuki KAMATA, Akio NAKAGAWA, Yoshinobu SANO, Toshiyuki NAKA
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Patent number: 8284138Abstract: An inexpensive light emitting device capable of displaying a bright image and an electric appliance using the light emitting device. In the light emitting device having a pixel portion and a driver circuit formed on one insulating member, all of semiconductor elements for the pixel portion and the driver circuit are formed by n-channel semiconductor elements, thereby enabling the manufacturing process to be simplified. Each of light-emitting elements provided in the pixel portion emits light in such a direction that most of the light travels away from the insulating member, so that substantially the whole of the pixel-forming segment electrode (corresponding to a cathode of an EL element) is formed as an effective light-emitting area. Therefore, a low-priced light-emitting device capable of displaying a bright image can be obtained.Type: GrantFiled: December 9, 2009Date of Patent: October 9, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Toru Takayama
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Patent number: 8278195Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.Type: GrantFiled: November 2, 2011Date of Patent: October 2, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Mitsunori Sakama, Hisashi Abe, Hiroshi Uehara, Mika Ishiwata
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Patent number: 8278660Abstract: A method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film is provided. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, paradium, osmium, iridium, platinum, scandium, titanium, vanadium, chrome, manganese, copper, zinc, gold, silver or silicide thereof in a form of island, line, stripe, dot or film on or under an amorphous silicon film and using them as a starting point, by advancing its crystallization by annealing at a temperature lower than a normal crystallization temperature of an amorphous silicon. A transistor having low leak current and high mobility are obtained in the same time in a dynamic circuit having a thin film transistor by selectively forming a cover film on a semiconductor layer which is to become an active layer of the transistor and by thermally crystallizing it thereafter.Type: GrantFiled: October 27, 2011Date of Patent: October 2, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong Zhang, Hideki Uochi, Toru Takayama, Takeshi Fukunaga, Yasuhiko Takemura
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Publication number: 20120244659Abstract: A method for forming an oxide semiconductor film having favorable semiconductor characteristics is provided. In addition, a method for manufacturing a semiconductor device having favorable electric characteristics, with use of the oxide semiconductor film is provided. A method for forming an oxide semiconductor film including the steps of forming an oxide semiconductor film, forming a hydrogen permeable film over and in contact with the oxide semiconductor film, forming a hydrogen capture film over and in contact with the hydrogen permeable film, and releasing hydrogen from the oxide semiconductor film by performing heat treatment. Further, in a method for manufacturing a semiconductor device, the method for forming an oxide semiconductor film is used.Type: ApplicationFiled: March 16, 2012Publication date: September 27, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yuki IMOTO, Tetsunori MARUYAMA, Toru TAKAYAMA
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Patent number: 8268702Abstract: It is an object of the present invention to provide a highly sophisticated functional IC card that can ensure security by preventing forgery such as changing a picture of a face, and display other images as well as the picture of a face. An IC card comprising a display device and a plurality of thin film integrated circuits; wherein driving of the display device is controlled by the plurality of thin film integrated circuits; a semiconductor element used for the plurality of thin film integrated circuits and the display device is formed by using a polycrystalline semiconductor film; the plurality of thin film integrated circuits are laminated; the display device and the plurality of thin film integrated circuits are equipped for the same printed wiring board; and the IC card has a thickness of from 0.05 mm to 1 mm.Type: GrantFiled: March 8, 2012Date of Patent: September 18, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno, Mai Akiba
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Publication number: 20120228643Abstract: The light-emitting apparatus comprising thin film transistors and light emitting elements, comprises; a second inorganic insulation layer on a gate electrode, a first organic insulation layer on the second inorganic insulation layer, a third inorganic insulation layer on the first organic insulation layer, an anode on the third inorganic insulation layer, a second organic insulation layer overlapping with the end of the anode and having an inclination angle of 35 to 45 degrees, a fourth inorganic insulation layer on the upper and side surfaces of the second organic insulation layer and having an opening over the anode, an organic compound layer in contact with the anode and the fourth inorganic insulation layer and containing light-emitting material, and a cathode in contact with the organic compound layer, wherein the third and the fourth inorganic insulation layers comprise silicon nitride or aluminum nitride.Type: ApplicationFiled: March 12, 2012Publication date: September 13, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei Yamazaki, Satoshi Murakami, Masayuki Sakakura, Toru Takayama
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Publication number: 20120223305Abstract: Provided is a highly reliable semiconductor device by giving stable electric characteristics to a transistor in which a semiconductor film whose threshold voltage is difficult to control is used as an active layer. By using a silicon oxide film having a negative fixed charge as a film in contact with the active layer of the transistor or a film in the vicinity of the active layer, a negative electric field is always applied to the active layer due to the negative fixed charge and the threshold voltage of the transistor can be shifted in the positive direction. Thus, the highly reliable semiconductor device can be manufactured by giving stable electric characteristics to the transistor.Type: ApplicationFiled: February 24, 2012Publication date: September 6, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hitomi SATO, Takayuki SAITO, Kosei NODA, Toru TAKAYAMA
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Publication number: 20120220062Abstract: To sophisticate a portable electronic appliance without hindering reduction of the weight and the size, more specifically, to sophisticate a liquid crystal display apparatus installed in a portable electronic appliance without hindering the mechanical strength, a liquid crystal display apparatus includes a first plastic substrate, a light-emitting device which is disposed over the first plastic substrate, resin which covers the light-emitting device, an insulating film which is in contact with the resin, a semiconductor device which is in contact with the insulating film, a liquid crystal cell which is electrically connected to the semiconductor device, and a second plastic substrate, wherein the semiconductor device and the liquid crystal cell are disposed between the first plastic substrate and the second plastic substrate.Type: ApplicationFiled: May 8, 2012Publication date: August 30, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Toru TAKAYAMA, Junya MARUYAMA, Yuugo GOTO, Yumiko OHNO, Akio ENDO, Yasuyuki ARAI
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Publication number: 20120217501Abstract: There is provided a peeling method capable of preventing a damage to a layer to be peeled. Thus, not only a layer to be peeled having a small area but also a layer to be peeled having a large area can be peeled over the entire surface at a high yield. Processing for partially reducing contact property between a first material layer (11) and a second material layer (12) (laser light irradiation, pressure application, or the like) is performed before peeling, and then peeling is conducted by physical means. Therefore, sufficient separation can be easily conducted in an inner portion of the second material layer (12) or an interface thereof.Type: ApplicationFiled: May 8, 2012Publication date: August 30, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Toru Takayama, Junya Maruyama, Shunpei Yamazaki
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Publication number: 20120211874Abstract: It is an object of the present invention to provide a peeling method that causes no damage to a layer to be peeled and to allow not only a layer to be peeled with a small surface area but also a layer to be peeled with a large surface area to be peeled entirely. Further, it is also an object of the present invention to bond a layer to be peeled to various base materials to provide a lighter semiconductor device and a manufacturing method thereof. Particularly, it is an object to bond various elements typified by a TFT, (a thin film diode, a photoelectric conversion element comprising a PIN junction of silicon, or a silicon resistance element) to a flexible film to provide a lighter semiconductor device and a manufacturing method thereof.Type: ApplicationFiled: May 1, 2012Publication date: August 23, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Toru TAKAYAMA, Junya MARUYAMA, Yumiko OHNO
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Patent number: 8248128Abstract: A semiconductor device includes: a voltage-control-type clock generation circuit having a plurality of stages of first delay elements and whose oscillation frequency is controlled according to a control voltage applied to the first delay elements; a delay circuit having a plurality of stages of second delay elements connected serially; and a selection circuit selecting one from pulse signals output by the plurality of stages of respective second delay elements. The first delay elements and the second delay elements have a same structure formed on a same semiconductor substrate, and a delay amount of the second delay elements is adjusted according to the control voltage.Type: GrantFiled: May 19, 2011Date of Patent: August 21, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Kazutoshi Nakamura, Toru Takayama, Yuki Kamata, Akio Nakagawa, Yoshinobu Sano, Toshiyuki Naka
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Patent number: 8247246Abstract: A technique for forming a TFT element over a substrate having flexibility typified by a flexible plastic film is tested. When a structure in which a light-resistant layer or a reflective layer is employed to prevent the damage to the delamination layer, it is difficult to fabricate a transmissive liquid crystal display device or a light emitting device which emits light downward. A substrate and a delamination film are separated by a physical means, or a mechanical means in a state where a metal film formed over a substrate, and a delamination layer comprising an oxide film including the metal and a film comprising silicon, which is formed over the metal film, are provided. Specifically, a TFT obtained by forming an oxide layer including the metal over a metal film; crystallizing the oxide layer by heat treatment; and performing delamination in a layer of the oxide layer or at both of the interface of the oxide layer is formed.Type: GrantFiled: April 23, 2010Date of Patent: August 21, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junya Maruyama, Toru Takayama, Yumiko Ohno, Shunpei Yamazaki