Patents by Inventor Toshiaki Kojima

Toshiaki Kojima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040223733
    Abstract: In recording, reproducing, and recording/reproducing apparatuses and methods thereof, while endlessly-recording first data, desired second data can be easily stored. The present invention comprises recording means for endlessly-recording the first data in a recording medium, input means for inputting a start and end point of the second data out of the first data, and control means, when the start point and end point are designated, for controlling the recording means so as to endlessly-record the first data while avoiding a recording region for the second data. Thereby, the second data can be stored without replacing the recording medium even if the second data is endlessly-recorded. In addition, when the start point and end point of the desired second data out of the first data are designated, the start point and end point are recorded, and then the first data is endlessly-recorded based on the recorded start point and end point while avoiding the recording region for the second data.
    Type: Application
    Filed: June 16, 2004
    Publication date: November 11, 2004
    Inventor: Toshiaki Kojima
  • Publication number: 20040178455
    Abstract: A semiconductor device has a p-type substrate, a low-concentration n-type region formed in the p-type substrate, a first high-concentration p-type region formed in the low-concentration n-type region and connected to a first electrode, a first high-concentration n-type region formed in the low-concentration n-type region and connected via a resistive element to the first electrode, a low-concentration p-type region formed contiguously with the first high-concentration n-type region, a second high-concentration n-type region and a second high-concentration p-type region formed in the p-type substrate and connected to a second electrode, and an element separator portion formed between the low-concentration p-type region and the second high-concentration n-type region. This makes it possible to control the switching characteristic of the electrostatic protection circuit with high accuracy and thus to cope with the thinning of the gate oxide film protected by the protection circuit.
    Type: Application
    Filed: March 5, 2004
    Publication date: September 16, 2004
    Applicant: ROHM CO., LTD.
    Inventor: Toshiaki Kojima
  • Publication number: 20040136684
    Abstract: An information recording/playback apparatus capable of recording and playing back data on and from a magnetic tape through a network. A monitoring unit 15 regularly monitors the state of the data stored in a temporary storage unit 14. A first controlling unit 13 controls data transfer between a tape magnetic-storage medium 11 and the temporary storage unit 14 based on a result a of monitoring. A second controlling unit 16 controls information transfer between the temporary storage unit 14 and a network 21 based on the result a of monitoring. The first controlling unit 13 and the second controlling unit 16 do not interfere with each other and they independently operate asynchronously with each other. This asynchronous structure permits asynchronous data transfer to other apparatuses through an interface unit 17 and the network 21. The present invention can be applied to a digital VTR.
    Type: Application
    Filed: October 27, 2003
    Publication date: July 15, 2004
    Inventors: Toshiaki Kojima, Yoshinori Nakako
  • Publication number: 20040126084
    Abstract: A recording unit (3) for recording image information and/or audio information onto a replaceable tape-shaped recording medium (10), filing units (5), (8) for filing the image information and/or the audio information which have been written onto the replaceable tape-shaped recording medium (10) by the recording unit (3), and a file information writing/reading unit (6) for writing/reading, in a non-contact state, file information of file into a random accessible memory unit (22) provided in a manner associated with the replaceable tape-shaped recording medium (10) are provided to thereby realize an information processing apparatus.
    Type: Application
    Filed: October 16, 2003
    Publication date: July 1, 2004
    Inventor: Toshiaki Kojima
  • Patent number: 6670678
    Abstract: An insulation trench is formed between a drain region formed in a p-type well and a substrate contact region of GG NMOS transistor. The insulation trench extends deeper than the thickness of the p-type well and reaches the p-type substrate of the transistor. This configuration provides a parasitic BJT of the ESD protection transistor with an improves TLP characteristic, and facilitates the operation of the parasitic BJT of the GG MOS transistor accordingly.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: December 30, 2003
    Assignee: Rohm Co., Ltd.
    Inventor: Toshiaki Kojima
  • Publication number: 20030164521
    Abstract: An insulation trench is formed between a drain region formed in a p-type well and a substrate contact region of GG NMOS transistor. The insulation trench extends deeper than the thickness of the p-type well and reaches the p-type substrate of the transistor. This configuration provides a parasitic BJT of the ESD protection transistor with an improves TLP characteristic, and facilitates the operation of the parasitic BJT of the GG MOS transistor accordingly.
    Type: Application
    Filed: February 28, 2003
    Publication date: September 4, 2003
    Applicant: ROHM CO., LTD.
    Inventor: Toshiaki Kojima
  • Publication number: 20030152162
    Abstract: A computer capable of performing communications processing using a protocol at high speed in simple and low cost configuration is provided. After an SD-RAM controller stores AV data inputted via an AV interface in an AV buffer circuit, a packet processing unit, for example, generates jumbo packet data of 32 KB. A PCI bus interface outputs data required for transmitting processing of the jumbo packet data to a CPU, and the CPU generates header data. A packet processing unit, according to the header data, splits the jumbo packet data and generates Ethernet packet data of a maximum of 1518 byte. The SD-RAM controller transmits the applicable data from a MAC circuit.
    Type: Application
    Filed: February 3, 2003
    Publication date: August 14, 2003
    Inventor: Toshiaki Kojima
  • Patent number: 6501645
    Abstract: When supporting an HDA including an H/DA and an electronic control circuit board for controlling the same in a fixed frame (drive bay) of upper level apparatus by means of elastic or “soft” fixation, counterforce of an FPC cable gives it bad influence. When rigidly securing the HDA in a translational motion direction while attaining soft fixation in a direction of rotation, the HDA is rotatably supported with its center of gravity being as the center of rotation in a soft secure/support mechanism as taught from Published Japanese Patent Application No. 8-161880 (JP-A-8161880) for example; however, in the case of employing one of commercially available general purpose HDAs, this is disposed so that a bent or curved portion of its cable is identical in position to the rotation center or placed at a nearby location of the gravity center to thereby preclude the stiffness of an FPC cable hardly affects such rotatable support mechanism.
    Type: Grant
    Filed: July 18, 2000
    Date of Patent: December 31, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Shigeyuki Hanazawa, Masahiko Sega, Toshiaki Kojima, Yasuhiro Matsuda
  • Patent number: 6490123
    Abstract: A magnetic disk drive has a housing for a 3.5 inch form factor and disk media of a diameter for a 2.5 inch form factor. The smaller disk media rotate at a high speed while consuming low electric lower and generating less heat while providing for quick access speeds. Usually, when the magnetic disk media are rotated at a higher speed, the electric power consumption and heat generation are increased because of the load increase. This problem is avoided with the use of cooling fins placed about the periphery of the disk media. Further, the smaller size disk media enable a decrease in torque loss during on-load rotation with the media, and a decrease of electric current to the spindle motor during rotation.
    Type: Grant
    Filed: November 5, 1998
    Date of Patent: December 3, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyuki Okunaga, Masao Iwakura, Kazuo Nakagoshi, Takuji Ogawa, Chuma Akira, Fumio Kugiya, Tomio Suzuki, Toshiaki Kojima, Kazuo Sakai, Naoki Kodama, Tatsuya Ishigaki
  • Publication number: 20020093759
    Abstract: A magnetic disk drive that shape coefficient is 3.5 inches are provided, which is designed as rotating magnetic media in a high speed in order to consume a low electric power, to generate a less heat, and to access more quickly.
    Type: Application
    Filed: March 8, 2002
    Publication date: July 18, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Nobuyuki Okunaga, Masao Iwakura, Kazuo Nakagoshi, Takuji Ogawa, Chuma Akira, Fumio Kugiya, Tomio Suzuki, Toshiaki Kojima, Kazuo Sakai, Naoki Kodama, Tatsuya Ishigaki
  • Publication number: 20020093758
    Abstract: A magnetic disk drive that shape coefficient is 3.5 inches are provided, which is designed as rotating magnetic media in a high speed in order to consume a low electric power, to generate a less heat, and to access more quickly.
    Type: Application
    Filed: March 8, 2002
    Publication date: July 18, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Nobuyuki Okunaga, Masao Iwakura, Kazuo Nakagoshi, Takuji Ogawa, Chuma Akira, Fumio Kugiya, Tomio Suzuki, Toshiaki Kojima, Kazuo Sakai, Naoki Kodama, Tatsuya Ishigaki
  • Publication number: 20020093760
    Abstract: A magnetic disk drive that shape coefficient is 3.5 inches are provided, which is designed as rotating magnetic media in a high speed in order to consume a low electric power, to generate a less heat, and to access more quickly.
    Type: Application
    Filed: March 8, 2002
    Publication date: July 18, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Nobuyuki Okunaga, Masao Iwakura, Kazuo Nakagoshi, Takuji Ogawa, Chuma Akira, Fumio Kugiya, Tomio Suzuki, Toshiaki Kojima, Kazuo Sakai, Naoki Kodama, Tatsuya Ishigaki
  • Patent number: 6275896
    Abstract: A data transfer apparatus for transferring data between a first storage medium and a second storage medium capable of non-linear access, comprising a temporary storing means for temporarily storing at least one of data reproduced from the first storage medium and data reproduced from the second storage medium; a storage state monitoring means for monitoring the state of storage of the temporary storing means; and a transfer rate controlling means for controlling a transfer rate of at least one of the data reproduced from the first storage medium and the data reproduced from the second storage medium based on a signal indicating the state of storage input from the storage state monitoring means, a method of the same, a data input and output controlling apparatus, and a method of the same.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: August 14, 2001
    Assignee: Sony Corporation
    Inventor: Toshiaki Kojima
  • Publication number: 20010012435
    Abstract: In recording, reproducing, and recording/reproducing apparatuses and methods thereof, while endlessly-recording first data, desired second data can be easily stored. The present invention comprises recording means for endlessly-recording the first data in a recording medium, input means for inputting a start and end point of the second data out of the first data, and control means, when the start point and end point are designated, for controlling the recording means so as to endlessly-record the first data while avoiding a recording region for the second data. Thereby, the second data can be stored without replacing the recording medium even if the second data is endlessly-recorded. In addition, when the start point and end point of the desired second data out of the first data are designated, the start point and end point are recorded, and then the first data is endlessly-recorded based on the recorded start point and end point while avoiding the recording region for the second data.
    Type: Application
    Filed: August 11, 1997
    Publication date: August 9, 2001
    Inventor: TOSHIAKI KOJIMA
  • Patent number: 6259255
    Abstract: A surge locating system and a method thereof which can accomplish the surge locating with high accuracy and with relatively simple structure. When the surge occurs, the voltage is generated on the neutral point of Y-connected three-phase alternating current transmission line because of losing a voltage balance on the three-phase alternating current transmission line. The surge locating can be accomplished by detecting the voltage generated in the neutral point. The neutral point is grounded, and the surge locating system according to the present invention is installed between the neutral point and the grounding point. The voltage generated in the neutral point is introduced into the surge locating system and the detecting time thereof is stored. This detecting time is stored in the respective stations, and the surge point can be located based on the detecting time difference between the stations.
    Type: Grant
    Filed: December 8, 1998
    Date of Patent: July 10, 2001
    Assignees: Tohoku Electric Power Co., Inc., Kyokuto Boeki Kaisha, Ltd.
    Inventors: Sakari Ohira, Masaaki Ozawa, Toshiaki Kojima
  • Patent number: 5789777
    Abstract: The non-volatile memory has a storage cell complying with multi-bit data by means of a double layered floating gate architecture. The cell comprises: source 2 and drain 3 which are distant from each other along a direction L in a semiconductor substrate 1; a single first floating gate 4A which is provided between the source and the drain and above a principal plane of the semiconductor substrate and extends along a direction crossing the direction L; a control gate 5 which is placed between the drain ad source and above a principal plane of the first floating gate; high impurity concentration layers 21, 22 which are isolated from the source and drain in the semiconductor substrate; a plurality of second floating gates 4B.sub.1, 4B.sub.
    Type: Grant
    Filed: January 2, 1997
    Date of Patent: August 4, 1998
    Assignee: Motorola, Inc.
    Inventor: Toshiaki Kojima
  • Patent number: 5753950
    Abstract: An object of the present invention is to contribute to increase of storage capacity of a memory and to cope with an nonlinear parasitic resistance.The non-volatile memory have a cell applying to multi-bit data by means of a double layered floating gate architecture. The cell comprises: heavily doped layers (drains 3.sub.0 -3.sub.2 and source 2) being formed separated from each other along an arrangement direction L in a semiconductor substrate; a first floating gate 4A being disposed along a direction orthogonal to the direction L between the drains and source above the semiconductor substrate; second floating gates 4B.sub.1, 4B.sub.2 which respectively extend across the first floating gate above the first floating gate and lie along the direction L, close to the drain; program gates 6.sub.1, 6.sub.2 disposed correspondingly to one of the second floating gates; and a control gate 5 extending across the gate 4A above the gate 4A and being disposed along the direction L, close to the source.
    Type: Grant
    Filed: April 10, 1996
    Date of Patent: May 19, 1998
    Assignee: Motorola, Inc.
    Inventor: Toshiaki Kojima
  • Patent number: 5739568
    Abstract: An object of the present invention is to contribute to increase of storage capacity of a memory. A non-volatile memory having a cell applying to multi-bit data by double layered floating gate architecture. The memory has a storage cell transistor which comprises source 2 and drain 3 being formed in a semiconductor substrate 1 distantly from each other. The storage cell transistor, furthermore comprises a single first floating gate 4A being laid between the source and drain above the semiconductor substrate, and a plurality of second floating gates 4B.sub.1 -4B.sub.n which are distant from each other and face the first floating gate. Since the second floating gates respectively store carrier corresponding to data bits and the first floating gate determines a threshold value of drain current in accordance with sum amount of carrier stored in all of the second floating gates, two or more bits data can be saved per one storage cell.
    Type: Grant
    Filed: November 21, 1995
    Date of Patent: April 14, 1998
    Assignee: Motorola, Inc.
    Inventor: Toshiaki Kojima
  • Patent number: 5644528
    Abstract: An object of the present invention is to contribute to increase of storage capacity of a memory. A nonvolatile memory having a cell applying to multi-bit data by multi-layered floating gate architecture. The memory has a storage cell transistor which comprises a semiconductor substrate 1, source 2, drain 3 and control gate 5. The storage cell transistor, furthermore comprises a plurality of floating gates 4B.sub.1 -4B.sub.n which are arranged in order between a channel and the control gate. Two or more bits data can be saved per one storage cell. According to this architecture, an integration factor per one storage cell leaps upward since a necessary number of floating gates are stacked to overlie each other, the particular number corresponding to the number of bits to be stored therein.
    Type: Grant
    Filed: November 21, 1995
    Date of Patent: July 1, 1997
    Assignee: Motorola, Inc.
    Inventor: Toshiaki Kojima
  • Patent number: 5319506
    Abstract: In an apparatus for recording and/or reproducing signals on a tape and which is selectively operative in a plurality of modes, such as, a normal recording or playback mode, a fast-forward mode, a re-wind mode and a jog mode; the tape is driven between supply and take-up reels at speeds characterizing the selected mode while being guided by a guide element which is ultrasonically vibrated for reducing the frictional resistance to movement of the tape, and the frequency and power of an ultrasonic drive signal employed for vibrating the guide element are controlled so as to obtain optimal reduction of the frictional resistance to movement of the tape while minimizing power consumption.
    Type: Grant
    Filed: March 26, 1992
    Date of Patent: June 7, 1994
    Assignee: Sony Corporation
    Inventors: Toshiaki Kojima, Hiroshi Kiriyama, Etsuro Saito