Patents by Inventor Toshiaki Nagai

Toshiaki Nagai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180211648
    Abstract: A first sound detection unit is installed in a predetermined member forming a vehicle so as to detect solid vibration of the member and convert the solid vibration into an electrical sound signal. A second sound detection unit detects vibration of air inside the vehicle and converts the vibration into an electrical sound signal. A data recording unit records at least one of the sound signal detected by the first sound detection unit and the sound signal detected by the second sound detection unit in a recording medium. The sound signal detected by the first detection unit and recorded in the recording medium is corrected by using the sound signal detected by the second sound detection unit, or the sound signal detected by the second detection unit and recorded in the recording medium is corrected by using the sound signal detected by the first detection unit.
    Type: Application
    Filed: March 19, 2018
    Publication date: July 26, 2018
    Inventor: Toshiaki NAGAI
  • Patent number: 10027912
    Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. First and second chips are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and quantizing the sampled signals to obtain digital signals.
    Type: Grant
    Filed: January 24, 2017
    Date of Patent: July 17, 2018
    Assignee: Sony Corporation
    Inventors: Toshiaki Nagai, Ken Koseki, Yosuke Ueno, Atsushi Suzuki
  • Publication number: 20180122773
    Abstract: A semiconductor device includes: a first chip including one of a logic circuit and a memory circuit and mounted over a substrate with a circuit surface of the first chip facing up; a second chip including the other of the logic circuit and the memory circuit and mounted over the first chip with a circuit surface of the second chip facing down such that the logic circuit and the memory circuit are coupled via a first connection electrode; and a third chip mounted between the substrate and the second chip with a circuit surface of the third chip facing down and includes: an interface circuit that converts between a first signal which is transmitted with the logic circuit or memory circuit and a second signal which is transmitted with an outside; and a first through electrode coupling the logic circuit or memory circuit and the interface circuit.
    Type: Application
    Filed: October 10, 2017
    Publication date: May 3, 2018
    Applicant: FUJITSU LIMITED
    Inventor: Toshiaki Nagai
  • Publication number: 20180124340
    Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. First and second chips are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and quantizing the sampled signals to obtain digital signals.
    Type: Application
    Filed: November 1, 2017
    Publication date: May 3, 2018
    Inventors: Toshiaki Nagai, Ken Koseki, Yosuke Ueno, Atsushi Suzuki
  • Patent number: 9866702
    Abstract: An echo cancellation device includes an echo signal reduction processing unit that generates a transmitting signal in which an echo signal component is reduced from the acoustic signal; and a filter coefficient update determination unit that instructs the echo signal reduction processing unit to update the filter coefficient when the output voice signal corresponds to a voice section and the acoustic signal includes the echo signal component. The filter coefficient update determination unit calculates a feature value of the acoustic signal and instructs to update the filter coefficient when a difference between a first feature value of a frequency band equal to or lower than the target frequency and a second feature value of a frequency band higher than the target frequency is equal to or greater than a preset update determination threshold.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: January 9, 2018
    Assignee: JVC KENWOOD CORPORATION
    Inventor: Toshiaki Nagai
  • Patent number: 9838626
    Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. First and second chips are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and quantizing the sampled signals to obtain digital signals.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: December 5, 2017
    Assignee: Sony Corporation
    Inventors: Toshiaki Nagai, Ken Koseki, Yosuke Ueno, Atsushi Suzuki
  • Publication number: 20170315238
    Abstract: A time-of-flight distance measuring device divides a base exposure period into a plurality of sub exposure periods and holds without resetting an electric charge stored in the sub exposure period for a one round period which is one round of the plurality of sub exposure periods. The distance measurement value of short time exposure is acquired during the one round period and the distance measurement value of long time exposure is acquired during a plurality of the one round periods. Both of the distance measurement value of the long time exposure and the distance measurement value of the short time exposure can be acquired from the same pixel. With this, a dynamic range is expanded without being restricted by a receiving state of reflected light, optical design of received light, and an arrangement of pixels.
    Type: Application
    Filed: November 12, 2015
    Publication date: November 2, 2017
    Inventor: Toshiaki NAGAI
  • Publication number: 20170288691
    Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. First and second chips are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and quantizing the sampled signals to obtain digital signals.
    Type: Application
    Filed: June 22, 2017
    Publication date: October 5, 2017
    Inventors: Toshiaki Nagai, Ken Koseki, Yosuke Ueno, Atsushi Suzuki
  • Patent number: 9736409
    Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. First and second chips are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and quantizing the sampled signals to obtain digital signals.
    Type: Grant
    Filed: January 24, 2017
    Date of Patent: August 15, 2017
    Assignee: Sony Corporation
    Inventors: Toshiaki Nagai, Ken Koseki, Yosuke Ueno, Atsushi Suzuki
  • Patent number: 9734841
    Abstract: Provided is a noise signal suppressing device including: an input unit configured to receive a sound signal; a time/frequency converting unit; an independent peak spectrum extracting unit configured to extract a peak spectrum having independence; a persistence determining unit configured to determine that the peak spectrum having independence persists for a predetermined period or longer; a noise-signal suppressing unit configured to suppress the peak spectrum having independence as the noise signal. The independent peak spectrum extracting unit includes: a first peak extracting unit configured to extract a peak spectrum having higher energy than that of an adjacent frequency signal, and a second peak extracting unit configured to extract a peak spectrum maintaining a frequency interval of equal to or larger than a predetermined value with respect to a peak spectrum adjacent thereto as the peak spectrum having independence.
    Type: Grant
    Filed: June 9, 2014
    Date of Patent: August 15, 2017
    Assignee: JVC KENWOOD Corporation
    Inventors: Takaaki Yamabe, Toshiaki Nagai
  • Publication number: 20170227643
    Abstract: In a time-of-flight distance measurement device, a light receiving device is driven by a sequence having a matrix of a phase number n, a value sampled on the basis of the n rank matrix with respect to the phase number n is linearly calculated, and a waveform equivalent to the waveform sampled in a 1/n step is detected. A linear operation is performed on a sampled value based on the matrix with the rank n with respect to the phase number n, thereby being capable of restoring the waveform equivalent to the waveform sampled in the 1/n steps, and determining whether the shape of the light emission waveform is normal, or not. As a result, the shape of the light emission waveform can be monitored without interrupting a distance measurement.
    Type: Application
    Filed: August 26, 2015
    Publication date: August 10, 2017
    Applicant: DENSO CORPORATION
    Inventor: Toshiaki NAGAI
  • Publication number: 20170214800
    Abstract: An echo cancellation device includes an echo signal reduction processing unit that generates a transmitting signal in which an echo signal component is reduced from the acoustic signal; and a filter coefficient update determination unit that instructs the echo signal reduction processing unit to update the filter coefficient when the output voice signal corresponds to a voice section and the acoustic signal includes the echo signal component. The filter coefficient update determination unit calculates a feature value of the acoustic signal and instructs to update the filter coefficient when a difference between a first feature value of a frequency band equal to or lower than the target frequency and a second feature value of a frequency band higher than the target frequency is equal to or greater than a preset update determination threshold.
    Type: Application
    Filed: April 6, 2017
    Publication date: July 27, 2017
    Inventor: Toshiaki NAGAI
  • Patent number: 9711486
    Abstract: A stacked semiconductor device includes: a plurality of stacked integrated-circuit chips that are to be mounted onto a substrate and including at least one power-supply target chip; a decoupling through-electrode transmission line including a decoupling power-supply-side through-electrode wiring line coupled to a power-supply terminal of the at least one power-supply target chip and a decoupling ground-side through-electrode wiring line coupled to a ground terminal of the at least one power-supply target chip; a resistor and a capacitor provided one of the a plurality of integrated-circuit chips that is located at a termination of the decoupling through-electrode transmission line, the resistor having an impedance substantially equal to a characteristic impedance of the decoupling through-electrode transmission line, wherein the resistor and the capacitor are coupled in series.
    Type: Grant
    Filed: January 8, 2016
    Date of Patent: July 18, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Toshiaki Nagai
  • Patent number: 9654708
    Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. First and second chips are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and quantizing the sampled signals to obtain digital signals.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: May 16, 2017
    Assignee: Sony Corporation
    Inventors: Toshiaki Nagai, Ken Koseki, Yosuke Ueno, Atsushi Suzuki
  • Publication number: 20170134678
    Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. First and second chips are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and quantizing the sampled signals to obtain digital signals.
    Type: Application
    Filed: January 24, 2017
    Publication date: May 11, 2017
    Inventors: Toshiaki Nagai, Ken Koseki, Yosuke Ueno, Atsushi Suzuki
  • Publication number: 20170134679
    Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. First and second chips are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and quantizing the sampled signals to obtain digital signals.
    Type: Application
    Filed: January 24, 2017
    Publication date: May 11, 2017
    Inventors: Toshiaki Nagai, Ken Koseki, Yosuke Ueno, Atsushi Suzuki
  • Publication number: 20170115393
    Abstract: A light emitting element emits a modulated light modulated in a pattern having a repetitive period toward a space. A driving unit drives the light emitting element. A light receiving element distributes charges corresponding to an incident light containing a reflected light obtained by reflecting the modulated light on an object to storage capacitors and stores the distributed charges. A control unit controls an exposure of the light receiving element. A signal processing unit measures a distance to the object by using a value sampled by the light receiving element. The control unit controls the exposure of the light receiving element to give a sensitivity to at least one high-order harmonic. The signal processing unit linearly combines a component of a fundamental wave with a component of the at least one high-order harmonic to measure the distance to the object.
    Type: Application
    Filed: November 3, 2015
    Publication date: April 27, 2017
    Inventors: Toshiaki NAGAI, Kenichi YANAI
  • Publication number: 20170006243
    Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. First and second chips are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and quantizing the sampled signals to obtain digital signals.
    Type: Application
    Filed: September 13, 2016
    Publication date: January 5, 2017
    Inventors: Toshiaki Nagai, Ken Koseki, Yosuke Ueno, Atsushi Suzuki
  • Patent number: 9509933
    Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. First and second chips are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and quantizing the sampled signals to obtain digital signals.
    Type: Grant
    Filed: March 23, 2016
    Date of Patent: November 29, 2016
    Assignee: Sony Corporation
    Inventors: Toshiaki Nagai, Ken Koseki, Yosuke Ueno, Atsushi Suzuki
  • Publication number: 20160233195
    Abstract: A stacked semiconductor device includes: a plurality of stacked integrated-circuit chips that are to be mounted onto a substrate and including at least one power-supply target chip; a decoupling through-electrode transmission line including a decoupling power-supply-side through-electrode wiring line coupled to a power-supply terminal of the at least one power-supply target chip and a decoupling ground-side through-electrode wiring line coupled to a ground terminal of the at least one power-supply target chip; a resistor and a capacitor provided one of the a plurality of integrated-circuit chips that is located at a termination of the decoupling through-electrode transmission line, the resistor having an impedance substantially equal to a characteristic impedance of the decoupling through-electrode transmission line, wherein the resistor and the capacitor are coupled in series.
    Type: Application
    Filed: January 8, 2016
    Publication date: August 11, 2016
    Applicant: FUJITSU LIMITED
    Inventor: Toshiaki Nagai