Patents by Inventor Toshiaki Nagai

Toshiaki Nagai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160227145
    Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. First and second chips are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and quantizing the sampled signals to obtain digital signals.
    Type: Application
    Filed: March 23, 2016
    Publication date: August 4, 2016
    Inventors: Toshiaki Nagai, Ken Koseki, Yosuke Ueno, Atsushi Suzuki
  • Patent number: 9350929
    Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. A first chip and a second chip are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip having a function of sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and a function of quantizing the sampled signals to obtain digital signals.
    Type: Grant
    Filed: October 10, 2012
    Date of Patent: May 24, 2016
    Assignee: SONY CORPORATION
    Inventors: Toshiaki Nagai, Ken Koseki, Yosuke Ueno, Atsushi Suzuki
  • Publication number: 20140350927
    Abstract: Provided is a noise signal suppressing device including: an input unit configured to receive a sound signal; a time/frequency converting unit; an independent peak spectrum extracting unit configured to extract a peak spectrum having independence; a persistence determining unit configured to determine that the peak spectrum having independence persists for a predetermined period or longer; a noise-signal suppressing unit configured to suppress the peak spectrum having independence as the noise signal. The independent peak spectrum extracting unit includes: a first peak extracting unit configured to extract a peak spectrum having higher energy than that of an adjacent frequency signal, and a second peak extracting unit configured to extract a peak spectrum maintaining a frequency interval of equal to or larger than a predetermined value with respect to a peak spectrum adjacent thereto as the peak spectrum having independence.
    Type: Application
    Filed: June 9, 2014
    Publication date: November 27, 2014
    Inventors: Takaaki YAMABE, Toshiaki NAGAI
  • Publication number: 20140232916
    Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. A first chip and a second chip are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip having a function of sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and a function of quantizing the sampled signals to obtain digital signals.
    Type: Application
    Filed: October 10, 2012
    Publication date: August 21, 2014
    Inventors: Toshiaki Nagai, Ken Koseki, Yosuke Ueno, Atsushi Suzuki
  • Patent number: 7186578
    Abstract: In order to obtain a thin plate manufacturing method capable of extremely increasing manufacturing efficiency by enlarging the production scale and remarkably reducing the manufacturing cost per unit area and an apparatus for manufacturing this thin plate, a method and an apparatus performing introduction of a substrate into a main chamber and discharge of the substrate from the main chamber through at least one subsidiary chamber adjacent to the main chamber are employed when manufacturing a silicon thin plate by dipping a surface layer part of the substrate into a silicon melt in a crucible arranged in the main chamber for bonding silicon to the surface of the substrate.
    Type: Grant
    Filed: June 24, 2003
    Date of Patent: March 6, 2007
    Assignees: Sharp Kabushiki Kaisha, Shinko Electric Co., Ltd.
    Inventors: Shuji Goma, Hirozumi Gokaku, Toshiaki Nagai, Kozaburo Yano, Masahiro Tadokoro, Yasuhiro Nakai
  • Patent number: 7173485
    Abstract: A filter circuit includes a plurality of integrator stages, each stage including a voltage-to-current converter to convert an input voltage into a current supplied to an output thereof and a capacitor coupled to the output of the voltage-to-current converter, a voltage charged in the capacitor being supplied to a next stage as an output of each stage, and a capacitor serving as a feed-forward coupling that couples the output of at least one stage of the plurality of integrator stages to a last output node.
    Type: Grant
    Filed: February 16, 2005
    Date of Patent: February 6, 2007
    Assignee: Fujitsu Limited
    Inventor: Toshiaki Nagai
  • Patent number: 7131829
    Abstract: A spiral die assembly can obtain a homogeneous pipe body, an inflation film with/without drawing and a functional film by dispersing molten resin homogeneously, and the spiral die assembly is capable of being applied to various molten resins and extruding conditions. The spiral die assembly comprises a main body 1 of said spiral die assembly, a mandrel 2 having a spiral groove 3 around its outer surface inserted on the inside of the main body and a rotatable ring 5 having a desired width fitted along the outer surface of the spiral groove 3 and fitted in a portion of a die cylinder which forms the inner surface of the main body 1 in a range corresponding to both ends of the spiral groove 3.
    Type: Grant
    Filed: July 2, 2004
    Date of Patent: November 7, 2006
    Assignee: Yamaguchi Mfg. Works, Ltd.
    Inventors: Toshiaki Nagai, Mikiyasu Masaki, Shigejiro Yamaguchi
  • Publication number: 20060238395
    Abstract: There is provided a complex type sigma-delta analog to digital conversion unit that includes: a first subtractor; a first filter; a first analog to digital converter; a first digital to analog converter; a first sign controller; a second subtractor; a second filter; a second analog to digital converter; a second digital to analog converter; and a second sign controller, wherein the first sign controller inverts a positive/negative sign of an output signal of the first filter in response to a control signal and outputs it to the second filter, and the second sign controller inverts a positive/negative sign of an output signal of the second filter in response to the control signal and outputs it to the first filter.
    Type: Application
    Filed: September 27, 2005
    Publication date: October 26, 2006
    Inventors: Toshiaki Nagai, Hiroshi Yamazaki
  • Patent number: 7116254
    Abstract: There is provided a complex type sigma-delta analog to digital conversion unit that includes: a first subtractor; a first filter; a first analog to digital converter; a first digital to analog converter; a first sign controller; a second subtractor; a second filter; a second analog to digital converter; a second digital to analog converter; and a second sign controller, wherein the first sign controller inverts a positive/negative sign of an output signal of the first filter in response to a control signal and outputs it to the second filter, and the second sign controller inverts a positive/negative sign of an output signal of the second filter in response to the control signal and outputs it to the first filter.
    Type: Grant
    Filed: September 27, 2005
    Date of Patent: October 3, 2006
    Assignee: Fujitsu Limited
    Inventors: Toshiaki Nagai, Hiroshi Yamazaki
  • Patent number: 7075055
    Abstract: Provided is a measuring device which has a focusing unit for focusing light flux from a light source and irradiating it to a magnetic substance to be measured, a half-turn asymmetric element acting only on the light flux reflected by the magnetic substance to be measured and acting in such a manner that its action on polarization distribution in a cross section of the light flux has asymmetry nature about half-turn around an optical axis in order to obtain sensitivity to in-plane magnetization vector components of the magnetic substance to be measured, and a polarization split detector for detecting a light amount of a polarization component in one direction or separated each component of polarization components orthogonal to each other of the light which receives action of the half-turn asymmetric element so that the in-plane magnetization vector component in one direction can be measured separately from other components.
    Type: Grant
    Filed: August 27, 2003
    Date of Patent: July 11, 2006
    Assignee: Fujitsu Limited
    Inventor: Toshiaki Nagai
  • Patent number: 7061416
    Abstract: A sigma-delta A/D converter includes an A/D converter configured to output a digital signal, a signal-magnitude detecting circuit coupled to the output of the A/D converter to output a control signal responsive to a magnitude indicated by the digital signal, a D/A converter coupled to the output of the A/D converter and the output of the signal-magnitude detecting circuit to output an analog signal having a signal level responsive to the digital signal and the control signal, a differential circuit coupled to an external analog input and the output of the D/A converter to output a differential between the external analog input and the analog signal, and a filter circuit to couple between the output of the differential circuit and an input of the A/D converter, wherein the D/A converter is configured to control, in response to the control signal, a capacitance of a capacitor that discharges following charging of electric charge to supply an electric current of the analog signal.
    Type: Grant
    Filed: February 4, 2005
    Date of Patent: June 13, 2006
    Assignee: Fujitsu Limited
    Inventor: Toshiaki Nagai
  • Publication number: 20060103560
    Abstract: A filter circuit includes a plurality of integrator stages, each stage including a voltage-to-current converter to convert an input voltage into a current supplied to an output thereof and a capacitor coupled to the output of the voltage-to-current converter, a voltage charged in the capacitor being supplied to a next stage as an output of each stage, and a capacitor serving as a feed-forward coupling that couples the output of at least one stage of the plurality of integrator stages to a last output node.
    Type: Application
    Filed: February 16, 2005
    Publication date: May 18, 2006
    Inventor: Toshiaki Nagai
  • Publication number: 20060097899
    Abstract: A sigma-delta A/D converter includes an A/D converter configured to output a digital signal, a signal-magnitude detecting circuit coupled to the output of the A/D converter to output a control signal responsive to a magnitude indicated by the digital signal, a D/A converter coupled to the output of the A/D converter and the output of the signal-magnitude detecting circuit to output an analog signal having a signal level responsive to the digital signal and the control signal, a differential circuit coupled to an external analog input and the output of the D/A converter to output a differential between the external analog input and the analog signal, and a filter circuit to couple between the output of the differential circuit and an input of the A/D converter, wherein the D/A converter is configured to control, in response to the control signal, a capacitance of a capacitor that discharges following charging of electric charge to supply an electric current of the analog signal.
    Type: Application
    Filed: February 4, 2005
    Publication date: May 11, 2006
    Inventor: Toshiaki Nagai
  • Publication number: 20060065820
    Abstract: Provided is a measuring device which has a focusing unit for focusing light flux from a light source and irradiating it to a magnetic substance to be measured, a half-turn asymmetric element acting only on the light flux reflected by the magnetic substance to be measured and acting in such a manner that its action on polarization distribution in a cross section of the light flux has asymmetry nature about half-turn around an optical axis in order to obtain sensitivity to in-plane magnetization vector components of the magnetic substance to be measured, and a polarization split detector for detecting a light amount of a polarization component in one direction or separated each component of polarization components orthogonal to each other of the light which receives action of the half-turn asymmetric element so that the in-plane magnetization vector component in one direction can be measured separately from other components.
    Type: Application
    Filed: August 27, 2003
    Publication date: March 30, 2006
    Applicant: FUJITSU LIMITED
    Inventor: Toshiaki Nagai
  • Publication number: 20060003043
    Abstract: A spiral die assembly constituted in the following manner can obtain a homogeneous pipe body, an inflation film with/without drawing and a functional film by dispersing molten resin homogeneously, and the spiral die assembly is capable of being applied to various molten resins and extruding conditions. The spiral die assembly comprises a main body 1 of said spiral die assembly, a mandrel 2 having a spiral groove 3 around its outer surface inserted in the inside of the main body and a rotatable ring 5 having a desired width fitted along the outer surface of the spiral groove 3 and fitted in a portion of a die cylinder which forms the inner surface of the main body 1 in a range corresponding to both ends of the spiral groove 3.
    Type: Application
    Filed: July 2, 2004
    Publication date: January 5, 2006
    Inventors: Toshiaki Nagai, Mikiyasu Masaki, Shigejiro Yamaguchi
  • Publication number: 20050239225
    Abstract: In order to obtain a thin plate manufacturing method capable of extremely increasing manufacturing efficiency by enlarging the production scale and remarkably reducing the manufacturing cost per unit area and an apparatus for manufacturing this thin plate, a method and an apparatus performing introduction of a substrate into a main chamber and discharge of the substrate from the main chamber through at least one subsidiary chamber adjacent to the main chamber are employed when manufacturing a silicon thin plate by dipping a surface layer part of the substrate into a silicon melt in a crucible arranged in the main chamber for bonding silicon to the surface of the substrate.
    Type: Application
    Filed: June 24, 2003
    Publication date: October 27, 2005
    Inventors: Shuji Goma, Hirozumi Gokaku, Toshiaki Nagai, Kozaburo Yano, Masahiro Tadokoro, Yasuhiro Nakai
  • Patent number: 6573699
    Abstract: A device for measuring an electric current of a target circuit includes a pair of contact pins, a resistor electrically connected between the contact pins, a voltage drop appearing across the resistor when the contact pins come into contact with the target circuit to direct the electric current to the resistor, and an electro-optical crystal electrically connected between the contact pins in parallel with the resistor, the electro-optical crystal having a voltage applied thereto responsive to the voltage drop appearing across the resistor, wherein the voltage applied to the electro-optical crystal changes polarization of a light beam passing therethrough, thereby allowing the electric current to be measured from the polarization.
    Type: Grant
    Filed: September 12, 2000
    Date of Patent: June 3, 2003
    Assignee: Fujitsu Limited
    Inventors: Soichi Hama, Akira Fujii, Hidenori Sekiguchi, Shinichi Wakana, Toshiaki Nagai
  • Publication number: 20020178129
    Abstract: A lease-business support apparatus collects latest information from a brand-new-sales-company terminal, a secondhand-sales-company terminal, a leasing-company terminal, and a maintenance-company terminal which are related to lease business. By performing quality management and appropriate fixed-period-sales-price calculation based on the latest information, the lease-business support apparatus provides each customer terminal with appropriate lease-business information. This makes it possible to inexpensively lease a high-quality item.
    Type: Application
    Filed: January 29, 2002
    Publication date: November 28, 2002
    Inventors: Katsunori Horimoto, Kunihiro Takeda, Hitomi Nemoto, Mitsuyoshi Uchida, Osamu Kawabata, Toru Endo, Yoshihisa Tsuji, Shuji Shimada, Masayuki Enari, Hironori Kato, Yoko Toyoda, Hisahito Gondo, Hisayoshi Nakagome, Aritomo Sakamoto, Hideyasu Kokubo, Toshiaki Nagai, Kiyotaka Iwamoto, Kazuo Hotta, Yutaka Okazaki, Hisao Myoga
  • Patent number: 6259244
    Abstract: An electrooptic voltage waveform measuring apparatus, which includes an electrooptic element having an electrooptic effect; a first electrode mounted on the electrooptic element and electrically coupled to an object to be measured; and a first light source irradiating a light on the electrooptic element. The electrooptic voltage waveform measuring apparatus further includes a polarization analyzer for analyzing a polarization state of the light passed through the electrooptic element and detecting a voltage waveform of the object; a second electrode mounted on the electrooptic element and separated from the first electrode; and an amplifier having an input terminal coupled to the second electrode and outputting a low-frequency component of the voltage waveform of the object.
    Type: Grant
    Filed: January 19, 2000
    Date of Patent: July 10, 2001
    Assignee: Fujitsu Limited
    Inventors: Shin-ichi Wakana, Akinori Miyamoto, Soichi Hama, Kazuyuki Ozaki, Toshiaki Nagai
  • Patent number: 6057677
    Abstract: An electrooptic voltage waveform measuring apparatus, which includes an electrooptic element having an electrooptic effect; a first electrode mounted on the electrooptic element and electrically coupled to an object to be measured; and a first light source irradiating a light on the electrooptic element. The electrooptic voltage waveform measuring apparatus further includes a polarization analyzer for analyzing a polarization state of the light passed through the electrooptic element and detecting a voltage waveform of the object; a second electrode mounted on the electrooptic element and separated from the first electrode; and an amplifier having an input terminal coupled to the second electrode and outputting a low-frequency component of the voltage waveform of the object.
    Type: Grant
    Filed: April 23, 1997
    Date of Patent: May 2, 2000
    Assignee: Fujitsu Limited
    Inventors: Shin-ichi Wakana, Akinori Miyamoto, Soichi Hama, Kazuyuki Ozaki, Toshiaki Nagai