Patents by Inventor Toshiaki Takenaka

Toshiaki Takenaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6776090
    Abstract: A circuit board with high quality is provided by preventing the falling of paste which comes around to the squeegee complementary angle side during the pattern printing or paste filling by the squeegeeing method. While lowering, the squeegee is passed through the inclined portion of a paste removing section (3) provided on a mask (2) before pattern printing or paste filling, whereby the paste on the non-printing side (complementary angle) of the squeegee can be removed; thus, a circuit board superior in quality is obtained.
    Type: Grant
    Filed: January 3, 2002
    Date of Patent: August 17, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshiaki Takenaka, Toshikazu Kondo, Mitsunori Maeda, Hiroshi Tahara, Shinji Nakamura, Yuichiro Sugita
  • Publication number: 20040126516
    Abstract: It is possible to obtain a clean high-quality circuit board by removing affected material and foreign matter produced when a hole is formed. A manufacturing method of the circuit board includes (a) preparing a film-coated board material by bonding a film material as a mask to a board material, (b) forming a hole in the film-coated board material by applying a laser beam thereto, and (c) selectively removing the unnecessary material sticking to the film-coated board material from the film-coated board material by supersonic cleaning without peeling the film material off the board material. Unnecessary material such as foreign matter is produced when the hole is formed, and the unnecessary material sticks to the board material. After removal of such unnecessary material, a conductive material is disposed in the hole, using the film material as a mask, and the film material is later removed from the board material.
    Type: Application
    Filed: December 12, 2003
    Publication date: July 1, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Kunio Kishimoto, Toshihiro Nishii, Toshiaki Takenaka, Shinji Nakamura, Akihiro Miura
  • Patent number: 6700071
    Abstract: A circuit board having stable connection resistance can be obtained . The multi-layer circuit board includes the steps of making through-holes in a incompressible substrate having films on either side thereof via a bonding layer; filling conductive paste into the through-holes; removing the films from the substrate; laminating metallic foils to either side of the substrate and heating same under pressures to harden the bonding layer, bonding the metallic foils to the substrate and electrically connecting the sides of the substrate to each other; and forming a circuit pattern by machining the metallic foils.
    Type: Grant
    Filed: August 14, 2001
    Date of Patent: March 2, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshiaki Takenaka, Toshihiro Nishii, Shigeru Yamane, Shinji Nakamura, Hideaki Komoda, Kunio Kishimoto
  • Publication number: 20040035604
    Abstract: A circuit board having stable connection resistance can be obtained. The multi-layer circuit board includes the steps of making through-holes in a incompressible substrate having films on either side thereof via a bonding layer; filling conductive paste into the through-holes; removing the films from the substrate; laminating metallic foils to either side of the substrate and heating same under pressures to harden the bonding layer, bonding the metallic foils to the substrate and electrically connecting the sides of the substrate to each other; and forming a circuit pattern by machining the metallic foils.
    Type: Application
    Filed: August 27, 2003
    Publication date: February 26, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Toshiaki Takenaka, Toshihiro Nishii, Shigeru Yamane, Shinji Nakamura, Hideaki Komoda, Kunio Kishimoto
  • Patent number: 6694612
    Abstract: A mask film includes a base material, a parting layer and a non-parting portion placed on the base material. Accordingly, an optimum adhesion strength of the mask film and a prepreg sheet can be maintained, and peeling between the mask film and prepreg sheet can be prevented. Further, by preventing the fusing adhesion between the mask film and prepreg sheet due to heat generated when forming penetration holes, a circuit board having an excellent quality is obtained.
    Type: Grant
    Filed: May 18, 2000
    Date of Patent: February 24, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshiaki Takenaka, Toshikazu Kondo, Kunio Kishimoto, Shinji Nakamura, Fumio Echigo
  • Publication number: 20030153197
    Abstract: A mask film includes a base material, a parting layer and a non-parting portion placed on the base material. Accordingly, an optimum adhesion strength of the mask film and a prepreg sheet can be maintained, and peeling between the mask film and prepreg sheet can be prevented. Further, by preventing the fusing adhesion between the mask film and prepreg sheet due to heat generated when forming penetration holes, a circuit board having an excellent quality is obtained.
    Type: Application
    Filed: January 9, 2003
    Publication date: August 14, 2003
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Toshiaki Takenaka, Toshikazu Kondo, Kunio Kishimoto, Shinji Nakamura, Fumio Echigo
  • Publication number: 20030138553
    Abstract: A method of manufacturing multi-layer circuit board comprising: a hole forming step for forming through-holes or blind-holes in a plate-form or sheet-form board material, and a filling step for filling a paste into through-holes or blind-holes formed in the hole forming step by using a filling means. A second paste is supplied to the paste in the filling process by using a paste supplying means to stabilized a viscosity of the paste and the paste is reliably filled into the through-holes or the blind-holes.
    Type: Application
    Filed: November 21, 2002
    Publication date: July 24, 2003
    Inventors: Toshiaki Takenaka, Toshihiro Nishii, Yuichiro Sugita, Shinji Nakamura, Hideaki Komoda, Toshikazu Kondo
  • Patent number: 6528733
    Abstract: An inner layer circuit board with a convex inner layer circuit pattern having a predetermined thickness, a prepreg sheet having conductive material disposed in a plurality of through-holes and metallic foil are laminated to a substrate, and the laminated board is heated under pressures. After that, a laminated circuit pattern is formed by machining the metallic foil. In such multi-layer circuit board, a smoothing layer is disposed on a concave portion where no inner layer circuit pattern of the inner layer circuit board is formed. In this way, the conductive materials disposed in a plurality of through-holes are uniformly compressed. As a result, the connection resistance between the inner circuit pattern and the laminated circuit pattern becomes stabilized.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: March 4, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshiaki Takenaka, Toshihiro Nishii, Shigeru Yamane, Shinji Nakamura, Hideaki Komoda, Kunio Kishimoto
  • Patent number: 6523258
    Abstract: A method of performing a printed circuit board including the steps of: (a) disposing a first release film on the surface of a substrate and a second release film on the back of the substrate; (b) forming a through-hole in the first release film, the second release film, and the substrate; (c) filling conductive paste into a through-hole; (d) removing the first release film and the second release film from the substrate with the through-hole filled with the conductive paste; (e) placing a first metallic member on the surface of the substrate with the release films removed and placing a second metallic member on the back of the substrate; (f) compressing under heat the substrate with the first metallic member and the second metallic member disposed thereon; and (g) forming a desired circuit pattern on the first metallic member and the second metallic member.
    Type: Grant
    Filed: March 7, 2001
    Date of Patent: February 25, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Eiji Kawamoto, Shigeru Yamane, Toshiaki Takenaka
  • Publication number: 20020189856
    Abstract: A circuit board having stable connection resistance can be obtained . The multi-layer circuit board includes the steps of making through-holes in a incompressible substrate having films on either side thereof via a bonding layer; filling conductive paste into the through-holes; removing the films from the substrate; laminating metallic foils to either side of the substrate and heating same under pressures to harden the bonding layer, bonding the metallic foils to the substrate and electrically connecting the sides of the substrate to each other; and forming a circuit pattern by machining the metallic foils.
    Type: Application
    Filed: August 14, 2001
    Publication date: December 19, 2002
    Inventors: Toshiaki Takenaka, Toshihiro Nishii, Shigeru Yamane, Shinji Nakamura, Hideaki Komoda, Kunio Kishimoto
  • Publication number: 20020178942
    Abstract: A circuit board with high quality is provided by preventing the falling of paste which comes around to the squeegee complementary angle side during the pattern printing or paste filling by the squeegeeing method. While lowering, the squeegee is passed through the inclined portion of a paste removing section (3) provided on a mask (2 ) before pattern printing or paste filling, whereby the paste on the non-printing side (complementary angle) of the squeegee can be removed; thus, a circuit board superior in quality is obtained.
    Type: Application
    Filed: January 3, 2002
    Publication date: December 5, 2002
    Inventors: Toshiaki Takenaka, Toshikazu Kondo, Mitsunori Maeda, Hiroshi Tahara, Shinji Nakamura, Yuichiro Sugita
  • Publication number: 20020170876
    Abstract: A method of manufacturing a PCB comprising the steps of: forming through-holes in a substrate having releasing layers on front and back faces; filling conductive paste in the through-holes; removing the releasing layers and disposing metal foil on both faces of the substrate; and heat pressing them. A diameter of the through-holes is larger than that of corresponding holes formed on the releasing layers. According to the present invention, when the conductive paste is compressed, conductive paste protruding from the surface of the substrate is trapped at the edges of the through-holes. This configuration prevents short circuits with undesirable wiring patterns. So, an enough amount of the conductive paste can protrude from the surface of the substrate. Therefore, after the compression, stable electric connections inside the conductive paste and between the conductive paste and the metal foils are ensured, thus PCBs with superior reliability can be produced.
    Type: Application
    Filed: June 7, 2002
    Publication date: November 21, 2002
    Inventors: Eiji Kawamoto, Shigeru Yamane, Toshiaki Takenaka, Toshihiro Nishii
  • Publication number: 20020173109
    Abstract: A method and system of cleaning to remove cutting dust and the like generated and adhering to a board material (1a) during drilling for electrical connection, and drying the board material, in a process of manufacturing a circuit board for small electronic equipment and the like. A large amount of board materials can be treated without receiving thermal damage by performing the steps of: placing sheets of the board material that have absorbed moisture resulting from cleaning, like a stack in a vacuum chamber (11); and drying the board material by repeating evacuation and pressurization under predetermined conditions while heating the board material.
    Type: Application
    Filed: February 8, 2002
    Publication date: November 21, 2002
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kunio Kishimoto, Toshihiro Nishii, Toshiaki Takenaka, Shinji Nakamura, Akihiro Miura
  • Publication number: 20020020548
    Abstract: An inner layer circuit board with a convex inner layer circuit pattern having a predetermined thickness, a prepreg sheet having conductive material disposed in a plurality of through-holes and metallic foil are laminated to a substrate, and the laminated board is heated under pressures. After that, a laminated circuit pattern is formed by machining the metallic foil. In such multi-layer circuit board, a smoothing layer is disposed on a concave portion where no inner layer circuit pattern of the inner layer circuit board is formed. In this way, the conductive materials disposed in a plurality of through-holes are uniformly compressed. As a result, the connection resistance between the inner circuit pattern and the laminated circuit pattern becomes stabilized.
    Type: Application
    Filed: July 12, 2001
    Publication date: February 21, 2002
    Inventors: Toshiaki Takenaka, Toshihiro Nishii, Shigeru Yamane, Shinji Nakamura, Hideaki Komoda, Kunio Kishimoto
  • Publication number: 20010025415
    Abstract: A method of performing a printed circuit board including the steps of: (a) disposing a first release film on the surface of a substrate and a second release film on the back of the substrate; (b) forming a through-hole in the first release film, the second release film, and the substrate; (c) filling conductive paste into a through-hole; (d) removing the first release film and the second release film from the substrate with the through-hole filled with the conductive paste; (e) placing a first metallic member on the surface of the substrate with the release films removed and placing a second metallic member on the back of the substrate; (f) compressing under heat the substrate with the first metallic member and the second metallic member disposed thereon; and (g) forming a desired circuit pattern on the first metallic member and the second metallic member.
    Type: Application
    Filed: March 7, 2001
    Publication date: October 4, 2001
    Inventors: Eiji Kawamoto, Shigeru Yamane, Toshiaki Takenaka
  • Publication number: 20010004803
    Abstract: It is possible to obtain a clean high-quality circuit board by removing affected material and foreign matter produced when a hole is formed. A manufacturing method of the circuit board includes (a) preparing a film-coated board material by bonding a film material as a mask to a board material, (b) forming a hole in the film-coated board material by applying a laser beam thereto, and (c) selectively removing the unnecessary material sticking to the film-coated board material from the film-coated board material by supersonic cleaning without peeling the film material off the board material. Unnecessary material such as foreign matter is produced when the hole is formed, and the unnecessary material sticks to the board material. After removal of such unnecessary material, a conductive material is disposed in the hole, using the film material as a mask, and the film material is later removed from the board material.
    Type: Application
    Filed: December 15, 2000
    Publication date: June 28, 2001
    Inventors: Kunio Kishimoto, Toshihiro Nishii, Toshiaki Takenaka, Shinji Nakamura, Akihiro Miura