Patents by Inventor Toshifumi NISHIGUCHI
Toshifumi NISHIGUCHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10971621Abstract: A semiconductor device includes a semiconductor body, first and second electrodes, and first and second control electrodes. The first and second electrodes are provided on the semiconductor body. The first and second control electrodes each include a first portion positioned between the semiconductor body and the first electrode, a second portion positioned between the semiconductor body and the second electrode, and a third portion linked to the first and second portions. The semiconductor body includes first to fourth semiconductor layers. The second semiconductor layer is provided on the first semiconductor layer, and extends along the first to third portions. The fourth semiconductor layer is provided selectively on the second semiconductor layer, and extends along the second and third portions. The fourth semiconductor layer includes second conductivity-type impurities with a higher concentration than a concentration of second conductivity-type impurities in the second semiconductor layer.Type: GrantFiled: August 16, 2019Date of Patent: April 6, 2021Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Hiroaki Katou, Tatsuya Nishiwaki, Kohei Oasa, Toshifumi Nishiguchi
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Patent number: 10840368Abstract: According to an embodiment, a semiconductor device includes a first electrode, a first semiconductor region, second semiconductor regions, third semiconductor regions, a first conductive portion, a gate electrode, and a second electrode. The gate electrode includes a first electrode portion and a second electrode portion. The first electrode portion opposes a portion of the first semiconductor region, one of the second semiconductor regions, and one of the third semiconductors in a first direction perpendicular to a second direction. The second electrode portion is located between the first electrode portion and another one of the third semiconductor regions in the first direction. The second electrode portion opposes another portion of the first semiconductor region, another one of the second semiconductor regions, and the other one of the third semiconductor regions. A second insulating portion including a void is provided between the first electrode portion and the second electrode portion.Type: GrantFiled: May 8, 2019Date of Patent: November 17, 2020Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Tetsuya Ohno, Hiroaki Katou, Kenya Kobayashi, Toshifumi Nishiguchi, Saya Shimomura
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Publication number: 20200295150Abstract: A semiconductor device of an embodiment includes: a first semiconductor layer having; a second semiconductor layer being provided on the first semiconductor layer; a third semiconductor layer being provided on the second semiconductor layer; a fourth semiconductor layer being provided on the third semiconductor layer; a field plate electrode provided in a trench via a first insulating film, the trench provided in the second semiconductor layer, the third semiconductor layer, and the fourth semiconductor layer; a first electrode provided in the trench to face the third semiconductor layer via a third insulating film; and a second insulating film provided in the trench to be interposed by the first electrodes and having a first portion, the first portion being interposed by lower ends of the first electrodes and having a width wider than a width of a second portion interposed by centers of the first electrodes.Type: ApplicationFiled: August 1, 2019Publication date: September 17, 2020Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Tatsuya NISHIWAKI, Kentaro ICHINOSEKI, Hiroaki KATOU, Toshifumi NISHIGUCHI
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Publication number: 20200273978Abstract: According to an embodiment, a semiconductor device includes a first electrode, a first semiconductor region, second semiconductor regions, third semiconductor regions, a first conductive portion, a gate electrode, and a second electrode. The gate electrode includes a first electrode portion and a second electrode portion. The first electrode portion opposes a portion of the first semiconductor region, one of the second semiconductor regions, and one of the third semiconductors in a first direction perpendicular to a second direction. The second electrode portion is located between the first electrode portion and another one of the third semiconductor regions in the first direction. The second electrode portion opposes another portion of the first semiconductor region, another one of the second semiconductor regions, and the other one of the third semiconductor regions. A second insulating portion including a void is provided between the first electrode portion and the second electrode portion.Type: ApplicationFiled: May 8, 2019Publication date: August 27, 2020Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Tetsuya Ohno, Hiroaki Katou, Kenya Kobayashi, Toshifumi Nishiguchi, Saya Shimomura
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Publication number: 20200266293Abstract: A semiconductor device includes a semiconductor body, first and second electrodes, and first and second control electrodes. The first and second electrodes are provided on the semiconductor body. The first and second control electrodes each include a first portion positioned between the semiconductor body and the first electrode, a second portion positioned between the semiconductor body and the second electrode, and a third portion linked to the first and second portions. The semiconductor body includes first to fourth semiconductor layers. The second semiconductor layer is provided on the first semiconductor layer, and extends along the first to third portions. The fourth semiconductor layer is provided selectively on the second semiconductor layer, and extends along the second and third portions. The fourth semiconductor layer includes second conductivity-type impurities with a higher concentration than a concentration of second conductivity-type impurities in the second semiconductor layer.Type: ApplicationFiled: August 16, 2019Publication date: August 20, 2020Inventors: Hiroaki Katou, Tatsuya Nishiwaki, Kohei Oasa, Toshifumi Nishiguchi
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Publication number: 20200259015Abstract: A semiconductor device includes a semiconductor body; first and second electrodes provided on back and front surfaces of the semiconductor body, respectively; a third electrode provided on the front surface; and a control electrode disposed inside a trench on the front surface side, and electrically connected to the third electrode. The third electrode is electrically insulated from the semiconductor body and the second electrode. The control electrode is placed between the semiconductor body and the second electrode, and is electrically insulated from the semiconductor body and the second electrode. The control electrode continuously extends inside the trench without branching. The control electrode includes first and second portions. The first portion extends in a first direction parallel to the front surface of the semiconductor body, and the second portion extends in a second direction parallel to the front surface of the semiconductor body and crossing the first direction.Type: ApplicationFiled: August 19, 2019Publication date: August 13, 2020Inventor: Toshifumi Nishiguchi
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Patent number: 10522620Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a gate electrode, and a conductive portion. The second semiconductor region is provided on the first semiconductor region. The third semiconductor region is provided on the second semiconductor region. The gate electrode opposes, in a second direction with a gate insulating layer interposed, the third semiconductor region, the second semiconductor region, and the first semiconductor region. The second direction is perpendicular to a first direction from the second semiconductor region toward the third semiconductor region. The conductive portion includes first and second portions. The first and second portions are respectively arranged with the second and third semiconductor regions. A length of the first portion is longer than a length of the second portion.Type: GrantFiled: July 2, 2018Date of Patent: December 31, 2019Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Toshifumi Nishiguchi
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Patent number: 10453930Abstract: A semiconductor device includes a first electrode, a first semiconductor layer on the first electrode, a second semiconductor layer on the first semiconductor layer, a third semiconductor layer on the second semiconductor layer, a second electrode in electrical contact with the third semiconductor layer, a gate electrode, a first insulating film between the side surface of the third semiconductor layer and the gate electrode, a field plate electrode, and a second insulating film. The field plate has an upper portion adjacent to the gate electrode and a lower portion having a width less than a width of the upper portion. The second insulating film has a first portion between the field plate electrode's upper portion and the first semiconductor layer and a second portion between the field plate electrode's lower portion and the first semiconductor layer, the second portion having a width greater than the width of the first portion.Type: GrantFiled: September 3, 2017Date of Patent: October 22, 2019Assignee: KABUSHIKI KAISHA TOSHIBAInventor: Toshifumi Nishiguchi
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Publication number: 20190245036Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a gate electrode, and a conductive portion. The second semiconductor region is provided on the first semiconductor region. The third semiconductor region is provided on the second semiconductor region. The gate electrode opposes, in a second direction with a gate insulating layer interposed, the third semiconductor region, the second semiconductor region, and the first semiconductor region. The second direction is perpendicular to a first direction from the second semiconductor region toward the third semiconductor region. The conductive portion includes first and second portions. The first and second portions are respectively arranged with the second and third semiconductor regions. A length of the first portion is longer than a length of the second portion.Type: ApplicationFiled: July 2, 2018Publication date: August 8, 2019Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Toshifumi NISHIGUCHI
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Patent number: 10319850Abstract: According to one embodiment, a semiconductor device comprising a drain layer, a base region, a source region, a field plate electrode, and a gate region. The drift layer is formed on the drain layer. The base region is formed on the drift layer. The source region is formed on the base region. The field plate electrode is formed inside a trench reaching the drift layer through the base region from the source region. The gate region is formed inside the trench, wherein the gate region has a U-shape including a recess on the gate region in a direction along the trench and is formed such that, on upper surfaces of respective both ends of the U-shape, a position of an inner end on a side of the recess is higher than a position of an outer end on a side of the second insulating film.Type: GrantFiled: March 9, 2018Date of Patent: June 11, 2019Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Saya Shimomura, Toshifumi Nishiguchi, Hiroaki Katou, Kenya Kobayashi, Takahiro Kawano, Tetsuya Ohno
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Publication number: 20190088776Abstract: According to one embodiment, a semiconductor device comprising a drain layer, a base region, a source region, a field plate electrode, and a gate region. The drift layer is formed on the drain layer. The base region is formed on the drift layer. The source region is formed on the base region. The field plate electrode is formed inside a trench reaching the drift layer through the base region from the source region. The gate region is formed inside the trench, wherein the gate region has a U-shape including a recess on the gate region in a direction along the trench and is formed such that, on upper surfaces of respective both ends of the U-shape, a position of an inner end on a side of the recess is higher than a position of an outer end on a side of the second insulating film.Type: ApplicationFiled: March 9, 2018Publication date: March 21, 2019Inventors: Saya Shimomura, Toshifumi Nishiguchi, Hiroaki Katou, Kenya Kobayashi, Takahiro Kawano, Tetsuya Ohno
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Publication number: 20180308943Abstract: A semiconductor device includes a first electrode, a first semiconductor layer on the first electrode, a second semiconductor layer on the first semiconductor layer, a third semiconductor layer on the second semiconductor layer, a second electrode in electrical contact with the third semiconductor layer, a gate electrode, a first insulating film between the side surface of the third semiconductor layer and the gate electrode, a field plate electrode, and a second insulating film. The field plate has an upper portion adjacent to the gate electrode and a lower portion having a width less than a width of the upper portion. The second insulating film has a first portion between the field plate electrode's upper portion and the first semiconductor layer and a second portion between the field plate electrode's lower portion and the first semiconductor layer, the second portion having a width greater than the width of the first portion.Type: ApplicationFiled: September 3, 2017Publication date: October 25, 2018Inventor: Toshifumi NISHIGUCHI
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Publication number: 20180226473Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type provided on the first semiconductor region, a third semiconductor region of the first conductivity type provided on the second semiconductor region, a first insulating part provided in the first semiconductor region, a first electrode provided in the first semiconductor region, the first insulating part disposed between the first electrode and the first semiconductor region, a second insulating part provided on the first electrode, a gate electrode provided on the second insulating part, a gate insulating part provided between the gate electrode and the second semiconductor region, and a second electrode provided on the second semiconductor region and on the third semiconductor region, and is electrically connected to the second semiconductor region, the third semiconductor region, and the first electrode.Type: ApplicationFiled: April 2, 2018Publication date: August 9, 2018Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kenya KOBAYASHI, Tetsuo MATSUDA, Yosuke HIMORI, Toshifumi NISHIGUCHI
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Patent number: 9947751Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type provided on the first semiconductor region, a third semiconductor region of the first conductivity type provided on the second semiconductor region, a first insulating part provided in the first semiconductor region, a first electrode provided in the first semiconductor region, the first insulating part disposed between the first electrode and the first semiconductor region, a second insulating part provided on the first electrode, a gate electrode provided on the second insulating part, a gate insulating part provided between the gate electrode and the second semiconductor region, and a second electrode provided on the second semiconductor region and on the third semiconductor region, and is electrically connected to the second semiconductor region, the third semiconductor region, and the first electrode.Type: GrantFiled: March 2, 2017Date of Patent: April 17, 2018Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Kenya Kobayashi, Tetsuo Matsuda, Yosuke Himori, Toshifumi Nishiguchi
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Publication number: 20180083110Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type provided on the first semiconductor region, a third semiconductor region of the first conductivity type provided on the second semiconductor region, a first insulating part provided in the first semiconductor region, a first electrode provided in the first semiconductor region, the first insulating part disposed between the first electrode and the first semiconductor region, a second insulating part provided on the first electrode, a gate electrode provided on the second insulating part, a gate insulating part provided between the gate electrode and the second semiconductor region, and a second electrode provided on the second semiconductor region and on the third semiconductor region, and is electrically connected to the second semiconductor region, the third semiconductor region, and the first electrode.Type: ApplicationFiled: March 2, 2017Publication date: March 22, 2018Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kenya KOBAYASHI, Tetsuo MATSUDA, Yosuke HIMORI, Toshifumi NISHIGUCHI
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Patent number: 9842924Abstract: A semiconductor device includes a layer having first and second surfaces, a first region including central and peripheral portions, and a second region on the first region. First trenches extend into the first surface and terminate within the first region in the central portion. Each first trench includes a first electrode and a gate electrode over the first electrode. The first and gate electrodes are spaced from the first and second regions by a first insulating layer. A second trench extends into the first surface and terminates within the first region in the peripheral portion. The second trench includes a second electrode and a third electrode over the second electrode. The second and third electrodes are spaced from the first and second regions by a second insulating layer. A fourth electrode overlies the first insulating layer in the central portion and the second insulating layer in the peripheral portion.Type: GrantFiled: August 25, 2016Date of Patent: December 12, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Hiroaki Katou, Toshifumi Nishiguchi, Saya Shimomura, Akio Suzuki, Kentaro Ichinoseki
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Publication number: 20170222038Abstract: A semiconductor device includes a layer having first and second surfaces, a first region including central and peripheral portions, and a second region on the first region. First trenches extend into the first surface and terminate within the first region in the central portion. Each first trench includes a first electrode and a gate electrode over the first electrode. The first and gate electrodes are spaced from the first and second regions by a first insulating layer. A second trench extends into the first surface and terminates within the first region in the peripheral portion. The second trench includes a second electrode and a third electrode over the second electrode. The second and third electrodes are spaced from the first and second regions by a second insulating layer. A fourth electrode overlies the first insulating layer in the central portion and the second insulating layer in the peripheral portion.Type: ApplicationFiled: August 25, 2016Publication date: August 3, 2017Inventors: Hiroaki KATOU, Toshifumi NISHIGUCHI, Saya SHIMOMURA, Akio SUZUKI, Kentaro ICHINOSEKI
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Patent number: 9716009Abstract: According to one embodiment, a semiconductor device includes: a first semiconductor region; a second semiconductor region selectively provided on the first semiconductor region; a third semiconductor region selectively provided on the second semiconductor region; a first electrode provided on the third semiconductor region and connected to the third semiconductor region; a second electrode electrically connected to the first semiconductor region; a third electrode provide via an insulating film on the first semiconductor region, the second semiconductor region, and the third semiconductor region; and a fourth electrode provided on the second electrode side of the third electrode, the fourth electrode being provided via the insulating film on the first semiconductor region. The insulating film has three or more regions between the fourth electrode and the first semiconductor region.Type: GrantFiled: March 5, 2015Date of Patent: July 25, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Kenya Kobayashi, Toshifumi Nishiguchi
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Patent number: 9337283Abstract: A semiconductor device includes a first semiconductor layer, a second semiconductor layer of a second conductivity type formed on the first semiconductor layer, a first electrode which extends in a first direction and is surrounded by the first semiconductor layer except at one end thereof, and a first insulation film which is formed between the first semiconductor layer and the first electrode. A film thickness of the first insulation film between the other end of the first electrode in a second direction opposite to the first direction and the first semiconductor layer includes a thickness that is greater than a thickness of the first insulation film along a side surface of the first electrode. The semiconductor device also includes a second electrode which faces the second semiconductor layer, and a second insulation film which is formed between the second electrode and the second semiconductor layer.Type: GrantFiled: September 2, 2013Date of Patent: May 10, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventor: Toshifumi Nishiguchi
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Publication number: 20160093719Abstract: According to one embodiment, a semiconductor device includes: a first semiconductor region; a second semiconductor region selectively provided on the first semiconductor region; a third semiconductor region selectively provided on the second semiconductor region; a first electrode provided on the third semiconductor region and connected to the third semiconductor region; a second electrode electrically connected to the first semiconductor region; a third electrode provide via an insulating film on the first semiconductor region, the second semiconductor region, and the third semiconductor region; and a fourth electrode provided on the second electrode side of the third electrode, the fourth electrode being provided via the insulating film on the first semiconductor region. The insulating film has three or more regions between the fourth electrode and the first semiconductor region.Type: ApplicationFiled: March 5, 2015Publication date: March 31, 2016Inventors: Kenya Kobayashi, Toshifumi Nishiguchi