Patents by Inventor Toshifumi NISHIGUCHI

Toshifumi NISHIGUCHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150263162
    Abstract: In one embodiment, a semiconductor device includes first, second, third, fourth, fifth and sixth electrodes extending in a first direction, the third and fourth electrodes being provided to sandwich the first electrode, the fifth and sixth electrodes being provided to sandwich the second electrode, the first, second, fifth and sixth electrodes being electrically connected with one another, and the third and fourth electrodes being electrically connected with each other and electrically independent from the first, second, fifth and sixth electrodes. The device further includes a semiconductor layer provided between one of the third and fourth electrodes and one of the fifth and sixth electrodes. The device further includes a first interconnect provided on the second, fifth and sixth electrodes and on the semiconductor layer.
    Type: Application
    Filed: September 10, 2014
    Publication date: September 17, 2015
    Inventors: Toshifumi Nishiguchi, Hideki Okumura
  • Patent number: 9099435
    Abstract: A method of manufacturing a semiconductor device includes forming trenches in a first conductivity type semiconductor layer. An insulating film is then formed to cover the inner surfaces of the trenches. A part of the insulating film which is covering a bottom part of the trenches is removed from at least a portion of the trenches. Dopant ions are implanted into regions of the semiconductor layer that are below the bottom parts of that portion of the trenches from which the portion of the insulating film has been removed.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: August 4, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Toshifumi Nishiguchi
  • Publication number: 20150079758
    Abstract: A method of manufacturing a semiconductor device includes forming trenches in a first conductivity type semiconductor layer. An insulating film is then formed to cover the inner surfaces of the trenches. A part of the insulating film which is covering a bottom part of the trenches is removed from at least a portion of the trenches. Dopant ions are implanted into regions of the semiconductor layer that are below the bottom parts of that portion of the trenches from which the portion of the insulating film has been removed.
    Type: Application
    Filed: February 28, 2014
    Publication date: March 19, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Toshifumi NISHIGUCHI
  • Publication number: 20140284773
    Abstract: A semiconductor device includes a first semiconductor layer, a second semiconductor layer of a second conductivity type formed on the first semiconductor layer, a first electrode which extends in a first direction and is surrounded by the first semiconductor layer except at one end thereof, and a first insulation film which is formed between the first semiconductor layer and the first electrode. A film thickness of the first insulation film between the other end of the first electrode in a second direction opposite to the first direction and the first semiconductor layer includes a thickness that is greater than a thickness of the first insulation film along a side surface of the first electrode. The semiconductor device also includes a second electrode which faces the second semiconductor layer, and a second insulation film which is formed between the second electrode and the second semiconductor layer.
    Type: Application
    Filed: September 2, 2013
    Publication date: September 25, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Toshifumi NISHIGUCHI
  • Publication number: 20140035030
    Abstract: According to one embodiment, in a semiconductor device, a semiconductor laminated body includes a first semiconductor region of a first conductivity type and a second semiconductor region of the first conductivity type provided on the first semiconductor region and having a higher concentration of impurities than that of the first semiconductor region. A third semiconductor region includes a side surface and a lower end, the side surface and the lower end are surrounded by the semiconductor laminated body. A fourth semiconductor region of a second conductivity type is provided between the semiconductor laminated body and the third semiconductor region. A fifth semiconductor region of the first conductivity type is in contact with an outside surface of the semiconductor laminated body opposite to an inside surface of the semiconductor laminated body, the inside surface is in contact with the fourth semiconductor region.
    Type: Application
    Filed: February 28, 2013
    Publication date: February 6, 2014
    Inventors: Masaaki OGAWA, Toshifumi NISHIGUCHI, Tsuyoshi OTA
  • Publication number: 20130277734
    Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region; a second semiconductor region having a side face and a lower face, and the faces surrounded by the first semiconductor region; a third semiconductor region provided between the second semiconductor region and the first semiconductor region; a fourth semiconductor region being in contact with an outer side face of the first semiconductor region; a plurality of first electrodes being in contact with the second semiconductor region, the third semiconductor region, and the first semiconductor region via an insulating film; a plurality of pillar areas extending from the third semiconductor region toward the fourth semiconductor region, each of the plurality of pillar areas being provided between adjacent ones of the plurality of first electrodes. An impurity density of each of the pillar areas and an impurity density of the third semiconductor region is substantially the same.
    Type: Application
    Filed: August 31, 2012
    Publication date: October 24, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Toshifumi NISHIGUCHI, Keiko KAWAMURA, Hideki OKUMURA, Tatsuya NISHIWAKI