Abstract: A progress diagram generation apparatus that allows time series to be easily grasped and input contents to be easily checked is provided. In a progress diagram generation apparatus (100) according to an example aspect of the invention, an observation information acquisition unit (101) is configured to acquire observation information related to an observation target, a time series data generation unit (102) is configured to extract date and time information indicating at least one of a date or a time and event information associated with the date and time information from the observation information and structure them to generate time series data, and a progress diagram generation unit (103) is configured to generate a progress diagram including a first axis indicating a time elapsed and a second axis indicating the event information.

Abstract: A foam molded article includes a main agent resin, a filler of greater than or equal to 15% by mass and less than or equal to 80% by mass, and a foaming agent of greater than or equal to 0.01% by mass and less than or equal to 10% by mass, and a foaming ratio caused by the foaming agent is greater than or equal to 1.1 times.

Abstract: A tool stocker for holding a tool is equipped with a stocker-inclining member that inclines the tool stocker and also equipped with a mechanism that adjusts an attaching/detaching position at which an interchangeable tool is attached to and detached from a robot arm. The attaching/detaching position can be adjusted by using the tool stocker so as to fit moving paths of the robot arm appropriately.

Abstract: A tool stocker for holding a tool is equipped with a stocker-inclining member that inclines the tool stocker and also equipped with a mechanism that adjusts an attaching/detaching position at which an interchangeable tool is attached to and detached from a robot arm. The attaching/detaching position can be adjusted by using the tool stocker so as to fit moving paths of the robot arm appropriately.

Abstract: A polyurethane porous membrane is produced by a simple method to be used for at least one of applications of cell culture and cancer cell growth inhibition. The production method of the polyurethane porous membrane to be used for at least one of the applications of cell culture and cancer cell growth inhibition comprises: a first step of forming a layer of a polyurethane material which is uncured, on a substrate; and a second step of supplying water vapor to an exposed surface of the layer of the polyurethane material formed on the substrate, which is away from the substrate, so as to cure the polyurethane material and provide the layer of the polyurethane material with a porous structure having a plurality of irregularities on the exposed surface.

Abstract: A strain wave gear apparatus includes a rigid internal gear, a flexible external gear, and a wave generator. The wave generator includes an input shaft fixing member including eccentric cams, bearings respectively fixed to outer sides of the eccentric cams, and housings respectively fitted to outer peripheral surfaces of the bearings. The eccentric cams are arranged side by side in a direction of an inclined axis inclined with respect to an input rotation axis at an inclination angle (?) in a manner that respective center axes of the eccentric cams are parallel to the inclined axis and decentered in directions opposite to each other from the inclined axis. The housings are each formed into a tapered shape so that an outer peripheral surface of each of the housings is held in surface contact with an inner peripheral surface of the flexible external gear.

Abstract: A polyurethane porous membrane is produced by a simple method to be used for at least one of applications of cell culture and cancer cell growth inhibition. The production method of the polyurethane porous membrane to be used for at least one of the applications of cell culture and cancer cell growth inhibition comprises: a first step of forming a layer of a polyurethane material which is uncured, on a substrate; and a second step of supplying water vapor to an exposed surface of the layer of the polyurethane material formed on the substrate, which is away from the substrate, so as to cure the polyurethane material and provide the layer of the polyurethane material with a porous structure having a plurality of irregularities on the exposed surface.

Abstract: A building material and a method for coating a substrate for the building material with a coating film having a variety of functions relating to an environment such as mildew resistance, deodorization, antibacterial activity and air purification in addition to the anti-staining effect by having an excellent hydrophilicity. The method for coating the substrate for a building material comprises the steps of; coating a coating material comprising a hydrophilic polymer and a photocatalyst on the substrate, and drying the coating material to form a coating film containing the photocatalyst, wherein the hydrophilic polymer is at least one selected from the group consisting of methyl silicate, liquid glass, colloidal silica, poly(meth)acrylate, and polytetrafluoroethylene graft-polymerized with sulfonic acid, and the photocatalyst is at least one selected from the group consisting of titanium oxide coated with zeolite, titanium oxide coated silica and titanium oxide coated with apatite.

Abstract: In addition to a memory macro region and functional circuit regions on a substrate, a semiconductor integrated circuit device includes a dummy pattern region 40 arranged between the functional circuit regions and between the memory macro region 10 and the functional circuit regions and including a dummy pattern. The dummy pattern has a pattern identical to that of diffusion layers and gate electrodes of a memory cell pattern in a memory cell array region. An area ratio of dummy diffusion layer(s) and dummy gate electrode(s) in the dummy pattern region is equal to or greater than that of the diffusion layers and the gate electrode(s) in the memory cell array region.

Abstract: A strain wave gear apparatus includes a rigid internal gear, a flexible external gear, and a wave generator. The wave generator includes an input shaft fixing member including eccentric cams, bearings respectively fixed to outer sides of the eccentric cams, and housings respectively fitted to outer peripheral surfaces of the bearings. The eccentric cams are arranged side by side in a direction of an inclined axis inclined with respect to an input rotation axis at an inclination angle (?) in a manner that respective center axes of the eccentric cams are parallel to the inclined axis and decentered in directions opposite to each other from the inclined axis. The housings are each formed into a tapered shape so that an outer peripheral surface of each of the housings is held in surface contact with an inner peripheral surface of the flexible external gear.

Abstract: In addition to a memory macro region and functional circuit regions on a substrate, a semiconductor integrated circuit device includes a dummy pattern region 40 arranged between the functional circuit regions and between the memory macro region 10 and the functional circuit regions and including a dummy pattern. The dummy pattern has a pattern identical to that of diffusion layers and gate electrodes of a memory cell pattern in a memory cell array region. An area ratio of dummy diffusion layer(s) and dummy gate electrode(s) in the dummy pattern region is equal to or greater than that of the diffusion layers and the gate electrode(s) in the memory cell array region.

Abstract: A semiconductor device according to an embodiment of the present invention includes: a first region having patterns formed based on grid points as intersections of grid lines; and a second region including a plurality of layout cells an outer edge of which is defined by the grid points, the layout cells having patterns formed based on a wiring rule with patterns connected to patterns of the first region among the patterns being formed based on the grid points at a boundary with the first region.

Abstract: In a semiconductor device including multiple unit cells arranged in an array, transistors are affected by a stress from an STI at different degrees depending on the position in the array. As a result, a variation occurs in transistor characteristic. In a semiconductor device according to the present invention, each of predetermined transistors in outermost unit blocks in the array has a transistor size according to the stress from the STI.

Abstract: The present invention includes a memory cell area that includes a plurality of transistors, and a core area that is arranged adjacent to the memory cell area. The memory cell area and the core area include a semiconductor layer, and an n-type well region and a first p-type well region formed above the semiconductor layer. The memory cell area further includes a second p-type well region formed under the n-type well region and the first p-type well region in the semiconductor layer. The second p-type well region contacts to at least the first p-type well region.

Abstract: A manufacturing method of semiconductor device includes: forming a nitride film above a silicon substrate including a first region and a second region which respectively correspond to an outside of a memory cell region and the memory cell region; forming trenches reaching from the nitride film to the silicon substrate; retreating the nitride film such that widths of the trenches at the nitride film become wider; forming a buried oxide film to be buried in the trenches after the retreating; polishing the buried oxide film with the nitride film being used as a stopper; removing the nitride film after the polishing; implanting impurity after the removing; forming gate electrodes after the implanting; and implanting impurity after the forming the gate electrodes.

Abstract: A semiconductor integrated circuit includes a word line extending along a first direction, a first and a second N-well regions, a P-well region disposed between the first and the second N-well regions, a memory cell having a first, second, third, and fourth PMOS transistors, and a first and second NMOS transistors, the first and the second PMOS transistors disposed in the first N-well region along a second direction which is different from the first direction, the first and the second NMOS transistors disposed in the P-well region, and the third and the fourth PMOS transistors disposed in the second N-well region along the second direction.

Abstract: To transfer web contents to a web server from a computer through a network, a plurality of files composing the web contents are stored in the computer. A processor of the computer then detects files to be transferred from the plurality of files to create a transfer file list table. A transfer priority of the files to be transferred is determined by the processor on the basis of reference relation data of the files to be transferred which are designated in the transfer file list table and file format data of the plurality of files to create a transfer priority list table for the files to be transferred. The files to be transferred are transferred to the web server from a communication controller of the computer through the network by the processor in order of the transfer priority set in the transfer priority list table.

Abstract: A building material and a method for coating a substrate for the building material with a coating film having a variety of functions relating to an environment such as mildew resistance, deodorization, antibacterial activity and air purification in addition to the anti-staining effect by having an excellent hydrophilicity. The method for coating the substrate for a building material comprises the steps of; coating a coating material comprising a hydrophilic polymer and a photocatalyst on the substrate, and drying the coating material to form a coating film containing the photocatalyst, wherein the hydrophilic polymer is at least one selected from the group consisting of methyl silicate, liquid glass, colloidal silica, poly(meth)acrylate, and polytetrafluoroethylene graft-polymerized with sulfonic acid, and the photocatalyst is at least one selected from the group consisting of titanium oxide coated with zeolite, titanium oxide coated silica and titanium oxide coated with apatite.

Abstract: A manufacturing method of semiconductor device includes: forming a nitride film above a silicon substrate including a first region and a second region which respectively correspond to an outside of a memory cell region and the memory cell region; forming trenches reaching from the nitride film to the silicon substrate; retreating the nitride film such that widths of the trenches at the nitride film become wider; forming a buried oxide film to be buried in the trenches after the retreating; polishing the buried oxide film with the nitride film being used as a stopper; removing the nitride film after the polishing; implanting impurity after the removing; forming gate electrodes after the implanting; and implanting impurity after the forming the gate electrodes.

Abstract: In a semiconductor device including multiple unit cells arranged in an array, transistors are affected by a stress from an STI at different degrees depending on the position in the array. As a result, a variation occurs in transistor characteristic. In a semiconductor device according to the present invention, each of predetermined transistors in outermost unit blocks in the array has a transistor size according to the stress from the STI.