Abstract: An information processing device includes a processor. The processor is configured to cause an information display unit to blink with a predetermined blinking pattern. The information display unit is arranged on a vehicle such that a user of the vehicle is able to see the information display unit from outside of the vehicle. The processor is configured to transmit to a terminal of the user blinking pattern information which causes at least part of a display screen of the terminal of the user to blink in the same pattern as the predetermined blinking pattern.

Abstract: [Object] It is an object of the present invention to provide a conjugate of a biotin-modified dimer and a phthalocyanine dye, which is used in photoimmunotherapy. [Means for Solution] A compound represented by the following formula (1) or a salt thereof: wherein X represents a substituent having a hydrophilic group, a cationic group or an amino group at the terminus thereof, or —OH, and other groups have the meanings as defined in the description.

Abstract: A vehicle control device includes one or more processors configured to: on a travel route of an autonomous driving taxi configured to travel toward a desired drop-off position of a user of the autonomous driving taxi, set a predetermined travel route range from a point behind the desired drop-off position to the desired drop-off position, as a permissible midway drop-off range in which midway drop-off from the autonomous driving taxi is permitted; receive a setting about a midway drop-off position in the permissible midway drop-off range, the setting being made by the user in the autonomous driving taxi configured to travel toward the desired drop-off position; and stop the autonomous driving taxi at the midway drop-off position set by the user such that the user drops off the autonomous driving taxi midway.

Abstract: An information processing device includes one or more processors configured to: set, as a travel destination of a vehicle, a point where an occupant of the vehicle gets out of the vehicle to transfer from the vehicle to a regularly operated transportation facility; acquire delay information indicating occurrence of a delay of the regularly operated transportation facility or occurrence of an event that causes a delay in travel of the vehicle to the travel destination; and change the travel destination of the vehicle based on the delay information.

Abstract: [Object] It is an object of the present invention to provide a conjugate of a biotin-modified dimer and a phthalocyanine dye, which is used in photoimmunotherapy. [Means for Solution] A compound represented by the following formula (1) or a salt thereof: wherein X represents a substituent having a hydrophilic group, a cationic group or an amino group at the terminus thereof, or —OH, and other groups have the meanings as defined in the description.

Abstract: An information processing device includes a movement route receiving unit, an operation-related information acquiring unit, and a display control unit. The movement route receiving unit configured to receive, from an outside, a movement route of a passenger of a vehicle that includes transfer from the vehicle to a scheduled transportation system. The operation-related information acquiring unit configured to acquire operation-related information of the scheduled transportation system to which the passenger is expected to transfer. The display control unit configured to display the operation-related information on a display screen disposed in a cabin of the vehicle.

Abstract: A tool stocker for holding a tool is equipped with a stocker-inclining member that inclines the tool stocker and also equipped with a mechanism that adjusts an attaching/detaching position at which an interchangeable tool is attached to and detached from a robot arm. The attaching/detaching position can be adjusted by using the tool stocker so as to fit moving paths of the robot arm appropriately.

Abstract: A tool stocker for holding a tool is equipped with a stocker-inclining member that inclines the tool stocker and also equipped with a mechanism that adjusts an attaching/detaching position at which an interchangeable tool is attached to and detached from a robot arm. The attaching/detaching position can be adjusted by using the tool stocker so as to fit moving paths of the robot arm appropriately.

Abstract: A polyurethane porous membrane is produced by a simple method to be used for at least one of applications of cell culture and cancer cell growth inhibition. The production method of the polyurethane porous membrane to be used for at least one of the applications of cell culture and cancer cell growth inhibition comprises: a first step of forming a layer of a polyurethane material which is uncured, on a substrate; and a second step of supplying water vapor to an exposed surface of the layer of the polyurethane material formed on the substrate, which is away from the substrate, so as to cure the polyurethane material and provide the layer of the polyurethane material with a porous structure having a plurality of irregularities on the exposed surface.

Abstract: A strain wave gear apparatus includes a rigid internal gear, a flexible external gear, and a wave generator. The wave generator includes an input shaft fixing member including eccentric cams, bearings respectively fixed to outer sides of the eccentric cams, and housings respectively fitted to outer peripheral surfaces of the bearings. The eccentric cams are arranged side by side in a direction of an inclined axis inclined with respect to an input rotation axis at an inclination angle (?) in a manner that respective center axes of the eccentric cams are parallel to the inclined axis and decentered in directions opposite to each other from the inclined axis. The housings are each formed into a tapered shape so that an outer peripheral surface of each of the housings is held in surface contact with an inner peripheral surface of the flexible external gear.

Abstract: A polyurethane porous membrane is produced by a simple method to be used for at least one of applications of cell culture and cancer cell growth inhibition. The production method of the polyurethane porous membrane to be used for at least one of the applications of cell culture and cancer cell growth inhibition comprises: a first step of forming a layer of a polyurethane material which is uncured, on a substrate; and a second step of supplying water vapor to an exposed surface of the layer of the polyurethane material formed on the substrate, which is away from the substrate, so as to cure the polyurethane material and provide the layer of the polyurethane material with a porous structure having a plurality of irregularities on the exposed surface.

Abstract: A building material and a method for coating a substrate for the building material with a coating film having a variety of functions relating to an environment such as mildew resistance, deodorization, antibacterial activity and air purification in addition to the anti-staining effect by having an excellent hydrophilicity. The method for coating the substrate for a building material comprises the steps of; coating a coating material comprising a hydrophilic polymer and a photocatalyst on the substrate, and drying the coating material to form a coating film containing the photocatalyst, wherein the hydrophilic polymer is at least one selected from the group consisting of methyl silicate, liquid glass, colloidal silica, poly(meth)acrylate, and polytetrafluoroethylene graft-polymerized with sulfonic acid, and the photocatalyst is at least one selected from the group consisting of titanium oxide coated with zeolite, titanium oxide coated silica and titanium oxide coated with apatite.

Abstract: In addition to a memory macro region and functional circuit regions on a substrate, a semiconductor integrated circuit device includes a dummy pattern region 40 arranged between the functional circuit regions and between the memory macro region 10 and the functional circuit regions and including a dummy pattern. The dummy pattern has a pattern identical to that of diffusion layers and gate electrodes of a memory cell pattern in a memory cell array region. An area ratio of dummy diffusion layer(s) and dummy gate electrode(s) in the dummy pattern region is equal to or greater than that of the diffusion layers and the gate electrode(s) in the memory cell array region.

Abstract: A strain wave gear apparatus includes a rigid internal gear, a flexible external gear, and a wave generator. The wave generator includes an input shaft fixing member including eccentric cams, bearings respectively fixed to outer sides of the eccentric cams, and housings respectively fitted to outer peripheral surfaces of the bearings. The eccentric cams are arranged side by side in a direction of an inclined axis inclined with respect to an input rotation axis at an inclination angle (?) in a manner that respective center axes of the eccentric cams are parallel to the inclined axis and decentered in directions opposite to each other from the inclined axis. The housings are each formed into a tapered shape so that an outer peripheral surface of each of the housings is held in surface contact with an inner peripheral surface of the flexible external gear.

Abstract: In addition to a memory macro region and functional circuit regions on a substrate, a semiconductor integrated circuit device includes a dummy pattern region 40 arranged between the functional circuit regions and between the memory macro region 10 and the functional circuit regions and including a dummy pattern. The dummy pattern has a pattern identical to that of diffusion layers and gate electrodes of a memory cell pattern in a memory cell array region. An area ratio of dummy diffusion layer(s) and dummy gate electrode(s) in the dummy pattern region is equal to or greater than that of the diffusion layers and the gate electrode(s) in the memory cell array region.

Abstract: A semiconductor device according to an embodiment of the present invention includes: a first region having patterns formed based on grid points as intersections of grid lines; and a second region including a plurality of layout cells an outer edge of which is defined by the grid points, the layout cells having patterns formed based on a wiring rule with patterns connected to patterns of the first region among the patterns being formed based on the grid points at a boundary with the first region.

Abstract: In a semiconductor device including multiple unit cells arranged in an array, transistors are affected by a stress from an STI at different degrees depending on the position in the array. As a result, a variation occurs in transistor characteristic. In a semiconductor device according to the present invention, each of predetermined transistors in outermost unit blocks in the array has a transistor size according to the stress from the STI.

Abstract: The present invention includes a memory cell area that includes a plurality of transistors, and a core area that is arranged adjacent to the memory cell area. The memory cell area and the core area include a semiconductor layer, and an n-type well region and a first p-type well region formed above the semiconductor layer. The memory cell area further includes a second p-type well region formed under the n-type well region and the first p-type well region in the semiconductor layer. The second p-type well region contacts to at least the first p-type well region.

Abstract: A manufacturing method of semiconductor device includes: forming a nitride film above a silicon substrate including a first region and a second region which respectively correspond to an outside of a memory cell region and the memory cell region; forming trenches reaching from the nitride film to the silicon substrate; retreating the nitride film such that widths of the trenches at the nitride film become wider; forming a buried oxide film to be buried in the trenches after the retreating; polishing the buried oxide film with the nitride film being used as a stopper; removing the nitride film after the polishing; implanting impurity after the removing; forming gate electrodes after the implanting; and implanting impurity after the forming the gate electrodes.

Abstract: A semiconductor integrated circuit includes a word line extending along a first direction, a first and a second N-well regions, a P-well region disposed between the first and the second N-well regions, a memory cell having a first, second, third, and fourth PMOS transistors, and a first and second NMOS transistors, the first and the second PMOS transistors disposed in the first N-well region along a second direction which is different from the first direction, the first and the second NMOS transistors disposed in the P-well region, and the third and the fourth PMOS transistors disposed in the second N-well region along the second direction.