Patents by Inventor Toshihiko Itoga
Toshihiko Itoga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 7323716Abstract: This invention provides a manufacturing method for fabricating on the same substrate both high voltage thin film transistors suitable for driving liquid crystal and low voltage drive high performance thin film transistors. In addition, this invention provides a thin film transistor substrate where the area occupied by a storage capacitor in each pixel is reduced to raise the aperture ratio of the display unit. One aspect of this invention provides a manufacturing method characterized in that the impurity regions of both high voltage thin film transistors and high performance thin film transistors which differ in the thickness of gate insulation are formed by implanting a dopant through the same two-layered film. Another aspect of this invention reduces the area occupied by the drive circuit in the display unit by utilizing an extension of one layer of the insulation film included in each thin film transistor.Type: GrantFiled: January 11, 2005Date of Patent: January 29, 2008Assignee: Hitachi, Ltd.Inventors: Takeshi Satou, Toshihiko Itoga, Takeo Shiba
-
Patent number: 7227186Abstract: An amorphous silicon film is laser irradiated a plural number of times to make the film composed of a plurality of crystal grains while suppressing the formation of protrusions at the boundaries of the adjoining grains to realize a polycrystalline silicon thin film transistor having at least partly therein the clusters of grains, or the aggregates of at least two crystal grains, with preferred orientation in the plane (111), and having high electron mobility of 200 cm2/Vs or above.Type: GrantFiled: May 4, 2005Date of Patent: June 5, 2007Assignee: Hitachi, Ltd.Inventors: Takuo Tamura, Kiyoshi Ogata, Yoichi Takahara, Kazuhiko Horikoshi, Hironaru Yamaguchi, Makoto Ohkura, Hironobu Abe, Masakazu Saitou, Yoshinobu Kimura, Toshihiko Itoga
-
Publication number: 20070117292Abstract: The present invention provides a display-device-use substrate which is strip-crystallized while minimizing the generation of peeling of a semiconductor by suppressing the generation of aggregation at the time of crystallization due to the radiation of continuous oscillation laser beams. A silicon nitride film and a silicon oxide film which constitutes a background film are formed on a glass substrate on which projecting portions are formed, and a silicon base film is formed on the silicon nitride film and a silicon oxide film. Banks which intersect the scanning directions of laser beams are positioned below the silicon base substrate. The aggregation which is generated by the scanning of laser beams is stopped at a portion after the laser beams gets over the bank and, thereafter, the strip crystal silicon film is formed normally.Type: ApplicationFiled: November 7, 2006Publication date: May 24, 2007Inventors: Yasukazu Kimura, Toshihiko Itoga, Takeshi Noda
-
Publication number: 20070108449Abstract: The present invention provides a fabrication method of a display device which aims at the reduction of fabricating man-hours.Type: ApplicationFiled: November 16, 2006Publication date: May 17, 2007Inventors: Eiji Oue, Toshihiko Itoga, Toshiki Kaneko, Daisuke Sonoda, Takeshi Kuriyagawa
-
Publication number: 20070108448Abstract: The present invention provides a display device which forms thin film transistor circuits differing in characteristics from each other on a substrate in mixture and a fabrication method of the display device. On a glass substrate having a background layer which is formed by stacking an SiN film and an SiO2 film, a precursor film which is constituted of an a-Si layer or a fine particle crystalline p-Si layer is formed and the implantation is applied to the precursor film. Here, an acceleration voltage and a dose quantity are adjusted such that a proper quantity of dopant is dosed in the inside of the precursor film. When the precursor film is melted by laser radiation, the dopant dosed in the precursor film is activated and taken into the precursor.Type: ApplicationFiled: November 1, 2006Publication date: May 17, 2007Inventors: Takuo Kaitoh, Takahiro Kamo, Toshihiko Itoga
-
Publication number: 20070072349Abstract: The present invention provides a manufacturing method of a display device which can decrease the lowering of a yield rate of the display device attributed to the aggregations generated by pseudo single crystallization of a silicon film. A manufacturing method of a display device includes a semiconductor film reforming step which reforms a semiconductor film into a second state in which the semiconductor film possesses elongated crystalline particles by radiating a laser beam to the semiconductor film in a first state, an aggregation detecting step which detects the aggregation of the semiconductor film which is generated in the semiconductor film reforming step, and a defect determination step which determines a product as a defective product when a position of the aggregation is present in the inside of the predetermined region and determines the product as a good product when the position of the aggregation is present outside the predetermined region.Type: ApplicationFiled: August 25, 2006Publication date: March 29, 2007Inventors: Takuo Kaitoh, Eiji Oue, Toshihiko Itoga
-
Publication number: 20070070283Abstract: The present invention provides an active matrix display device capable of raising its integration density by reducing the drive circuit area on the active matrix substrate. A semiconductor film presents in the boundary between a quasi-strip crystalline semiconductor film and another semiconductor film is used to form conductive lines, resistors, source/drain electrodes and the like which are respectively connected to thin film transistors formed using the quasi-strip crystalline semiconductor film.Type: ApplicationFiled: September 25, 2006Publication date: March 29, 2007Inventors: Masahiro Maki, Hideo Sato, Takayuki Nakao, Toshihiko Itoga
-
Patent number: 7180095Abstract: In a display device including thin film transistors formed on an insulation substrate, the thin film transistor includes a semiconductor layer, a gate electrode and a gate insulation film which is interposed between the semiconductor layer and the gate electrode. The gate insulation film includes at least one layer of deposition film which is deposited by a deposition method, and the carbon concentration of the gate insulation film which is formed without interposing other deposition film deposited by a deposition method between the one deposition film and the semiconductor layer has the distribution in which the carbon concentration is smaller at a side close to the semiconductor layer than at a side remote from the semiconductor layer.Type: GrantFiled: February 19, 2004Date of Patent: February 20, 2007Assignee: Hitachi Displays, Ltd.Inventors: Takahiro Kamo, Toshihiko Itoga, Takuo Kaitoh, Makoto Ohkura
-
Patent number: 7133086Abstract: An image display has gate-lines and signal-lines in a matrix shape, and has thin film transistors each having: an island-shaped semiconductor layer having source region, drain region, and channel region sandwiched between them; a first insulation film formed between the semiconductor layer and a gate electrode of the same layer as that of the gate-lines; an interlayer insulation film formed above the semiconductor layer; and a source electrode and a drain electrode existing in the same layer as that of the signal-lines. Each capacitor has: a storage electrode of the same layer as that of the gate-lines; an insulation film formed on the storage electrode and being in contact therewith; and an electrode formed on the insulation film and being in contact therewith and existing in the same layer as that of the signal-lines.Type: GrantFiled: January 17, 2002Date of Patent: November 7, 2006Assignee: Hitachi, Ltd.Inventors: Yoshiaki Toyota, Toshihiko Itoga, Hajime Akimoto
-
Publication number: 20060216877Abstract: An image display has gate-lines and signal-lines in a matrix shape, and has thin film transistors each having: an island-shaped semiconductor layer having source region, drain region, and channel region sandwiched between them; a first insulation film formed between the semiconductor layer and a gate electrode of the same layer as that of the gate-lines; an interlayer insulation film formed above the semiconductor layer; and a source electrode and a drain electrode existing in the same layer as that of the signal-lines. Each capacitor has: a storage electrode of the same layer as that of the gate-lines; an insulation film formed on the storage electrode and being in contact therewith; and an electrode formed on the insulation film and being in contact therewith and existing in the same layer as that of the signal-lines.Type: ApplicationFiled: June 1, 2006Publication date: September 28, 2006Inventors: Yoshiaki Toyota, Toshihiko Itoga, Hajime Akimoto
-
Publication number: 20060006391Abstract: To obtain a system-in-display with high performance and multifunction at low cost, high performance and reliability of a low temperature polysilicon thin film transistor is devised by terminating traps at a interface between a gate oxide film and a polycrystalline silicon film constituting a channel with fluorine. To maximize its effect, a material not governed by scattering due to potential barriers at grain boundaries, that is, a crystalline thin film approximately in a band shape having fewer grain boundaries that segmentalize the channel is used for the channel portion of the transistor. In this way, it is possible to realize the thin film transistor having both steep transfer characteristic and excellent resistance to hot carriers to unite high performance and reliability, construct various circuits that operate at low power and high speed on the same glass substrate as for pixel portions, and obtain the system-in-display having high performance and multifunction at low cost.Type: ApplicationFiled: July 1, 2005Publication date: January 12, 2006Inventors: Mieko Matsumura, Mutsuko Hatano, Toshihiko Itoga, Eiji Oue
-
Publication number: 20050266594Abstract: A manufacturing method for a display device includes: a first thin film transistor that is formed in a first region over a substrate and has a first threshold value according to doping of a first impurity into a semiconductor layer in a channel region; and a second thin film transistor that is formed in a second region over the substrate and has a second threshold value, which is different from the first threshold value, according to doping of a second impurity into a semiconductor layer in a channel region, wherein a crystallized semiconductor layer, which is used in the channel region of the second thin film transistor, is obtained by subjecting a semiconductor layer in the second region to fusing treatment in a state in which the second impurity is applied over the semiconductor layer.Type: ApplicationFiled: May 27, 2005Publication date: December 1, 2005Inventors: Takuo Kaitoh, Takahiro Kamo, Hidekazu Miyake, Toshihiko Itoga
-
Publication number: 20050211983Abstract: The invention provides a method of manufacture of a display device which can achieve a reduction of the manufacturing process. In the manufacturing method, a semiconductor layer is formed over an upper surface of a substrate. An insulation film is formed over an upper surface of the semiconductor layer. Using a mask which covers a first region and exposes a second region, an implantation of impurities into the semiconductor layer is performed in the second region through the insulation film. After the mask is removed, a surface of the insulation film is etched in the first region and the second region to an extent that the insulation film in the second region remains, whereby the film thickness of the insulation film in the second region is set to be smaller than the film thickness of the insulation film in the first region.Type: ApplicationFiled: March 11, 2005Publication date: September 29, 2005Inventors: Takuo Kaitoh, Eiji Oue, Takahiro Kamo, Yasukazu Kimura, Toshihiko Itoga
-
Publication number: 20050202612Abstract: An amorphous silicon film is laser irradiated a plural number of times to make the film composed of a plurality of crystal grains while suppressing the formation of protrusions at the boundaries of the adjoining grains to realize a polycrystalline silicon thin film transistor having at least partly therein the clusters of grains, or the aggregates of at least two crystal grains, with preferred orientation in the plane (111), and having high electron mobility of 200 cm2/Vs or above.Type: ApplicationFiled: May 4, 2005Publication date: September 15, 2005Applicant: Hitachi, Ltd.Inventors: Takuo Tamura, Kiyoshi Ogata, Yoichi Takahara, Kazuhiko Horikoshi, Hironaru Yamaguchi, Makoto Ohkura, Hironobu Abe, Masakazu Saitou, Yoshinobu Kimura, Toshihiko Itoga
-
Publication number: 20050121673Abstract: This invention provides a manufacturing method for fabricating on the same substrate both high voltage thin film transistors suitable for driving liquid crystal and low voltage drive high performance thin film transistors. In addition, this invention provides a thin film transistor substrate where the area occupied by a storage capacitor in each pixel is reduced to raise the aperture ratio of the display unit. One aspect of this invention provides a manufacturing method characterized in that the impurity regions of both high voltage thin film transistors and high performance thin film transistors which differ in the thickness of gate insulation are formed by implanting a dopant through the same two-layered film. Another aspect of this invention reduces the area occupied by the drive circuit in the display unit by utilizing an extension of one layer of the insulation film included in each thin film transistor.Type: ApplicationFiled: January 11, 2005Publication date: June 9, 2005Inventors: Takeshi Satou, Toshihiko Itoga, Takeo Shiba
-
Patent number: 6903371Abstract: An amorphous silicon film is laser irradiated a plural number of times to make the film composed of a plurality of crystal grains while suppressing the formation of protrusions at the boundaries of the adjoining grains to realize a polycrystalline silicon thin film transistor having at least partly therein the clusters of grains, or the aggregates of at least two crystal grains, with preferred orientation in the plane (111), and having high electron mobility of 200 cm2/Vs or above.Type: GrantFiled: February 6, 2004Date of Patent: June 7, 2005Assignee: Hitachi, Ltd.Inventors: Takuo Tamura, Kiyoshi Ogata, Yoichi Takahara, Kazuhiko Horikoshi, Hironaru Yamaguchi, Makoto Ohkura, Hironobu Abe, Masakazu Saitou, Yoshinobu Kimura, Toshihiko Itoga
-
Patent number: 6864134Abstract: This invention provides a manufacturing method for fabricating on the same substrate both high voltage thin film transistors suitable for driving liquid crystal and low voltage drive high performance thin film transistors. In addition, this invention provides a thin film transistor substrate where the area occupied by a storage capacitor in each pixel is reduced to raise the aperture ratio of the display unit. One aspect of this invention provides a manufacturing method characterized in that the impurity regions of both high voltage thin film transistors and high performance thin film transistors which differ in the thickness of gate insulation are formed by implanting a dopant through the same two-layered film. Another aspect of this invention reduces the area occupied by the drive circuit in the display unit by utilizing an extension of one layer of the insulation film included in each thin film transistor.Type: GrantFiled: April 29, 2003Date of Patent: March 8, 2005Assignee: Hitachi, Ltd.Inventors: Takeshi Satou, Toshihiko Itoga, Takeo Shiba
-
Patent number: 6815717Abstract: To a polycrystalline silicon layer crystallized by irradiation with laser light, a mixed gas comprised of ozone gas and H2O or N2O gas is fed at a processing temperature of 500° C. or below, or the polycrystalline silicon layer is previously treated with a solution such as ozone water or an aqueous NH3/hydrogen peroxide solution, followed by oxidation treatment with ozone, to form a silicon oxide layer with a thickness of 4 nm or more at the surface of the polycrystalline silicon layer for forming a thin-film transistor having characteristics that are less varying on a glass substrate previously not annealed.Type: GrantFiled: November 20, 2001Date of Patent: November 9, 2004Assignee: Hitachi, Ltd.Inventors: Kazuhiko Horikoshi, Kiyoshi Ogata, Miwako Nakahara, Takuo Tamura, Yasushi Nakano, Ryoji Oritsuki, Toshihiko Itoga, Takahiro Kamo
-
Publication number: 20040217354Abstract: In a display device including thin film transistors formed on an insulation substrate, the thin film transistor includes a semiconductor layer, a gate electrode and a gate insulation film which is interposed between the semiconductor layer and the gate electrode. The gate insulation film includes at least one layer of deposition film which is deposited by a deposition method, and the carbon concentration of the gate insulation film which is formed without interposing other deposition film deposited by a deposition method between the one deposition film and the semiconductor layer has the distribution in which the carbon concentration is smaller at a side close to the semiconductor layer than at a side remote from the semiconductor layer.Type: ApplicationFiled: February 19, 2004Publication date: November 4, 2004Inventors: Takahiro Kamo, Toshihiko Itoga, Takuo Kaitoh, Makoto Ohkura
-
Publication number: 20040155295Abstract: An amorphous silicon film is laser irradiated a plural number of times to make the film composed of a plurality of crystal grains while suppressing the formation of protrusions at the boundaries of the adjoining grains to realize a polycrystalline silicon thin film transistor having at least partly therein the clusters of grains, or the aggregates of at least two crystal grains, with preferred orientation in the plane (111), and having high electron mobility of 200 cm2/Vs or above.Type: ApplicationFiled: February 6, 2004Publication date: August 12, 2004Applicant: Hitachi, Ltd.Inventors: Takuo Tamura, Kiyoshi Ogata, Yoichi Takahara, Kazuhiko Horikoshi, Hironaru Yamaguchi, Makoto Ohkura, Hironobu Abe, Masakazu Saitou, Yoshinobu Kimura, Toshihiko Itoga