Patents by Inventor Toshihiko Kasai

Toshihiko Kasai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240135426
    Abstract: A method executed by a computer, including: executing multiple times a first process of outputting question information to a user and acquiring response information from the user; executing a second process at least once while executing the first process multiple times; executing a third process of estimating a vehicle use and customer value for the user and specifying one or more tire products to recommend to the user based on two or more pieces of the response information acquired; and outputting information indicating the vehicle use and the customer value estimated and information regarding the one or more tire products specified. The second process includes determining a comprehension level of the user regarding a tire product, based on one or more pieces of the response information acquired, and determining question information to be output next time and thereafter, according to the comprehension level determined.
    Type: Application
    Filed: November 4, 2021
    Publication date: April 25, 2024
    Applicant: BRIDGESTONE CORPORATION
    Inventors: Shouichi HASHIMOTO, Toshihiko SASABE, Tomomi KIKUMORI, Yosuke KASAI
  • Patent number: 8541996
    Abstract: A power control device for performing switching control for an output voltage of a power supply device includes a signal generation circuit for comparing a difference between a value of the output voltage and a value of a first reference voltage with a value of a second reference voltage, and for stopping the switching control when a value of the difference is less than or equal to the value of the second reference voltage, and an adjuster circuit for adjusting the second reference voltage based on a ratio between a value of an input voltage and the value of the output voltage.
    Type: Grant
    Filed: May 12, 2010
    Date of Patent: September 24, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Toshihiko Kasai, Hidenobu Ito
  • Patent number: 8476881
    Abstract: A power control device for performing switching control for an output voltage of a power supply device includes a signal generation circuit for comparing a difference between a value of the output voltage and a value of a first reference voltage with a value of a second reference voltage, and for stopping the switching control when a value of the difference is less than or equal to the value of the second reference voltage, and an adjuster circuit for adjusting the second reference voltage based on a ratio between a value of an input voltage and the value of the output voltage.
    Type: Grant
    Filed: May 12, 2010
    Date of Patent: July 2, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Toshihiko Kasai, Hidenobu Ito
  • Patent number: 8233257
    Abstract: A power supply circuit includes an output transistor including a source coupled to power supply voltage, and a drain from which output voltage is outputted; a first error amplifier powered by the power supply voltage and outputting a signal based on a potential difference between the output voltage and a reference voltage; a buffer transistor including a gate coupled to the output of the first error amplifier, and a source coupled via a constant current source to the power supply voltage and coupled to a gate of the output transistor; a current detection transistor coupled to the output transistor such that a gate and source are shared; and an overcurrent protection circuit configured to limit the drain current of the buffer transistor based on the increase of the drain current of the current detection transistor and thereby control the output current of the output transistor.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: July 31, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Morihito Hasegawa, Hidenobu Ito, Kwok Fai Hui, Toshihiko Kasai, Katsuyuki Yasukouchi
  • Patent number: 8203817
    Abstract: A power supply circuit includes an output transistor including a source coupled to power supply voltage, and a drain from which output voltage is outputted; a first error amplifier powered by the power supply voltage and outputting a signal based on a potential difference between the output voltage and a reference voltage; a buffer transistor including a gate coupled to the output of the first error amplifier, and a source coupled via a constant current source to the power supply voltage and coupled to a gate of the output transistor; a current detection transistor coupled to the output transistor such that a gate and source are shared; and an overcurrent protection circuit configured to limit the drain current of the buffer transistor based on the increase of the drain current of the current detection transistor and thereby control the output current of the output transistor.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: June 19, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Morihito Hasegawa, Hidenobu Ito, Kwok Fai Hui, Toshihiko Kasai, Katsuyuki Yasukouchi
  • Patent number: 7880537
    Abstract: An operational amplifier capable of offset cancel in a shorter period, as well as a line driver capable of shortening one horizontal period and a liquid crystal display device are provided. In the operational amplifier of the invention, a time necessary for feed back control can be shortened than usual by a constitution that an output voltage VO in one horizontal period H1 which is one horizontal period before is defined as a reference voltage in an offset cancel preparatory period HC2, thereby changing the output voltage VO(2) only by the offset voltage VO(2) by the feed back control. In the line driver of the invention, the operational amplifier not used for the output of display data D1 to D6 conducts offset cancel operation and it is successively shifted on every one horizontal period. Since it is no more necessary to incorporate the offset cancel preparatory period in the output period, one horizontal period can be shortened further.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: February 1, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Toshihiko Kasai, Shinya Udo, Masatoshi Kokubun, Yoshihiro Kizaki
  • Publication number: 20100289471
    Abstract: A power control device for performing switching control for an output voltage of a power supply device includes a signal generation circuit for comparing a difference between a value of the output voltage and a value of a first reference voltage with a value of a second reference voltage, and for stopping the switching control when a value of the difference is less than or equal to the value of the second reference voltage, and an adjuster circuit for adjusting the second reference voltage based on a ratio between a value of an input voltage and the value of the output voltage.
    Type: Application
    Filed: May 12, 2010
    Publication date: November 18, 2010
    Applicant: FUJITSU SEMICONDCTOR LIMITED
    Inventors: Toshihiko KASAI, Hidenobu Ito
  • Patent number: 7696738
    Abstract: A DC-DC converter reducing reversed current in a low load state and increasing output voltage response speed. An error amplification circuit generates an error signal from the output voltage. A pulse signal generation circuit generates a first pulse signal in accordance with the error signal. A comparison circuit generates a comparison result signal from the error signal. A drive signal generation circuit generates a constant level signal and a second pulse signal. An output circuit receives the first pulse signal and either the constant level signal or the second pulse signal to generate first and second drive signals for driving first and second transistors. The output circuit generates the second drive signal in accordance with the first pulse signal when receiving the constant level signal and generates the second drive signal with the first and second pulse signals when receiving the second pulse signal.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: April 13, 2010
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Toshihiko Kasai, Masatoshi Kokubun, Kenji Kato
  • Publication number: 20090201618
    Abstract: A power supply circuit includes an output transistor including a source coupled to power supply voltage, and a drain from which output voltage is outputted; a first error amplifier powered by the power supply voltage and outputting a signal based on a potential difference between the output voltage and a reference voltage; a buffer transistor including a gate coupled to the output of the first error amplifier, and a source coupled via a constant current source to the power supply voltage and coupled to a gate of the output transistor; a current detection transistor coupled to the output transistor such that a gate and source are shared; and an overcurrent protection circuit configured to limit the drain current of the buffer transistor based on the increase of the drain current of the current detection transistor and thereby control the output current of the output transistor.
    Type: Application
    Filed: February 12, 2009
    Publication date: August 13, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Morihito Hasegawa, Hidenobu Ito, Kwok Fai Hui, Toshihiko Kasai, Katsuyuki Yasukouchi
  • Patent number: 7443147
    Abstract: When both step-up PWM control and step-down PWM controls are executed, the offset of the ON/OFF switching timing for step-up PWM control and/or the offset of ON/OFF switching timing for step-down PWM control are changed to become identical. By synchronizing ON/OFF switching timing for step-up PWM control and ON/OFF switching timing for step-down PWM control, the loss on switching can be reduced.
    Type: Grant
    Filed: May 18, 2005
    Date of Patent: October 28, 2008
    Assignee: Fujitsu Limited
    Inventors: Toshihiko Kasai, Yoshihiro Kizaki, Hidenobu Ito
  • Publication number: 20080252369
    Abstract: An operational amplifier capable of offset cancel in a shorter period, as well as a line driver capable of shortening one horizontal period and a liquid crystal display device are provided. In the operational amplifier of the invention, a time necessary for feed back control can be shortened than usual by a constitution that an output voltage VO in one horizontal period H1 which is one horizontal period before is defined as a reference voltage in an offset cancel preparatory period HC2, thereby changing the output voltage VO(2) only by the offset voltage VO(2) by the feed back control. In the line driver of the invention, the operational amplifier not used for the output of display data D1 to D6 conducts offset cancel operation and it is successively shifted on every one horizontal period. Since it is no more necessary to incorporate the offset cancel preparatory period in the output period, one horizontal period can be shortened further.
    Type: Application
    Filed: December 19, 2007
    Publication date: October 16, 2008
    Inventors: Toshihiko Kasai, Shinya Udo, Masatoshi Kokubun, Yoshihiro Kizaki
  • Publication number: 20080067989
    Abstract: A DC-DC converter reducing reversed current in a low load state and increasing output voltage response speed. An error amplification circuit generates an error signal from the output voltage. A pulse signal generation circuit generates a first pulse signal in accordance with the error signal. A comparison circuit generates a comparison result signal from the error signal. A drive signal generation circuit generates a constant level signal and a second pulse signal. An output circuit receives the first pulse signal and either the constant level signal or the second pulse signal to generate first and second drive signals for driving first and second transistors. The output circuit generates the second drive signal in accordance with the first pulse signal when receiving the constant level signal and generates the second drive signal with the first and second pulse signals when receiving the second pulse signal.
    Type: Application
    Filed: September 14, 2007
    Publication date: March 20, 2008
    Inventors: Toshihiko Kasai, Masatoshi Kokubun, Kenji Kato
  • Patent number: 7336124
    Abstract: An operational amplifier capable of offset cancel in a shorter period, as well as a line driver capable of shortening one horizontal period and a liquid crystal display device are provided. In the operational amplifier of the invention, a time necessary for feed back control can be shortened than usual by a constitution that an output voltage VO in one horizontal period H1 which is one horizontal period before is defined as a reference voltage in an offset cancel preparatory period HC2, thereby changing the output voltage VO(2) only by the offset voltage VO(2) by the feed back control. In the line driver of the invention, the operational amplifier not used for the output of display data D1 to D6 conducts offset cancel operation and it is successively shifted on every one horizontal period. Since it is no more necessary to incorporate the offset cancel preparatory period in the output period, one horizontal period can be shortened further.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: February 26, 2008
    Assignee: Fujitsu Limited
    Inventors: Toshihiko Kasai, Shinya Udo, Masatoshi Kokubun, Yoshihiro Kizaki
  • Patent number: 7298117
    Abstract: The invention provides a DC-DC converter capable of being started up in a state in which an input voltage is low and capable of being structured without increasing a circuit size. A back-gate voltage (Vsb) is outputted from a back-gate voltage generating circuit (VBGN), and is inputted to a back gate of a transistor (FET1). During a period during which an output voltage (Vout) is lower than a reference voltage (e0), an oscillation signal (OS1) is inputted to a gate of the transistor (FET1), and the back-gate voltage (Vsb) is set at a grounded voltage. Therefore, the transistor (FET1) has a reference threshold voltage (Vto). On the other hand, during a period during which the output voltage (Vout) is higher than the reference voltage (e0), a pulse signal (PS) is inputted to the gate of the transistor (FET1), and the back-gate voltage (Vsb) is set at an output voltage of a charge pump portion (5). Therefore, the transistor (FET1) has a threshold voltage higher than the reference threshold voltage (Vto).
    Type: Grant
    Filed: February 27, 2006
    Date of Patent: November 20, 2007
    Assignee: Fujitsu Limited
    Inventors: Morihito Hasegawa, Hidekiyo Ozawa, Shoji Tajiri, Toshihiko Kasai
  • Publication number: 20070132435
    Abstract: The invention provides a DC-DC converter capable of being started up in a state in which an input voltage is low and capable of being structured without increasing a circuit size. A back-gate voltage (Vsb) is outputted from a back-gate voltage generating circuit (VBGN), and is inputted to a back gate of a transistor (FET1). During a period during which an output voltage (Vout) is lower than a reference voltage (e0), an oscillation signal (OS1) is inputted to a gate of the transistor (FET1), and the back-gate voltage (Vsb) is set at a grounded voltage. Therefore, the transistor (FET1) has a reference threshold voltage (Vto). On the other hand, during a period during which the output voltage (Vout) is higher than the reference voltage (e0), a pulse signal (PS) is inputted to the gate of the transistor (FET1), and the back-gate voltage (Vsb) is set at an output voltage of a charge pump portion (5). Therefore, the transistor (FET1) has a threshold voltage higher than the reference threshold voltage (Vto).
    Type: Application
    Filed: February 27, 2006
    Publication date: June 14, 2007
    Inventors: Morihito Hasegawa, Hidekiyo Ozawa, Shoji Tajiri, Toshihiko Kasai
  • Publication number: 20060226899
    Abstract: An operational amplifier capable of offset cancel in a shorter period, as well as a line driver capable of shortening one horizontal period and a liquid crystal display device are provided. In the operational amplifier of the invention, a time necessary for feed back control can be shortened than usual by a constitution that an output voltage VO in one horizontal period H1 which is one horizontal period before is defined as a reference voltage in an offset cancel preparatory period HC2, thereby changing the output voltage VO(2) only by the offset voltage VO(2) by the feed back control. In the line driver of the invention, the operational amplifier not used for the output of display data D1 to D6 conducts offset cancel operation and it is successively shifted on every one horizontal period. Since it is no more necessary to incorporate the offset cancel preparatory period in the output period, one horizontal period can be shortened further.
    Type: Application
    Filed: June 8, 2006
    Publication date: October 12, 2006
    Inventors: Toshihiko Kasai, Shinya Udo, Masatoshi Kokubun, Yoshihiro Kizaki
  • Publication number: 20060198170
    Abstract: When both of step-up PWM control and step-down PWM control are executed, offset of ON/OFF switching timing for step-up PWM control and/or offset of ON/OFF switching timing for step-down PWM control is changed so that the offset of ON/OFF switching timing for step-up PWM control and the offset of ON/OFF switching timing for step-down PWM control become identical. By synchronizing ON/OFF switching timing for step-up PWM control and ON/OFF switching timing for step-down PWM control, the loss on switching can be reduced.
    Type: Application
    Filed: May 18, 2005
    Publication date: September 7, 2006
    Inventors: Toshihiko Kasai, Yoshihiro Kizaki, Hidenobu Ito
  • Patent number: 7081792
    Abstract: An operational amplifier capable of offset cancel in a shorter period, as well as a line driver capable of shortening one horizontal period and a liquid crystal display device are provided. In the operational amplifier of the invention, a time necessary for feed back control can be shortened than usual by a constitution that an output voltage VO in one horizontal period H1 which is one horizontal period before is defined as a reference voltage in an offset cancel preparatory period HC2, thereby changing the output voltage VO(2) only by the offset voltage VO(2) by the feed back control. In the line driver of the invention, the operational amplifier not used for the output of display data D1 to D6 conducts offset cancel operation and it is successively shifted on every one horizontal period. Since it is no more necessary to incorporate the offset cancel preparatory period in the output period, one horizontal period can be shortened further.
    Type: Grant
    Filed: March 29, 2004
    Date of Patent: July 25, 2006
    Assignee: Fijitsu Limited
    Inventors: Toshihiko Kasai, Shinya Udo, Masatoshi Kokubun, Yoshihiro Kizaki
  • Patent number: 7025702
    Abstract: A differential capable of satisfying a demand for an improvement in performance and a reduction in cost in which the pinion shaft 19 is movably disposed in the differential case 2, and sliding bearings 16, 41, 42 are disposed between mutually opposite surfaces of the pair of side gears 13 and the differential case 2 and between mutually opposite surfaces of the pinions 12 and the differential case 2, respectively.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: April 11, 2006
    Assignee: Yanagawa Seiki Co., Ltd.
    Inventors: Masahiro Saito, Kunihiro Osawa, Toshihiko Kasai
  • Publication number: 20050282677
    Abstract: A differential capable of satisfying a demand for an improvement in performance and a reduction in cost in which the pinion shaft 19 is movably disposed in the differential case 2, and sliding bearings 16, 41, 42 are disposed between mutually opposite surfaces of the pair of side gears 13 and the differential case 2 and between mutually opposite surfaces of the pinions 12 and the differential case 2, respectively.
    Type: Application
    Filed: August 29, 2005
    Publication date: December 22, 2005
    Inventors: Masahiro Saito, Kunihiro Osawa, Toshihiko Kasai