Patents by Inventor Toshiji Hamatani

Toshiji Hamatani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Active matrix display and electrooptical device
    Patent number: 6885027
    Abstract: A structure for reducing the OFF current of an active matrix display. In the active matrix display, plural TFTs are connected in series with each one pixel electrode. Of these TFTs connected in series, at least one TFT excluding the TFTs located at opposite ends is maintained in conduction. Alternatively, at least one capacitor is connected between the junction of the drain and source of each TFT connected in series and an AC grounded point. Thus, the amount of electric charge released from auxiliary capacitors during cutoff of the TFTs is reduced.
    Type: Grant
    Filed: October 10, 2002
    Date of Patent: April 26, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuhiko Takemura, Toshiji Hamatani, Toshimitsu Konuma, Jun Koyama, Yuji Kawasaki, Shunpei Yamazaki
  • Semiconductor device and its manufacturing method
    Publication number: 20050056843
    Abstract: Nickel is selectively held in contact with a particular region of an amorphous silicon film. Crystal growth parallel with a substrate is effected by performing a heat treatment. A thermal oxidation film is formed by performing a heat treatment in an oxidizing atmosphere containing a halogen element. During this step, the crystallinity is improved and the gettering of nickel elements proceeds. A thin-film transistor is formed so that the direction connecting source and drain regions coincides with the above crystal growth direction. As a result, a TFT having superior characteristics such as a mobility larger than 200 cm2/Vs and an S value smaller than 100 mV/dec. can be obtained.
    Type: Application
    Filed: June 1, 2004
    Publication date: March 17, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Teramoto, Jun Koyama, Yasushi Ogata, Masahiko Hayakawa, Mitsuaki Osame, Hisashi Ohtani, Toshiji Hamatani
  • Semiconductor device and method of manufacturing the same
    Patent number: 6867077
    Abstract: A barrier layer that meets three requirements, “withstand well against etching and protect a semiconductor film from an etchant as an etching stopper”, “allow impurities to move in itself during heat treatment for gettering”, and “have excellent reproducibility”, is formed and used to getter impurities contained in a semiconductor film. The barrier layer is a silicon oxide film and the ratio of a sub-oxide contained in the barrier layer is 18% or higher.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: March 15, 2005
    Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki Kaisha
    Inventors: Misako Nakazawa, Mitsuhiro Ichijo, Toshiji Hamatani, Hideto Ohnuma, Naoki Makita
  • Light emitting device, method of manufacturing the same and manufacturing apparatus therefor
    Publication number: 20050045917
    Abstract: A light emitting device having high definition, a high aperture ratio, and high reliability is provided. The present invention achieves high definition and a high aperture ratio with a full color flat panel display using red, green, and blue color emission light by intentionally forming laminate portions, wherein portions of different organic compound layers of adjacent light emitting elements overlap with each other, without depending upon the method of forming the organic compound layers or the film formation precision.
    Type: Application
    Filed: October 12, 2004
    Publication date: March 3, 2005
    Inventors: Shunpei Yamazaki, Toshiji Hamatani, Toru Takayama
  • Substrate of semiconductor device and fabrication method thereof as well as semiconductor device and fabrication method thereof
    Publication number: 20050032339
    Abstract: There are provided a substrate of a semiconductor device and a fabrication method thereof which allow to suppress impurity from turning around from a glass or quartz substrate in fabrication steps of a TFT. An insulating film is deposited so as to surround the glass substrate by means of reduced pressure thermal CVD. It allows to suppress the impurity from infiltrating from the glass substrate to an active region of the TFT in the later process.
    Type: Application
    Filed: September 8, 2004
    Publication date: February 10, 2005
    Inventors: Setsuo Nakajima, Shunpei Yamazaki, Hisashi Ohtani, Satoshi Teramoto, Toshiji Hamatani
  • Semiconductor device and manufacturing method thereof
    Publication number: 20040232459
    Abstract: (OBJECT) The object is to provide a lightened semiconductor device and a manufacturing method thereof by pasting a layer to be peeled to various base materials. (MEANS FOR SOLVING THE PROBLEM) In the present invention, a layer to be peeled is formed on a substrate, then a seal substrate provided with an etching stopper film is pasted with a binding material on the layer to be peeled, followed by removing only the seal substrate by etching or polishing. The remaining etching stopper film is functioned as a blocking film. In addition, a magnet sheet may be pasted as a pasting member.
    Type: Application
    Filed: October 31, 2003
    Publication date: November 25, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Junya Maruyama, Yumiko Ohno, Masakazu Murakami, Toshiji Hamatani, Hideaki Kuwabara, Shunpei Yamazaki
  • Semiconductor device and method for forming the same
    Patent number: 6822261
    Abstract: An insulated gate field effect semiconductor device comprising a substrate having provided thereon a thin-film structured insulated gate field effect semiconductor device, said device being characterized by that it comprises a metal gate electrode and at least the side thereof is coated with an oxide of the metal. The insulated gate field effect semiconductor device according to the present invention is also characterized by that the contact holes for the extracting contacts of the source and drain regions are provided at about the same position of the end face of the anodically oxidized film established at the side of the gate. Furthermore, the present invention provides a method for forming insulated gate field effect semiconductor devices using less masks.
    Type: Grant
    Filed: October 18, 2001
    Date of Patent: November 23, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akira Mase, Toshiji Hamatani
  • Light emitting device, method of manufacturing the same, and manufacturing apparatus therefor
    Patent number: 6815723
    Abstract: A light emitting device having high definition, a high aperture ratio, and high reliability is provided. The present invention achieves high definition and a high aperture ratio with a full color flat panel display using red, green, and blue color emission light by intentionally forming laminate portions, wherein portions of different organic compound layers of adjacent light emitting elements overlap with each other, without depending upon the method of forming the organic compound layers or the film formation precision.
    Type: Grant
    Filed: December 12, 2002
    Date of Patent: November 9, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toshiji Hamatani, Toru Takayama
  • Crystalline semiconductor film, method of manufacturing the same, and semiconductor device
    Publication number: 20040192014
    Abstract: A spin addition method for catalyst elements is simple and very important technique, because the minimum amount of a catalyst element necessary for crystallization can be easily added by controlling the catalyst element concentration within a catalyst element solution, but there is a problem in that uniformity in the amount of added catalyst element within a substrate is poor. The non-uniformity in the amount of added catalyst element within the substrate is thought to influence fluctuation in crystallinity of a crystalline semiconductor film that has undergone thermal crystallization, and exert a bad influence on the electrical characteristics of TFTs finally structured by the crystalline semiconductor film. The present invention solves this problem with the aforementioned conventional technique.
    Type: Application
    Filed: April 13, 2004
    Publication date: September 30, 2004
    Applicants: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki Kaisha
    Inventors: Misako Nakazawa, Toshiji Hamatani, Naoki Makita
  • Substrate of semiconductor device and fabrication method thereof as well as semiconductor device and fabrication method thereof
    Patent number: 6794681
    Abstract: There are provided a substrate of a semiconductor device and a fabrication method thereof which allow to suppress impurity from turning around from a glass or quartz substrate in fabrication steps of a TFT. An insulating film is deposited so as to surround the glass substrate by means of reduced pressure thermal CVD. It allows to suppress the impurity from infiltrating from the glass substrate to an active region of the TFT in the later process.
    Type: Grant
    Filed: September 14, 2001
    Date of Patent: September 21, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Setsuo Nakajima, Shunpei Yamazaki, Hisashi Ohtani, Satoshi Teramoto, Toshiji Hamatani
  • Semiconductor device and manufacturing method therefor
    Patent number: 6784037
    Abstract: An active layer of an NTFT includes a channel forming region, at least a first impurity region, at least a second impurity region and at least a third impurity region therein. Concentrations of an impurity in each of the first, second and third impurity regions increase as distances from the channel forming region become longer. The first impurity region is formed to be overlapped with a side wall. A gate overlapping structure can be realized with the side wall functioning as an electrode.
    Type: Grant
    Filed: August 9, 2001
    Date of Patent: August 31, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hisashi Ohtani, Toshiji Hamatani
  • Laser processing method
    Patent number: 6753213
    Abstract: A laser processing apparatus provides a heating chamber, a chamber for laser light irradiation and a robot arm, wherein a temperature of a substrate on which a silicon film to be irradiated with laser light is formed is heated to 450 to 750° C. in the heating chamber followed by irradiating the silicon film with laser light so that a silicon film having a single crystal or a silicon film that can be regarded as the single crystal can be obtained.
    Type: Grant
    Filed: November 6, 2002
    Date of Patent: June 22, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Teramoto, Hisashi Ohtani, Akiharu Miyanaga, Toshiji Hamatani, Shunpei Yamazaki
  • Semiconductor device and method of fabricating same
    Publication number: 20040108503
    Abstract: There is disclosed a method of fabricating a thin-film transistor having excellent characteristics. Nickel element is held in contact with selected regions of an amorphous silicon film. Then, thermal processing is performed to crystallize the amorphous film. Subsequently, thermal processing is carried out in an oxidizing ambient containing a halogen element to form a thermal oxide film. At this time, the crystallinity is improved. Also, gettering of the nickel element proceeds. This crystalline silicon film consists of crystals grown radially from a number of points. Consequently, the thin-film transistor having excellent characteristics can be obtained.
    Type: Application
    Filed: November 14, 2003
    Publication date: June 10, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Teramoto, Jun Koyama, Yasushi Ogata, Masahiko Hayakawa, Mitsuaki Osame, Hisashi Ohtani, Toshiji Hamatani
  • Semiconductor device and its manufacturing method
    Patent number: 6744069
    Abstract: Nickel is selectively held in contact with a particular region of an amorphous silicon film. Crystal growth parallel with a substrate is effected by performing a heat treatment. A thermal oxidation film is formed by performing a heat treatment in an oxidizing atmosphere containing a halogen element. During this step, the crystallinity is improved and the gettering of nickel elements proceeds. A thin-film transistor is formed so that the direction connecting source and drain regions coincides with the above crystal growth direction. As a result, a TFT having superior characteristics such as a mobility larger than 200 cm2/Vs and an S value smaller than 100 mV/dec. can be obtained.
    Type: Grant
    Filed: January 17, 1997
    Date of Patent: June 1, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Teramoto, Jun Koyama, Yasushi Ogata, Masahiko Hayakawa, Mitsuaki Osame, Hisashi Ohtani, Toshiji Hamatani
  • Apparatus and method for doping
    Patent number: 6734446
    Abstract: There is proposed an apparatus for doping a material to be doped by generating plasma (ions) and accelerating it by a high voltage to form an ion current is proposed, which is particularly suitable for processing a substrate having a large area. The ion current is formed to have a linear sectional configuration, and doping is performed by moving a material to be doped in a direction substantially perpendicular to the longitudinal direction of a section of the ion current.
    Type: Grant
    Filed: October 25, 2000
    Date of Patent: May 11, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toshiji Hamatani, Koichiro Tanaka
  • Method of manufacturing a crystalline semiconductor film
    Patent number: 6734050
    Abstract: A spin addition method for catalyst elements is simple and very important technique, because the minimum amount of a catalyst element necessary for crystallization can be easily added by controlling the catalyst element concentration within a catalyst element solution, but there is a problem in that uniformity in the amount of added catalyst element within a substrate is poor. The non-uniformity in the amount of added catalyst element within the substrate is thought to influence fluctuation in crystallinity of a crystalline semiconductor film that has undergone thermal crystallization, and exert a bad influence on the electrical characteristics of TFTs finally structured by the crystalline semiconductor film. The present invention solves this problem with the aforementioned conventional technique.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: May 11, 2004
    Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki Kaisha
    Inventors: Misako Nakazawa, Toshiji Hamatani, Naoki Makita
  • Semiconductor device and manufacturing method therefor
    Publication number: 20030207502
    Abstract: An active layer of an NTFT includes a channel forming region, at least a first impurity region, at least a second impurity region and at least a third impurity region therein. Concentrations of an impurity in each of the first, second and third impurity regions increase as distances from the channel forming region become longer. The first impurity region is formed to be overlapped with a side wall. A gate overlapping structure can be realized with the side wall functioning as an electrode.
    Type: Application
    Filed: August 9, 2001
    Publication date: November 6, 2003
    Inventors: Shunpei Yamazaki, Hisashi Ohtani, Toshiji Hamatani
  • Semiconductor device and method of manufacturing the same
    Publication number: 20030193052
    Abstract: A barrier layer that meets three requirements, “withstand well against etching and protect a semiconductor film from an etchant as an etching stopper”, “allow impurities to move in itself during heat treatment for gettering”, and “have excellent reproducibility”, is formed and used to getter impurities contained in a semiconductor film. The barrier layer is a silicon oxide film and the ratio of a sub-oxide contained in the barrier layer is 18% or higher.
    Type: Application
    Filed: March 28, 2003
    Publication date: October 16, 2003
    Applicant: Semiconductor Energy Laboratory Co. Ltd.
    Inventors: Misako Nakazawa, Mitsuhiro Ichijo, Toshiji Hamatani, Hideto Ohnuma, Naoki Makita
  • Semiconductor device and manufacturing method therefor
    Publication number: 20030155573
    Abstract: An active layer of an NTFT includes a channel forming region, at least a first impurity region, at least a second impurity region and at least a third impurity region therein. Concentrations of an impurity in each of the first, second and third impurity regions increase as distances from the channel forming region become longer. The first impurity region is formed to be overlapped with a side wall. A gate overlapping structure can be realized with the side wall functioning as an electrode.
    Type: Application
    Filed: January 8, 2003
    Publication date: August 21, 2003
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hisashi Ohtani, Toshiji Hamatani
  • Light emitting device, method of manufacturing the same, and manufacturing apparatus therefor
    Publication number: 20030122140
    Abstract: A light emitting device having high definition, a high aperture ratio, and high reliability is provided. The present invention achieves high definition and a high aperture ratio with a full color flat panel display using red, green, and blue color emission light by intentionally forming laminate portions, wherein portions of different organic compound layers of adjacent light emitting elements overlap with each other, without depending upon the method of forming the organic compound layers or the film formation precision.
    Type: Application
    Filed: December 12, 2002
    Publication date: July 3, 2003
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toshiji Hamatani, Toru Takayama