Patents by Inventor Toshikazu Suzuki

Toshikazu Suzuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090073745
    Abstract: During a write cycle, a selected write-word-line driver drives the corresponding write word line such that the potential of the corresponding write word line is lower in a first period as a predetermined period after an initiation of the write cycle than in a second period as a predetermined period after the first period, and sense amplifiers amplify the potentials of the corresponding write bit lines in the first period.
    Type: Application
    Filed: July 21, 2008
    Publication date: March 19, 2009
    Inventor: Toshikazu Suzuki
  • Patent number: 7500171
    Abstract: A memory circuit includes a data storage section for storing a plurality of data sets and a plurality of redundant data sets, which are used for error correction for the data sets; and an error correction section for performing at least error detection for the data sets in the data storage section by using the redundant data sets when the memory circuit is not accessed from outside for data input or output, and outputting at least result of the error detection as an error detection signal. When the memory circuit is accessed so as to output a designated one of the stored data sets, the designated data set is outputted without being subjected to the error detection by the error correction section.
    Type: Grant
    Filed: January 26, 2006
    Date of Patent: March 3, 2009
    Assignee: Panasonic Corporation
    Inventor: Toshikazu Suzuki
  • Publication number: 20090055094
    Abstract: The present invention makes the user easily search the nearest point which is useful for the user without making the user perform a complicated operation. The present invention provides a navigation device that obtains a current position based on information from GPS satellites, and guides a travel path from the current position to the destination on a map image which includes a display unit that displays the map image, a search unit that searches a nearest point existing around a vehicle position on the map image, a search subject range determination unit that, when a search subject area setting frame in searching the nearest point is specified by a user, determines the search subject area setting frame as a search subject range in searching by the search unit.
    Type: Application
    Filed: May 22, 2008
    Publication date: February 26, 2009
    Applicant: Sony Corporation
    Inventor: Toshikazu SUZUKI
  • Patent number: 7495948
    Abstract: In a semiconductor memory including word lines and bit lines arranged in a matrix and a plurality of memory cells provided at intersections of the word lines and the bit lines, a bit line precharge circuit is provided for controlling the potential of a low-data holding power supply coupled to memory cells provided on a corresponding one of the bit lines. In a write operation, the bit line precharge circuit controls the potential of a low-data holding power supply of a memory cell corresponding to a selected bit line to be higher than the potential of a low-data holding power supply of a memory cell corresponding to an unselected bit line.
    Type: Grant
    Filed: December 13, 2006
    Date of Patent: February 24, 2009
    Assignee: Panasonic Corporation
    Inventors: Toshikazu Suzuki, Yoshinobu Yamagami, Satoshi Ishikura
  • Patent number: 7489581
    Abstract: A semiconductor memory includes a plurality of memory cells, each of which includes a first inverter connected to one of high-data retaining supply lines which constitute one of high-data retaining supply line pairs corresponding to the memory cell and a second inverter connected to the other one of the high-data retaining supply lines which constitute the corresponding high-data retaining supply line pair, an input and output of the second inverter being connected to an output and input of the first inverter, respectively. A selected high-data retaining supply circuit receives a signal determined according to an input data signal and address signal without the intervention of any of the bit lines which constitute the bit line pairs to drive the connected high-data retaining supply lines such that it has a potential corresponding to the received signal.
    Type: Grant
    Filed: August 9, 2007
    Date of Patent: February 10, 2009
    Assignee: Panasonic Corporation
    Inventors: Toshikazu Suzuki, Satoshi Ishikura
  • Patent number: 7434408
    Abstract: A stationary point is set on a cold end of a cryocooler. An article is mounted on the stationary point to be cooled via the stationary point. In this case, the article can be cooled up to an extremely low temperature with isolation of vibration to the article.
    Type: Grant
    Filed: July 14, 2004
    Date of Patent: October 14, 2008
    Assignee: High Energy Accelerator Research Organization
    Inventors: Toshikazu Suzuki, Takakazu Shintomi, Takayuki Tomaru, Tomiyoshi Haruyama
  • Publication number: 20080151604
    Abstract: In a semiconductor memory device including memory cells each having two inverters connected in a cross-coupled configuration to hold High data and Low data as a pair and two access transistors, a plurality of word lines, and a plurality of bit lines, the potential of the selected one of the plurality of word lines is controlled to be lower than a potential obtained by adding up the potential of one of Low-data-holding power sources each for holding the Low data at any time other than during a read operation and the threshold voltage of each of the access transistors.
    Type: Application
    Filed: December 18, 2007
    Publication date: June 26, 2008
    Inventor: Toshikazu SUZUKI
  • Publication number: 20080037337
    Abstract: A semiconductor memory includes a plurality of memory cells, each of which includes a first inverter connected to one of high-data retaining supply lines which constitute one of high-data retaining supply line pairs corresponding to the memory cell and a second inverter connected to the other one of the high-data retaining supply lines which constitute the corresponding high-data retaining supply line pair, an input and output of the second inverter being connected to an output and input of the first inverter, respectively. A selected high-data retaining supply circuit receives a signal determined according to an input data signal and address signal without the intervention of any of the bit lines which constitute the bit line pairs to drive the connected high-data retaining supply lines such that it has a potential corresponding to the received signal.
    Type: Application
    Filed: August 9, 2007
    Publication date: February 14, 2008
    Inventors: Toshikazu Suzuki, Satoshi Ishikura
  • Patent number: 7308797
    Abstract: A cryogenic refrigerator includes a first refrigerant tube and a second refrigerant tube each comprising two tubes that are arranged on a cooling stage substantially parallel to each other and communicate with each other through a gas passage formed in the cooling stage. Phase differences are provided to oscillating gas pressures in the first and second refrigerant tubes, to cancel vibration of the cooling stage. Thus, the cryogenic refrigerator can be provided which can effectively reduce the vibration of the cooling stage caused by the oscillating gas pressure and can reduce the size thereof.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: December 18, 2007
    Assignees: Sumitomo Heavy Industries, Ltd., High Energy Accelerator Research Organization
    Inventors: Rui Li, Tomohiro Koyama, Toshikazu Suzuki, Takayuki Tomaru, Takakazu Shintomi, Tomiyoshi Haruyama
  • Patent number: 7294391
    Abstract: A fiber sheet composed of knitted, woven, or non-woven fiber, which is resistant against contamination, and such contamination is easily washed off, and is durable, and suitable for use as materials to make curtains, tapestries, screens, flags, wallpaper, and sliding screen door (fusuma), for both indoor and outdoor environments. The fiber sheet is coated on its both sides of the fiber by ceramics composed of oxidized, nitrogenous, or carbonized forms of metals such as tin, titanium, aluminum, and other metals, forming a thin contamination resistant coating. Typically, the contamination resistant coating comprises SiO2 or SnO2 or a combination/mixture of the two substances, and such coating is hard and is superior in protection against contamination.
    Type: Grant
    Filed: January 9, 2003
    Date of Patent: November 13, 2007
    Assignee: Kabushiki Kaisha Suzutora
    Inventors: Masayuki Suzuki, Toshikazu Suzuki, Katsuhide Manabe, Eigo Nakajima
  • Patent number: 7244973
    Abstract: A method for making a filed-effect semiconductor device includes the steps of forming a gate electrode on a semiconductor layer composed of a gallium nitride-based compound semiconductor represented by the formula AlxInyGa1?x?yN, wherein x+y=1, 0?x?1, and 0?y?1; and forming a source electrode and a drain electrode by self-alignment using the gate electrode as a mask. A field-effect semiconductor device fabricated by the method is also disclosed.
    Type: Grant
    Filed: January 21, 2005
    Date of Patent: July 17, 2007
    Assignee: Sony Corporation
    Inventors: Satoshi Taniguchi, Toshikazu Suzuki, Hideki Ono, Jun Araseki
  • Publication number: 20070139997
    Abstract: In a semiconductor memory including word lines and bit lines arranged in a matrix and a plurality of memory cells provided at intersections of the word lines and the bit lines, a bit line precharge circuit is provided for controlling the potential of a low-data holding power supply coupled to memory cells provided on a corresponding one of the bit lines. In a write operation, the bit line precharge circuit controls the potential of a low-data holding power supply of a memory cell corresponding to a selected bit line to be higher than the potential of a low-data holding power supply of a memory cell corresponding to an unselected bit line.
    Type: Application
    Filed: December 13, 2006
    Publication date: June 21, 2007
    Inventors: Toshikazu Suzuki, Yoshinobu Yamagami, Satoshi Ishikura
  • Patent number: 7220966
    Abstract: A system for detecting defects in paint coatings includes a temperature manipulation apparatus configured to change the temperature of a surface and a coating applied to the surface. The system may further include an infrared sensor for measuring the change in temperature (over time) of the surface and coating and a processor to compare the measured change in temperature of the surface and coating to an expected change of temperature (over time) in order to determine anomalies in the coatings. A self-referencing method of determining defects is also disclosed, wherein surrounding pixels are utilized as a reference in the detection process for calculating the change in temperature of each pixel. In addition, application of the inventive aspects to inspection of adhesion interfaces is also disclosed.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: May 22, 2007
    Assignee: Toyota Motor Manufacturing North America, Inc.
    Inventors: Kozo Saito, Mohammed I. Hassan Ali, Akira Numasato, Mohammed A. Omar, Masahito Sakakibara, Toshikazu Suzuki, Yasuo Tanigawa
  • Publication number: 20070051891
    Abstract: A system for detecting defects in paint coatings includes a temperature manipulation apparatus configured to change the temperature of a surface and a coating applied to the surface. The system may further include an infrared sensor for measuring the change in temperature of the surface and coating and a processor to compare the measured change in temperature of the surface and coating to an expected change of temperature in order to determine anomalies in the coatings.
    Type: Application
    Filed: October 30, 2006
    Publication date: March 8, 2007
    Inventors: Kozo Saito, Mohammed Hassan Ali, Akira Numasato, Mohammed Omar, Masahito Sakakibara, Toshikazu Suzuki, Yasuo Tanigawa
  • Patent number: 7160766
    Abstract: A method for making a filed-effect semiconductor device includes the steps of forming a gate electrode on a semiconductor layer composed of a gallium nitride-based compound semiconductor represented by the formula AlxInyGa1?x?yN, wherein x+y=1, 0?x?1, and 0?y?1; and forming a source electrode and a drain electrode by self-alignment using the gate electrode as a mask. A field-effect semiconductor device fabricated by the method is also disclosed.
    Type: Grant
    Filed: February 6, 2004
    Date of Patent: January 9, 2007
    Assignee: Sony Corporation
    Inventors: Satoshi Taniguchi, Toshikazu Suzuki, Hideki Ono, Jun Araseki
  • Patent number: 7129492
    Abstract: A system for detecting defects in paint coatings includes a temperature manipulation apparatus configured to change the temperature of a surface and a coating applied to the surface. The system may further include an infrared sensor for measuring the change in temperature of the surface and coating and a processor to compare the measured change in temperature of the surface and coating to an expected change of temperature in order to determine anomalies in the coatings.
    Type: Grant
    Filed: July 29, 2003
    Date of Patent: October 31, 2006
    Assignees: Toyota Motor Manufacturing North America, Inc., University of Kentucky Research Foundation
    Inventors: Kozo Saito, Mohammed I. Hassan Ali, Akira Numasato, Mohammed A. Omar, Masahito Sakakibara, Toshikazu Suzuki, Yasuo Tanigawa
  • Publication number: 20060192835
    Abstract: An optical printer head that can, at a low cost, prevent the dimming of light at a lens, and an image forming apparatus that uses such an optical printer head are provided. A lens controls light, emitted by LEDs, that is used to irradiate a photosensitive drum. And since the lens is coated with a layer of resin, the resin prevents the occurrence of a chemical reaction between nitric acid, generated as a consequence of the production of ozone, and an alkali component on the surface of the lens, and prevents the dimming of light at the lens.
    Type: Application
    Filed: February 27, 2006
    Publication date: August 31, 2006
    Inventors: Kazuya Utsugi, Toshikazu Suzuki
  • Publication number: 20060184856
    Abstract: A memory circuit includes a data storage section for storing a plurality of data sets and a plurality of redundant data sets, which are used for error correction for the data sets; and an error correction section for performing at least error detection for the data sets in the data storage section by using the redundant data sets when the memory circuit is not accessed from outside for data input or output, and outputting at least result of the error detection as an error detection signal. When the memory circuit is accessed so as to output a designated one of the stored data sets, the designated data set is outputted without being subjected to the error detection by the error correction section.
    Type: Application
    Filed: January 26, 2006
    Publication date: August 17, 2006
    Inventor: Toshikazu Suzuki
  • Publication number: 20060084335
    Abstract: A fiber sheet composed of knitted, woven, or non-woven fiber, which is resistant against contamination, and such contamination is easily washed off, and is durable, and suitable for use as materials to make curtains, tapestries, screens, flags, wallpaper, and sliding screen door(fusuma), for both indoor and outdoor environments. The fiber sheet is coated on its both sides of the fiber by ceramics composed of oxidized, nitrogenous, or carbonized forms of metals such as tin, titanium, aluminum, and other metals, forming a thin contamination resistant coating.
    Type: Application
    Filed: November 22, 2005
    Publication date: April 20, 2006
    Inventors: Masayuki Suzuki, Toshikazu Suzuki, Katsuhide Manabe, Eigo Nakajima
  • Patent number: 6982914
    Abstract: A semiconductor memory device includes a replica circuit including a plurality of replica cells (RMC) having the same elements as those of memory cells in a memory array and outputting signals with levels in the stage number to a common replica bit line, and a sense amplifier control circuit for receiving a signal of the replica bit line to control a timing of a signal SAE for starting a sense amplifier circuit. The replica circuit includes a switching circuit (SW) for switching the stage number of the replica cells to be activated among the plurality of replica cells in a programmable manner.
    Type: Grant
    Filed: January 8, 2004
    Date of Patent: January 3, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hirohisa Ohtsuki, Toshikazu Suzuki