Patents by Inventor Toshinobu Sugiyama

Toshinobu Sugiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090303553
    Abstract: An image-capturing apparatus includes a pixel array including pixels. Each of the pixels includes a transducer for generating signal charge according to the intensity of an incident light beam. The image-capturing apparatus further includes an output circuit for outputting a pixel signal outside the pixel array at a frame rate depending on the pixel position in the pixel array, based on the signal charge; and an output-controlling unit for controlling the operation of the output circuit.
    Type: Application
    Filed: August 14, 2009
    Publication date: December 10, 2009
    Applicant: Sony Corporation
    Inventor: Toshinobu Sugiyama
  • Patent number: 7579576
    Abstract: An arithmetic circuit, which is retained by each pixel in a conventional image sensor, is shared by each column. Signal processing circuits of different configurations are provided on signal transmission paths in an upward direction and a downward direction of a vertical signal line for extracting an image signal from each pixel, whereby image output processing and arithmetic processing are performed completely separately by the different circuit blocks. Thus, image quality of an actual image is improved and optimum design for arithmetic processing is made possible. Specifically, an I-V converter circuit unit, a CDS circuit unit and the like are provided on the image output side. A current mirror circuit unit, an analog memory array unit, a comparator unit, a bias circuit unit, a data latch unit, an output data bus unit and the like are provided on the arithmetic processing side.
    Type: Grant
    Filed: February 8, 2005
    Date of Patent: August 25, 2009
    Assignee: Sony Corporation
    Inventors: Toshinobu Sugiyama, Shinichi Yoshimura, Ryoji Suzuki, Kazuhiro Hoshino
  • Patent number: 7534983
    Abstract: An optical sensor able to make a pixel area small without degrading an increase of the speed of detection of the change of light intensity and reduction of the power consumption, therefore able reduce the size of a chip at the time of an increase of pixels and a method of selection of pixels of the same, imparting a function of holding charges corresponding to a light reception intensity of a previous frame and a function for comparing strongness/weakness of the light reception intensity of the previous frame and the light reception intensity of the current frame to each of the pixels composing a pixel array part and configuring both function portions by a capacitor Cs connected between a photodiode PD and a selection transistor T2.
    Type: Grant
    Filed: November 2, 2005
    Date of Patent: May 19, 2009
    Assignee: Sony Corporation
    Inventor: Toshinobu Sugiyama
  • Patent number: 7521656
    Abstract: An arithmetic circuit, which is retained by each pixel in a conventional image sensor, is shared by each column. Signal processing circuits of different configurations are provided on signal transmission paths in an upward direction and a downward direction of a vertical signal line for extracting an image signal from each pixel, whereby image output processing and arithmetic processing are performed completely separately by the different circuit blocks. Thus, image quality of an actual image is improved and optimum design for arithmetic processing is made possible. Specifically, an I-V converter circuit unit, a CDS circuit unit and the like are provided on the image output side. A current mirror circuit unit, an analog memory array unit, a comparator unit, a bias circuit unit, a data latch unit, an output data bus unit and the like are provided on the arithmetic processing side.
    Type: Grant
    Filed: April 13, 2005
    Date of Patent: April 21, 2009
    Assignee: Sony Corporation
    Inventors: Toshinobu Sugiyama, Shinichi Yoshimura, Ryoji Suzuki, Kazuhiro Hoshino
  • Publication number: 20090066824
    Abstract: An optical sensor able to make a pixel area small without degrading an increase of the speed of detection of the change of light intensity and reduction of the power consumption, therefore able reduce the size of a chip at the time of an increase of pixels and a method of selection of pixels of the same, imparting a function of holding charges corresponding to a light reception intensity of a previous frame and a function for comparing strongness/weakness of the light reception intensity of the previous frame and the light reception intensity of the current frame to each of the pixels composing a pixel array part and configuring both function portions by a capacitor Cs connected between a photodiode PD and a selection transistor T2.
    Type: Application
    Filed: November 6, 2008
    Publication date: March 12, 2009
    Applicant: Sony Corporation
    Inventor: Toshinobu SUGIYAMA
  • Publication number: 20080087799
    Abstract: An optical sensor able to make a pixel area small without degrading an increase of the speed of detection of the change of light intensity and reduction of the power consumption, therefore able reduce the size of a chip at the time of an increase of pixels and a method of selection of pixels of the same, imparting a function of holding charges corresponding to a light reception intensity of a previous frame and a function for comparing strongness/weakness of the light reception intensity of the previous frame and the light reception intensity of the current frame to each of the pixels composing a pixel array part and configuring both function portions by a capacitor Cs connected between a photodiode PD and a selection transistor T2.
    Type: Application
    Filed: November 2, 2005
    Publication date: April 17, 2008
    Inventor: Toshinobu Sugiyama
  • Patent number: 7256897
    Abstract: There is provided an apparatus and method for three-dimensional measurements by shining an object to be measured with plural laser beams while scanning. Even if the optical intensity of laser beams is weak, light disturbance is accurately separated to perform real-time three-dimensional measurement. A laser beam emitted from a laser source is separated into the plural beams of slit light with a predetermined angle at a hologram plate. These two beams are used for scanning and irradiating the object by a scanning mirror. These beams are reflected and read to determine whether or not an interval between these beams corresponds to the predetermined angle.
    Type: Grant
    Filed: January 21, 2004
    Date of Patent: August 14, 2007
    Assignee: Sony Corporation
    Inventor: Toshinobu Sugiyama
  • Publication number: 20070165112
    Abstract: An information processing apparatus includes an image taking means for taking images of a subject, a class-classification means for classifying a first image outputted by the image taking means into a class according to a characteristics thereof, a storage means for storing plural coefficient memories having different image taking conditions at the time of image taking, which store prediction coefficients according to the class acquired by learning, a designation means for designating one coefficient memory from among the plural coefficient memories based on the image taking condition when the image was taken by the image taking means, and a calculation means for calculating a second image in which noise is removed from the first image by calculating a prediction coefficient of the class of the first image, which is in the designated coefficient memory.
    Type: Application
    Filed: December 29, 2006
    Publication date: July 19, 2007
    Applicant: SONY CORPORATION
    Inventors: Katsuhisa Shinmei, Kenji Takahashi, Tsutomu Ichikawa, Takashi Sawao, Koji Yano, Toshinobu Sugiyama, Akihiro Okumura, Takao Inoue, Noriaki Takahashi, Tetsujiro Kondo
  • Publication number: 20070028094
    Abstract: An information processing system is disclosed which configured to: distribute publicly a first key by a change in a ray of light emitted from a light source; extract the first key from the ray of light emitted from the light source; encrypt a second key with the extracted first key to transmit the encrypted second key in short-distance communication; receive the encrypted second key and decrypting the received second key; and transfer information by use of the second key as a common key.
    Type: Application
    Filed: July 27, 2006
    Publication date: February 1, 2007
    Applicant: Sony Corporation
    Inventor: Toshinobu Sugiyama
  • Patent number: 6974980
    Abstract: A solid-state imaging device having, in each of unit pixels, an on-chip microlens composed of plural convex lens parts for each of photoelectric conversion elements provided on a semiconductor chip is disclosed. A floating diffusion part and a signal-charge read gate for taking out a signal charge from the photoelectric conversion element are provided on a region positioned in a boundary of each convex lens part of the on-chip microlens. A wiring for the floating diffusion part and a wiring for the read gate are provided along the respective boundaries of the convex lens parts of the on-chip microlens. In this device, the film thickness of the on-chip microlens can be reduced with regard to the area of each unit pixel, thereby facilitating the process control and enhancing the light transmission efficiency. It is also possible to enhance the circuit wiring efficiency in each unit pixel while avoiding any incomplete charge transfer to consequently improve the picture quality.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: December 13, 2005
    Assignee: Sony Corporation
    Inventor: Toshinobu Sugiyama
  • Patent number: 6969877
    Abstract: A solid-state imaging device having, in each of unit pixels, an on-chip microlens composed of plural convex lens parts for each of photoelectric conversion elements provided on a semiconductor chip is disclosed. A floating diffusion part and a signal-charge read gate for taking out a signal charge from the photoelectric conversion element are provided on a region positioned in a boundary of each convex lens part of the on-chip microlens. A wiring for the floating diffusion part and a wiring for the read gate are provided along the respective boundaries of the convex lens parts of the on-chip microlens. In this device, the film thickness of the on-chip microlens can be reduced with regard to the area of each unit pixel, thereby facilitating the process control and enhancing the light transmission efficiency. It is also possible to enhance the circuit wiring efficiency in each unit pixel while avoiding any incomplete charge transfer to consequently improve the picture quality.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: November 29, 2005
    Assignee: Sony Corporation
    Inventor: Toshinobu Sugiyama
  • Patent number: 6965135
    Abstract: A solid-state imaging device having, in each of unit pixels, an on-chip microlens composed of plural convex lens parts for each of photoelectric conversion elements provided on a semiconductor chip is disclosed. A floating diffusion part and a signal-charge read gate for taking out a signal charge from the photoelectric conversion element are provided on a region positioned in a boundary of each convex lens part of the on-chip microlens. A wiring for the floating diffusion part and a wiring for the read gate are provided along the respective boundaries of the convex lens parts of the on-chip microlens. In this device, the film thickness of the on-chip microlens can be reduced with regard to the area of each unit pixel, thereby facilitating the process control and enhancing the light transmission efficiency. It is also possible to enhance the circuit wiring efficiency in each unit pixel while avoiding any incomplete charge transfer to consequently improve the picture quality.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: November 15, 2005
    Assignee: Sony Corporation
    Inventor: Toshinobu Sugiyama
  • Publication number: 20050231618
    Abstract: An image-capturing apparatus includes a pixel array including pixels. Each of the pixels includes a transducer for generating signal charge according to the intensity of an incident light beam. The image-capturing apparatus further includes an output circuit for outputting a pixel signal outside the pixel array at a frame rate depending on the pixel position in the pixel array, based on the signal charge; and an output-controlling unit for controlling the operation of the output circuit.
    Type: Application
    Filed: March 30, 2005
    Publication date: October 20, 2005
    Inventor: Toshinobu Sugiyama
  • Publication number: 20050199923
    Abstract: A solid-state imaging device having, in each of unit pixels, an on-chip microlens composed of plural convex lens parts for each of photoelectric conversion elements provided on a semiconductor chip is disclosed. A floating diffusion part and a signal-charge read gate for taking out a signal charge from the photoelectric conversion element are provided on a region positioned in a boundary of each convex lens part of the on-chip microlens. A wiring for the floating diffusion part and a wiring for the read gate are provided along the respective boundaries of the convex lens parts of the on-chip microlens. In this device, the film thickness of the on-chip microlens can be reduced with regard to the area of each unit pixel, thereby facilitating the process control and enhancing the light transmission efficiency. It is also possible to enhance the circuit wiring efficiency in each unit pixel while avoiding any incomplete charge transfer to consequently improve the picture quality.
    Type: Application
    Filed: April 29, 2005
    Publication date: September 15, 2005
    Inventor: Toshinobu Sugiyama
  • Publication number: 20050194617
    Abstract: A solid-state imaging device having, in each of unit pixels, an on-chip microlens composed of plural convex lens parts for each of photoelectric conversion elements provided on a semiconductor chip is disclosed. A floating diffusion part and a signal-charge read gate for taking out a signal charge from the photoelectric conversion element are provided on a region positioned in a boundary of each convex lens part of the on-chip microlens. A wiring for the floating diffusion part and a wiring for the read gate are provided along the respective boundaries of the convex lens parts of the on-chip microlens. In this device, the film thickness of the on-chip microlens can be reduced with regard to the area of each unit pixel, thereby facilitating the process control and enhancing the light transmission efficiency. It is also possible to enhance the circuit wiring efficiency in each unit pixel while avoiding any incomplete charge transfer to consequently improve the picture quality.
    Type: Application
    Filed: April 29, 2005
    Publication date: September 8, 2005
    Inventor: Toshinobu Sugiyama
  • Publication number: 20050189601
    Abstract: A solid-state imaging device having, in each of unit pixels, an on-chip microlens composed of plural convex lens parts for each of photoelectric conversion elements provided on a semiconductor chip is disclosed. A floating diffusion part and a signal-charge read gate for taking out a signal charge from the photoelectric conversion element are provided on a region positioned in a boundary of each convex lens part of the on-chip microlens. A wiring for the floating diffusion part and a wiring for the read gate are provided along the respective boundaries of the convex lens parts of the on-chip microlens. In this device, the film thickness of the on-chip microlens can be reduced with regard to the area of each unit pixel, thereby facilitating the process control and enhancing the light transmission efficiency. It is also possible to enhance the circuit wiring efficiency in each unit pixel while avoiding any incomplete charge transfer to consequently improve the picture quality.
    Type: Application
    Filed: April 29, 2005
    Publication date: September 1, 2005
    Inventor: Toshinobu Sugiyama
  • Publication number: 20050173618
    Abstract: An arithmetic circuit, which is retained by each pixel in a conventional image sensor, is shared by each column. Signal processing circuits of different configurations are provided on signal transmission paths in an upward direction and a downward direction of a vertical signal line for extracting an image signal from each pixel, whereby image output processing and arithmetic processing are performed completely separately by the different circuit blocks. Thus, image quality of an actual image is improved and optimum design for arithmetic processing is made possible. Specifically, an I-V converter circuit unit, a CDS circuit unit and the like are provided on the image output side. A current mirror circuit unit, an analog memory array unit, a comparator unit, a bias circuit unit, a data latch unit, an output data bus unit and the like are provided on the arithmetic processing side.
    Type: Application
    Filed: February 8, 2005
    Publication date: August 11, 2005
    Inventors: Toshinobu Sugiyama, Shinichi Yoshimura, Ryoji Suzuki, Kazuhiro Hoshino
  • Publication number: 20050174612
    Abstract: An arithmetic circuit, which is retained by each pixel in a conventional image sensor, is shared by each column. Signal processing circuits of different configurations are provided on signal transmission paths in an upward direction and a downward direction of a vertical signal line for extracting an image signal from each pixel, whereby image output processing and arithmetic processing are performed completely separately by the different circuit blocks. Thus, image quality of an actual image is improved and optimum design for arithmetic processing is made possible. Specifically, an I-V converter circuit unit, a CDS circuit unit and the like are provided on the image output side. A current mirror circuit unit, an analog memory array unit, a comparator unit, a bias circuit unit, a data latch unit, an output data bus unit and the like are provided on the arithmetic processing side.
    Type: Application
    Filed: April 13, 2005
    Publication date: August 11, 2005
    Inventors: Toshinobu Sugiyama, Shinichi Yoshimura, Ryoji Suzuki, Kazuhiro Hoshino
  • Patent number: 6900480
    Abstract: A solid-state imaging device having, in each of unit pixels, an on-chip microlens composed of plural convex lens parts for each of photoelectric conversion elements provided on a semiconductor chip is disclosed. A floating diffusion part and a signal-charge read gate for taking out a signal charge from the photoelectric conversion element are provided on a region positioned in a boundary of each convex lens part of the on-chip microlens. A wiring for the floating diffusion part and a wiring for the read gate are provided along the respective boundaries of the convex lens parts of the on-chip microlens. In this device, the film thickness of the on-chip microlens can be reduced with regard to the area of each unit pixel, thereby facilitating the process control and enhancing the light transmission efficiency. It is also possible to enhance the circuit wiring efficiency in each unit pixel while avoiding any incomplete charge transfer to consequently improve the picture quality.
    Type: Grant
    Filed: January 14, 2003
    Date of Patent: May 31, 2005
    Assignee: Sony Corporation
    Inventor: Toshinobu Sugiyama
  • Patent number: 6858827
    Abstract: An arithmetic circuit, which is retained by each pixel in a conventional image sensor, is shared by each column. Signal processing circuits of different configurations are provided on signal transmission paths in an upward direction and a downward direction of a vertical signal line for extracting an image signal from each pixel, whereby image output processing and arithmetic processing are performed completely separately by the different circuit blocks. Thus, image quality of an actual image is improved and optimum design for arithmetic processing is made possible. Specifically, an I-V converter circuit unit, a CDS circuit unit and the like are provided on the image output side. A current mirror circuit unit, an analog memory array unit, a comparator unit, a bias circuit unit, a data latch unit, an output data bus unit and the like are provided on the arithmetic processing side.
    Type: Grant
    Filed: September 18, 2002
    Date of Patent: February 22, 2005
    Assignee: Sony Corporation
    Inventors: Toshinobu Sugiyama, Shinichi Yoshimura, Ryoji Suzuki, Kazuhiro Hoshino