Abstract: In a solid-state imaging device 10, a signal retaining part 212 is provided with a first sampling part 2122 and a second sampling part 2123, each of which is formed by one sampling transistor (1T) and one sampling capacitor (1C). The coupling node between the two sampling parts is a retaining node ND23, which is used as a bidirectional port. With such a configuration, the solid-state imaging device 10 is configured as a solid-state imaging element having a global shutter function that achieves substantially the same signal amplitude as in the differential reading scheme with four transistors. Thus, the solid-state imaging device 10 can achieve the reduced increase in number of transistors, prevent the occurrence of signal amplitude loss in the sampling parts, maintain high pixel sensitivity and reduce input conversion noise.

Abstract: A pixel PXL includes a first photodiode PDSL and a second photodiode PSLS having different well capacities and responsivities, transfer transistors TGSL-Tr, TGLS-Tr for transferring the charges stored in the photodiodes to a floating diffusion FD, and a capacitance changing part 80 for changing the capacitance of the floating diffusion depending on a capacitance changing signal. The first well capacity of the first photodiode PDSL is smaller than the second well capacity of the second photodiode PDLS, and the first responsivity of the first photodiode PDSL is larger than the second responsivity of the second photodiode PDLS. With these configurations, it becomes possible to realize a widened dynamic range, prevent the read-out noise from affecting the performance, and eventually achieve improved image quality.

Abstract: Provided are a solid-state imaging device, a method for driving a solid-state imaging device and an electronic apparatus. A memory part is formed using an SRAM serving as an ADC memory, and an ADC code is written into and read from the memory part under control of a reading part. In the SRAM, a power gating transistor is additionally provided to both of a power supply node (between a power supply and a virtual power supply node) and a ground node (between a virtual reference potential node and a reference potential) for the purposes of blocking the shoot-through currents from the bit cells during the writing operation. The power gating transistors are controlled by the reading part so as to operate as either a weak current source or switch.

Abstract: Provided is a solid-state imaging device. A comparator is configured to perform a first comparing operation of outputting a digital first comparison result signal obtained by processing the overflow charges overflowing from PD1 to FD1 in the storing period, a second comparing operation of outputting a digital second comparison result signal obtained by processing the charges stored in PD1 that are transferred to FD1 in the transfer period, and a third comparing operation of outputting a digital third comparison result signal obtained by processing the charges stored in PD1 that are transferred to FD1 in the transfer period and the charges stored in the charge storing part, and a memory control part controls whether or not to allow writing of the data corresponding to the third comparison result signal into a memory part, depending on the states of the first and second comparison result signals.

Abstract: Provided are a solid-state imaging device, a method for driving the same and an electronic apparatus where a comparator in an AD converter in a digital pixel is characterized by low power consumption and low peak current and that are capable of operating at low voltage and achieving high linearity across the entire input range. A comparator is constituted by two stages of preamplifiers with a clamp diode and two serial current-controlling inverters, and every branch is current-controlled. The two stages of the preamplifiers and the following two consecutive inverters are all current-controlled such that low power consumption and low peak current are realized. A trade-off can be made between the noise and the comparator speed by controlling the bandwidth of the comparator using the bias current. This is beneficial to more than one comparator operation mode.

Abstract: One object is to provide a solid-state imaging device that can capture visible light images such as RGB images and infrared images such as NIR images and maintain a high light-receiving sensitivity for infrared light, a method of driving such a solid-state imaging device, and an electronic apparatus. The solid-state imaging device includes: a pixel part having unit pixel groups arranged therein, the unit pixel groups each including a plurality of pixels at least for visible light that perform photoelectric conversion; and a reading part for reading pixel signals from the pixel part, wherein the plurality of pixels for visible light have a light-receiving sensitivity for infrared light, and in an infrared reading mode, the reading part is capable of adding together signals for infrared light read from the plurality of pixels for visible light.

Abstract: In a solid-state imaging device 10, a signal retaining part 212 is provided with a first sampling part 2122 and a second sampling part 2123, each of which is formed by one sampling transistor (1T) and one sampling capacitor (1C). The coupling node between the two sampling parts is a retaining node ND23, which is used as a bidirectional port. With such a configuration, the solid-state imaging device 10 is configured as a solid-state imaging element having a global shutter function that achieves substantially the same signal amplitude as in the differential reading scheme with four transistors. Thus, the solid-state imaging device 10 can achieve the reduced increase in number of transistors, prevent the occurrence of signal amplitude loss in the sampling parts, maintain high pixel sensitivity and reduce input conversion noise.

Abstract: Provided are a solid-state imaging device, a method for driving the same and an electronic apparatus where a comparator in an AD converter in a digital pixel is characterized by low power consumption and low peak current and that are capable of operating at low voltage and achieving high linearity across the entire input range. A comparator is constituted by two stages of preamplifiers with a clamp diode and two serial current-controlling inverters, and every branch is current-controlled. The two stages of the preamplifiers and the following two consecutive inverters are all current-controlled such that low power consumption and low peak current are realized. A trade-off can be made between the noise and the comparator speed by controlling the bandwidth of the comparator using the bias current. This is beneficial to more than one comparator operation mode.

Abstract: Provided are a solid-state imaging device, a method for driving a solid-state imaging device and an electronic apparatus. A memory part is formed using an SRAM serving as an ADC memory, and an ADC code is written into and read from the memory part under control of a reading part. In the SRAM, a power gating transistor is additionally provided to both of a power supply node (between a power supply and a virtual power supply node) and a ground node (between a virtual reference potential node and a reference potential) for the purposes of blocking the shoot-through currents from the bit cells during the writing operation. The power gating transistors are controlled by the reading part so as to operate as either a weak current source or switch.

Abstract: Provided is a solid-state imaging device. A comparator is configured to perform a first comparing operation of outputting a digital first comparison result signal obtained by processing the overflow charges overflowing from PD1 to FD1 in the storing period, a second comparing operation of outputting a digital second comparison result signal obtained by processing the charges stored in PD1 that are transferred to FD1 in the transfer period, and a third comparing operation of outputting a digital third comparison result signal obtained by processing the charges stored in PD1 that are transferred to FD1 in the transfer period and the charges stored in the charge storing part, and a memory control part controls whether or not to allow writing of the data corresponding to the third comparison result signal into a memory part, depending on the states of the first and second comparison result signals.

Abstract: A solid-state imaging device, in which a signal holding part can hold a signal with respect to a voltage signal corresponding to an accumulated charge in a photoelectric conversion element of a photodiode PD1 which is transferred to an output node of a floating diffusion FD1 in a transfer period after an integration period and a signal with respect to a voltage signal corresponding to an overflow charge overflowing to the output node of the floating diffusion FD1 from at least the photodiode PD1 in any period among the photoelectric conversion element of the photodiode PD1 and the storage capacity element of the storage capacitor. Due to this, substantially, it becomes possible to realize a broader dynamic range and higher frame rate.

Abstract: An AD conversion part has a comparator for performing comparison processing comparing a voltage signal read out by a photoelectric converting and reading part and a reference voltage and outputting a digitalized comparison result signal, the comparator, under the control by a reading part, performs first comparison processing for outputting a digitalized first comparison result signal with respect to a voltage signal corresponding to an overflow charge overflowing from a photodiode PD1 to a floating diffusion FD1 in an integration period and second comparison processing for outputting a digitalized second comparison result signal with respect to a voltage signal corresponding to an accumulated charge of the photodiode PD1 transferred to the floating diffusion FD1 in a transfer period after the integration period. Due to this, it becomes possible to substantially realize a broader dynamic range and higher frame rate.

Abstract: A comparator in an AD conversion part, under the control of a reading part, performs a first comparison processing outputting a digitized first comparison result signal with respect to a voltage signal corresponding to an overflow charge overflowing from a PD1 to an FD1 in an integration period, and a second comparison processing outputting a digitized second comparison result signal with respect to a voltage signal corresponding to a accumulated charge of the PD1 transferred to the FD1 in a transfer period after the integration period and, in the first comparison processing, the period of the first comparison processing is divided into a plurality of sub periods and, in each of the sub periods, the comparator performs an AD conversion processing comparing the voltage signal of the output buffer part and the reference voltage and outputting the digitized comparison result signal.

Abstract: A reading part, in a first reset period PR1, holds reset transistors in all pixels in a conductive state and executes a first conversion gain reset readout processing HCGRRD, stores an AD conversion code with respect to a first readout reset, signal HCGVRST in a memory part, then, in a transfer period PT1, holds the transfer transistors in all pixels in a conductive state to transfer the accumulated charges in photodiodes PD1 to FD1 to thereby execute a global shutter operation accumulating overflowed charges in storage capacitors CS1. The reading part, when reading each row, executes a first conversion gain signal readout processing, a second conversion gain signal readout processing, and a second conversion gain reset readout processing in order. Due to this, it becomes possible to realize digital pixels provided with a global shutter function at a small pixel pitch.

Abstract: A pixel PXL includes a first photodiode PDSL and a second photodiode PSLS having different well capacities and responsivities, transfer transistors TGSL-Tr, TGLS-Tr for transferring the charges stored in the photodiodes to a floating diffusion FD, and a capacitance changing part 80 for changing the capacitance of the floating diffusion depending on a capacitance changing signal. The first well capacity of the first photodiode PDSL is smaller than the second well capacity of the second photodiode PDLS, and the first responsivity of the first photodiode PDSL is larger than the second responsivity of the second photodiode PDLS. With these configurations, it becomes possible to realize a widened dynamic range, prevent the read-out noise from affecting the performance, and eventually achieve improved image quality.

Abstract: A comparator in an AD conversion part, under the control of a reading part, performs a first comparison processing outputting a digitized first comparison result signal with respect to a voltage signal corresponding to an overflow charge overflowing from a photodiode PD1 to FD1 in an integration period and performs a second comparison processing outputting a digitized second comparison result signal with respect to a voltage signal corresponding to an accumulated charge of the photodiode PD1 transferred to the FD1 after a transfer period after the integration period, and a signal processing part performs combinational processing applying FWC information and joining a first AD conversion transfer curve TC1 corresponding to the first comparison processing and a second AD conversion transfer curve TC2 corresponding to the second comparison processing. Thus, it is possible to smoothly switch (connect) a plurality of signals to be combined and to suppress deterioration of an image.

Abstract: A comparator in an AD conversion part performs, under the control of reading part, a first comparison processing outputting a digitized first comparison result signal with respect to a voltage signal corresponding to an overflow charge overflowing from a PD1 to an FD1 in an integration period and a second comparison processing outputting a digitized second comparison result signal with respect to a voltage signal corresponding to a accumulated charge of the PD1 transferred to the FD1 in a transfer period after the integration period and, in the first comparison processing, starts an AD conversion processing comparing the voltage signal of the output buffer part and the reference voltage and outputting the digitized comparison result signal with a delay from the starting time of the first comparison processing. The comparator lowers a power consumption and suppresses an influence of a dark current of the FD and deterioration of an image.

Abstract: A solid-state imaging device which, in a voltage mode, simultaneously samples the pixel signal in all the pixels in a signal holding part serving as the pixel signal storage part, reads converted signals corresponding to readout signals held in a first signal holding capacitor and a second signal holding capacitor to a first signal line, reads converted signals corresponding to readout reset signals simultaneously in parallel to the second signal line, and supplies the same as a differential signal to a column readout circuit. Due to this, a sufficiently low parasitic light sensitivity corresponding to the application can be realized, settling error can be suppressed, and pixel fixed pattern noise can be reduced.

Abstract: A solid-state imaging device comprised of a first substrate on which a pixel part is formed and a second substrate on which a column readout circuit is formed along a column level connection part, a row driver is formed along a row level connection part, and a pitch conversion-use interconnect region including a slanted interconnect for pitch conversion among interconnects is formed, the pitch conversion-use interconnect region is formed at least between the end part of the column readout circuit having a third pitch shorter than the pixel part and the end part of the column level connection part and/or between the end part of the row driver having a fourth pitch shorter than the pixel part and the end part of the row level connection part.

Abstract: One object is to provide a solid-state imaging device that can capture visible light images such as RGB images and infrared images such as NIR images and maintain a high light-receiving sensitivity for infrared light, a method of driving such a solid-state imaging device, and an electronic apparatus. The solid-state imaging device includes: a pixel part having unit pixel groups arranged therein, the unit pixel groups each including a plurality of pixels at least for visible light that perform photoelectric conversion; and a reading part for reading pixel signals from the pixel part, wherein the plurality of pixels for visible light have a light-receiving sensitivity for infrared light, and in an infrared reading mode, the reading part is capable of adding together signals for infrared light read from the plurality of pixels for visible light.