Patents by Inventor Toshio Nagasawa

Toshio Nagasawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120049337
    Abstract: A non-insulated DC-DC converter has a power MOSFET for a highside switch and a power MOS•ET for a lowside switch. In the non-insulated DC-DC converter, the power MOS•ET for the highside switch and the power MOS•ET for the lowside switch, driver circuits that control operations of these elements, respectively, and a Schottky barrier diode connected in parallel with the power MOS•ET for the lowside switch are respectively formed in four different semiconductor chips. These four semiconductor chips are housed in one package. The semiconductor chips are mounted over the same die pad. The semiconductor chips are disposed so as to approach each other.
    Type: Application
    Filed: November 10, 2011
    Publication date: March 1, 2012
    Inventors: Tomoaki UNO, Masaki Shiraishi, Nobuyoshi Matsuura, Toshio Nagasawa
  • Patent number: 8076767
    Abstract: A non-insulated DC-DC converter has a power MOS-FET for a highside switch and a power MOS-FET for a lowside switch. In the non-insulated DC-DC converter, the power MOS-FET for the highside switch and the power MOS-FET for the lowside switch, driver circuits that control operations of these elements, respectively, and a Schottky barrier diode connected in parallel with the power MOS-FET for the lowside switch are respectively formed in four different semiconductor chips. These four semiconductor chips are housed in one package. The semiconductor chips are mounted over the same die pad. The semiconductor chips are disposed so as to approach each other.
    Type: Grant
    Filed: October 26, 2010
    Date of Patent: December 13, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Tomoaki Uno, Masaki Shiraishi, Nobuyoshi Matsuura, Toshio Nagasawa
  • Patent number: 8072246
    Abstract: A switching power supply device performs a stable operation with fast response for a semiconductor integrated circuit device. A capacitor is provided between the output side of an inductor and a ground potential. A first power MOSFET supplies an electric current from an input voltage to the input side of the inductor. A second power MOSFET turned on when the first power MOSFET is off allows the input side of the inductor to be of a predetermined potential. A first feedback signal corresponding to an output voltage obtained from the output side of the inductor and a second feedback signal corresponding to an electric current flowed to the first power MOSFET are used to form a PWM signal. The first power MOSFET has plural cells of a vertical type MOS-construction.
    Type: Grant
    Filed: November 19, 2010
    Date of Patent: December 6, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Toshio Nagasawa, Ryotaro Kudo
  • Patent number: 8063620
    Abstract: The present invention provides a switching power source and a semiconductor integrated circuit which realize an acquisition a sufficient driving voltage of a high-potential side switching element M1 even when a power source voltage VDD is low.
    Type: Grant
    Filed: February 9, 2011
    Date of Patent: November 22, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Kyoichi Hosokawa, Ryotaro Kudo, Toshio Nagasawa, Koji Tateno
  • Patent number: 7986133
    Abstract: To provide a power supply unit capable of realizing a multiphase power supply at low cost. For example, each of a plurality of semiconductor devices DEV[1]-DEV[n] comprises a trigger input terminal TRG_IN, a trigger output terminal TRG_OUT, and a timer circuit TM that delays a pulse signal input from TRG_IN and outputs it to TRG_OUT. DEV[1]-DEV[n] are mutually coupled in a ring shape by its own TRG_IN being coupled to TRG_OUT of one semiconductor device other than itself. Each of DEV[1]-DEV[n] performs switching operation by using the pulse signal from TRG_IN as a starting point, and feeds a current into an inductor L corresponding to itself. Moreover, DEV[1] generates the above-described pulse signal only once during startup by a start trigger terminal ST being set to a ground voltage GND, for example.
    Type: Grant
    Filed: July 12, 2010
    Date of Patent: July 26, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Ryotaro Kudo, Toshio Nagasawa
  • Publication number: 20110169471
    Abstract: A multi-phase power source device capable of easily changing the number of phases is realized. For example, a plurality of drive units POL[1]-POL[4] corresponding to the number of phases are provided, wherein each POL[n] receives a phase input signal PHI[n] serving as a pulse signal, and generates a phase output signal PHO[n] by delaying PHI[n] by a predetermined cycles of a clock signal CLK. PHI[n] and PHO[n] of each POL[n] are coupled in a ring, wherein each POL[n] performs a switching operation with PHI[n] or PHO[n] as a starting point. In this case, each POL[n] charges and discharges a capacitor Cct commonly coupled to each POL[n] with an equal current, and a frequency of CLK is determined based on this charge and discharge rate. That is, if the number of phases increases n times, the frequency of CLK will be automatically controlled to n times.
    Type: Application
    Filed: December 29, 2010
    Publication date: July 14, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Toshio NAGASAWA
  • Publication number: 20110127975
    Abstract: The present invention provides a switching power source and a semiconductor integrated circuit which realize an acquisition a sufficient driving voltage of a high-potential side switching element M1 even when a power source voltage VDD is low.
    Type: Application
    Filed: February 9, 2011
    Publication date: June 2, 2011
    Inventors: KYOICHI HOSOKAWA, Ryotaro Kudo, Toshio Nagasawa, Koji Tateno
  • Publication number: 20110062927
    Abstract: A switching power supply device performs a stable operation with fast response for a semiconductor integrated circuit device. A capacitor is provided between the output side of an inductor and a ground potential. A first power MOSFET supplies an electric current from an input voltage to the input side of the inductor. A second power MOSFET turned on when the first power MOSFET is off allows the input side of the inductor to be of a predetermined potential. A first feedback signal corresponding to an output voltage obtained from the output side of the inductor and a second feedback signal corresponding to an electric current flowed to the first power MOSFET are used to form a PWM signal. The first power MOSFET has plural cells of a vertical type MOS-construction.
    Type: Application
    Filed: November 19, 2010
    Publication date: March 17, 2011
    Applicant: RENESAS TECHNOLOGY CORPORATION
    Inventors: Toshio NAGASAWA, Ryotaro KUDO
  • Patent number: 7902799
    Abstract: The present invention provides a switching power source and a semiconductor integrated circuit which realize an acquisition a sufficient driving voltage of a high-potential side switching element M1 even when a power source voltage VDD is low.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: March 8, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Kyoichi Hosokawa, Ryotaro Kudo, Toshio Nagasawa, Koji Tateno
  • Publication number: 20110037449
    Abstract: A non-insulated DC-DC converter has a power MOS-FET for a highside switch and a power MOS-FET for a lowside switch. In the non-insulated DC-DC converter, the power MOS-FET for the highside switch and the power MOS-FET for the lowside switch, driver circuits that control operations of these elements, respectively, and a Schottky barrier diode connected in parallel with the power MOS-FET for the lowside switch are respectively formed in four different semiconductor chips. These four semiconductor chips are housed in one package. The semiconductor chips are mounted over the same die pad. The semiconductor chips are disposed so as to approach each other.
    Type: Application
    Filed: October 26, 2010
    Publication date: February 17, 2011
    Inventors: Tomoaki UNO, Masaki Shiraishi, Nobuyoshi Matsuura, Toshio Nagasawa
  • Patent number: 7863756
    Abstract: A non-insulated DC-DC converter has a power MOS•FET for a highside switch and a power MOS•FET for a lowside switch. In the non-insulated DC-DC converter, the power MOS•FET for the highside switch and the power MOS•FET for the lowside switch, driver circuits that control operations of these elements, respectively, and a Schottky barrier diode connected in parallel with the power MOS•FET for the lowside switch are respectively formed in four different semiconductor chips. These four semiconductor chips are housed in one package. The semiconductor chips are mounted over the same die pad. The semiconductor chips are disposed so as to approach each other.
    Type: Grant
    Filed: September 24, 2008
    Date of Patent: January 4, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Tomoaki Uno, Masaki Shiraishi, Nobuyoshi Matsuura, Toshio Nagasawa
  • Patent number: 7859326
    Abstract: A switching power supply device performs a stable operation with fast response for a semiconductor integrated circuit device. A capacitor is provided between the output side of an inductor and a ground potential. A first power MOSFET supplies an electric current from an input voltage to the input side of the inductor. A second power MOSFET turned on when the first power MOSFET is off allows the input side of the inductor to be of a predetermined potential. A first feedback signal corresponding to an output voltage obtained from the output side of the inductor and a second feedback signal corresponding to an electric current flowed to the first power MOSFET are used to form a PWM signal. The first power MOSFET has plural cells of a vertical type MOS-construction.
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: December 28, 2010
    Assignee: Renesas Electronics Corporation
    Inventors: Toshio Nagasawa, Ryotaro Kudo
  • Publication number: 20100277143
    Abstract: To provide a power supply unit capable of realizing a multiphase power supply at low cost. For example, each of a plurality of semiconductor devices DEV[1]-DEV[n] comprises a trigger input terminal TRG_IN, a trigger output terminal TRG_OUT, and a timer circuit TM that delays a pulse signal input from TRG_IN and outputs it to TRG_OUT. DEV[1]-DEV[n] are mutually coupled in a ring shape by its own TRG_IN being coupled to TRG_OUT of one semiconductor device other than itself. Each of DEV[1]-DEV[n] performs switching operation by using the pulse signal from TRG_IN as a starting point, and feeds a current into an inductor L corresponding to itself. Moreover, DEV[1] generates the above-described pulse signal only once during startup by a start trigger terminal ST being set to a ground voltage GND, for example.
    Type: Application
    Filed: July 12, 2010
    Publication date: November 4, 2010
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Ryotaro Kudo, Toshio Nagasawa
  • Patent number: 7777462
    Abstract: To provide a power supply unit capable of realizing a multiphase power supply at low cost. For example, each of a plurality of semiconductor devices DEV[1]-DEV[n] comprises a trigger input terminal TRG_IN, a trigger output terminal TRG_OUT, and a timer circuit TM that delays a pulse signal input from TRG_IN and outputs it to TRG_OUT. DEV[1]-DEV[n] are mutually coupled in a ring shape by its own TRG_IN being coupled to TRG_OUT of one semiconductor device other than itself. Each of DEV[1]-DEV[n] performs switching operation by using the pulse signal from TRG_IN as a starting point, and feeds a current into an inductor L corresponding to itself. Moreover, DEV[1] generates the above-described pulse signal only once during startup by a start trigger terminal ST being set to a ground voltage GND, for example.
    Type: Grant
    Filed: December 15, 2008
    Date of Patent: August 17, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Ryotaro Kudo, Toshio Nagasawa
  • Publication number: 20090267587
    Abstract: In a driver circuit constructing a switching power supply device that switches power transistors passing a current through a coil by a PWM mode, a current detection transistor, which is smaller in size than the low-potential side power transistor, and a current detection resistor are provided in parallel to the low-potential side power transistor. The same control voltage as the power transistor is applied to the control terminal of the current detection transistor. An operational amplifier is formed, that has the potential of the connection node between the current detection transistor and the current detection resistor applied to its inverse input terminal and a feedback loop, so as to make a pair of input terminals of the operational amplifier be at the same potential. A signal produced by the current detection resistor is thus outputted as a current detection signal.
    Type: Application
    Filed: June 18, 2009
    Publication date: October 29, 2009
    Applicant: RENEAS TECHNOLOGY CORP.
    Inventors: Koji Tateno, Ryotaro Kudo, Shin Chiba, Kyoichi Hosokawa, Toshio Nagasawa
  • Publication number: 20090224732
    Abstract: To provide a power supply unit capable of realizing a multiphase power supply at low cost. For example, each of a plurality of semiconductor devices DEV[1]-DEV[n] comprises a trigger input terminal TRG_IN, a trigger output terminal TRG_OUT, and a timer circuit TM that delays a pulse signal input from TRG_IN and outputs it to TRG_OUT. DEV[1]-DEV[n] are mutually coupled in a ring shape by its own TRG_IN being coupled to TRG_OUT of one semiconductor device other than itself. Each of DEV[1]-DEV[n] performs switching operation by using the pulse signal from TRG_IN as a starting point, and feeds a current into an inductor L corresponding to itself. Moreover, DEV[1] generates the above-described pulse signal only once during startup by a start trigger terminal ST being set to a ground voltage GND, for example.
    Type: Application
    Filed: December 15, 2008
    Publication date: September 10, 2009
    Inventors: Ryotaro Kudo, Toshio Nagasawa
  • Publication number: 20090179620
    Abstract: The present invention provides a switching power source and a semiconductor integrated circuit which realize an acquisition a sufficient driving voltage of a high-potential side switching element M1 even when a power source voltage VDD is low.
    Type: Application
    Filed: March 13, 2009
    Publication date: July 16, 2009
    Inventors: KYOICHI HOSOKAWA, Ryotaro Kudo, Toshio Nagasawa, Koji Tateno
  • Patent number: 7550959
    Abstract: In a driver circuit constructing a switching power supply device that switches power transistors passing a current through a coil by a PWM mode, a current detection transistor, which is smaller in size than the low-potential side power transistor, and a current detection resistor are provided in parallel to the low-potential side power transistor. The same control voltage as the power transistor is applied to the control terminal of the current detection transistor. An operational amplifier is formed, that has the potential of the connection node between the current detection transistor and the current detection resistor applied to its inverse input terminal and a feedback loop, so as to make a pair of input terminals of the operational amplifier be at the same potential. A signal produced by the current detection resistor is thus outputted as a current detection signal.
    Type: Grant
    Filed: January 22, 2008
    Date of Patent: June 23, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Koji Tateno, Ryotaro Kudo, Shin Chiba, Kyoichi Hosokawa, Toshio Nagasawa
  • Patent number: 7514908
    Abstract: The present invention provides a switching power source and a semiconductor integrated circuit which realize an acquisition a sufficient driving voltage of a high-potential side switching element M1 even when a power source voltage VDD is low.
    Type: Grant
    Filed: January 14, 2005
    Date of Patent: April 7, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Kyoichi Hosokawa, Ryotaro Kudo, Toshio Nagasawa, Koji Tateno
  • Publication number: 20090026544
    Abstract: A non-insulated DC-DC converter has a power MOS•FET for a highside switch and a power MOS•FET for a lowside switch. In the non-insulated DC-DC converter, the power MOS•FET for the highside switch and the power MOS•FET for the lowside switch, driver circuits that control operations of these elements, respectively, and a Schottky barrier diode connected in parallel with the power MOS•FET for the lowside switch are respectively formed in four different semiconductor chips. These four semiconductor chips are housed in one package. The semiconductor chips are mounted over the same die pad. The semiconductor chips are disposed so as to approach each other.
    Type: Application
    Filed: September 24, 2008
    Publication date: January 29, 2009
    Inventors: Tomoaki Uno, Masaki Shiraishi, Nobuyoshi Matsuura, Toshio Nagasawa