Abstract: A light receiving element capable of detecting predetermined light among incident light beams with high sensitivity by a simple structure is provided. A light receiving element 100 that detects ultraviolet rays UV in sunlight SL includes an N-type semiconductor substrate 1, a P-type conductive layer 2 formed on the surface of the semiconductor substrate 1, an N-type ultraviolet absorption layer 3 formed on the surface of the conductive layer 2, transmitting visible rays VL in the sunlight SL, and absorbing the ultraviolet rays UV to excite electrons, and an N-type detection layer 4 formed at a position separated from the ultraviolet absorption layer 3 on the surface of the conductive layer 2 and detecting electrons flowing from the ultraviolet absorption layer 3 as a first photocurrent IL1.

Abstract: Provided is a semiconductor light detection device having a relatively high detection sensitivity to a light component of a specific wavelength. The semiconductor light detection device includes: a semiconductor light receiving element, in which a first conductive layer is formed on a surface of a semiconductor substrate, a second conductive layer is formed below the first conductive layer, a third conductive layer is formed below the second conductive layer, and a photocurrent based on the intensity of incident light is output from the third conductive layer while an input voltage is applied to the first conductive layer; and a semiconductor detection circuit configured to output an output voltage based on a current difference between a first photocurrent and a second photocurrent being output in response to the application of the first input voltage and the second input voltage, respectively.

Abstract: In order to form a light receiving element having high reliability and a MOS transistor together on the same silicon substrate, after forming a gate electrode of the MOS transistor, a gate oxide film in a light receiving element forming region is removed. Then, a thermal oxide film is newly formed in the light receiving element forming region, and ion implantation is performed in the light receiving element forming region through the thermal oxide film such that a shallow pn junction is formed.

Abstract: Provided is a semiconductor light detection device having a relatively high detection sensitivity to a light component of a specific wavelength. The semiconductor light detection device includes: a semiconductor light receiving element, in which a first conductive layer is formed on a surface of a semiconductor substrate, a second conductive layer is formed below the first conductive layer, a third conductive layer is formed below the second conductive layer, and a photocurrent based on the intensity of incident light is output from the third conductive layer while an input voltage is applied to the first conductive layer; and a semiconductor detection circuit configured to output an output voltage based on a current difference between a first photocurrent and a second photocurrent being output in response to the application of the first input voltage and the second input voltage, respectively.

Abstract: Provided is an ultraviolet light receiving element capable of reducing visible light sensitivity. The ultraviolet light receiving element includes: a first photodiode sensitive to an ultraviolet light provided in a first region of a semiconductor substrate; and a second photodiode insensitive to the ultraviolet light provided in a second region of the semiconductor substrate. A second well implantation layer in the second photodiode has a peak concentration position deeper than a peak concentration position of a well implantation layer in the first photodiode by a depth equal to a depth from a surface of the semiconductor substrate to a peak concentration position of a surface implantation layer in the second photodiode.

Abstract: A humidity sensor includes an insulating film formed on a semiconductor substrate, and a plurality of first electrodes and a plurality of second electrodes arranged on the insulating film so that each first electrode is adjacent to four of the second electrodes in four directions of up, down, right, and left when viewed in plan view, while each second electrode is adjacent to four of the first electrodes in four directions of up, down, right, and left when viewed in plan view. Metal wiring embedded in the insulating film electrically connects one of the first electrodes to another of the first electrodes, and electrically connects one of the second electrodes to another of the second electrodes. The humidity sensor has increased capacitance per unit area and improved adhesiveness and can be made using normal semiconductor manufacturing processes.

Abstract: In order to form a light receiving element having high reliability and a MOS transistor together on the same silicon substrate, after forming a gate electrode of the MOS transistor, a gate oxide film in a light receiving element forming region is removed. Then, a thermal oxide film is newly formed in the light receiving element forming region, and ion implantation is performed in the light receiving element forming region through the thermal oxide film such that a shallow pn junction is formed.

Abstract: In order to form a light receiving element having high reliability and a MOS transistor together on the same silicon substrate, after forming a gate electrode of the MOS transistor, a gate oxide film in a light receiving element forming region is removed. Then, a thermal oxide film is newly formed in the light receiving element forming region, and ion implantation is performed in the light receiving element forming region through the thermal oxide film such that a shallow pn junction is formed.

Abstract: In order to form a light receiving element having high reliability and a MOS transistor together on the same silicon substrate, after forming a gate electrode of the MOS transistor, a gate oxide film in a light receiving element forming region is removed. Then, a thermal oxide film is newly formed in the light receiving element forming region, and ion implantation is performed in the light receiving element forming region through the thermal oxide film such that a shallow pn junction is formed.

Abstract: Provided is a humidity sensor that is increased in capacitance per unit area and is improved in the close adhesiveness and ease of embedding of a humidity sensitive film, while being capable of fitting into normal semiconductor manufacturing processes. A plurality of first electrodes and a plurality of second electrodes are arranged so that each first electrode is adjacent to four of the second electrodes in four directions of up, down, right, and left when viewed in plan view, while each second electrode is adjacent to four of the first electrodes in four directions of up, down, right, and left when viewed in plan view. Metal wiring electrically connects one of the first electrodes to another of the first electrodes, and electrically connects one of the second electrodes to another of the second electrodes.

Abstract: The semiconductor variable capacitor includes a capacitor including an n-well 16 formed in a first region of a semiconductor substrate 10, an insulating film 18 formed over the semiconductor substrate 10 and a gate electrode 20n formed above the n-well 16 with the insulating film 18 interposed therebetween; and a p-well 14 of a second conduction type formed in a second region adjacent to the first region of the semiconductor substrate 10. The gate electrode 20n has an end which is extended to the second region and formed above the p-well 14 with the insulating film 18 interposed therebetween.

Abstract: A method of manufacturing semiconductor device comprising forms a first impurity diffusion region as a lower electrode of a capacitor in a first area of a semiconductor substrate by implanting impurities at a first dose; forms a second impurity diffusion region in a second area, at the end part of the semiconductor substrate, by implanting impurities at a second dose; and forms, by a thermal oxidation method, a capacitor insulation film having a first thickness on the first impurity diffusion region and forms an oxide film having a second thickness which is thicker than the first thickness on the second area.

Abstract: The semiconductor variable capacitor includes a capacitor including an n-well 16 formed in a first region of a semiconductor substrate 10, an insulating film 18 formed over the semiconductor substrate 10 and a gate electrode 20n formed above the n-well 16 with the insulating film 18 interposed therebetween; and a p-well 14 of a second conduction type formed in a second region adjacent to the first region of the semiconductor substrate 10. The gate electrode 20n has an end which is extended to the second region and formed above the p-well 14 with the insulating film 18 interposed therebetween.

Abstract: A method of manufacturing semiconductor device comprising forms a first impurity diffusion region as a lower electrode of a capacitor in a first area of a semiconductor substrate by implanting impurities at a first dose; forms a second impurity diffusion region in a second area, at the end part of the semiconductor substrate, by implanting impurities at a second dose; and forms, by a thermal oxidation method, a capacitor insulation film having a first thickness on the first impurity diffusion region and forms an oxide film having a second thickness which is thicker than the first thickness on the second area.

Abstract: A non-volatile semiconductor memory comprising a semiconductor substrate, a gate insulating film formed on the substrate, and having a thin central section and thick end sections, a floating gate formed on the rate insulating film, an inter-electrode insulating film formed on the floating gate, a control gate formed on the inter-electrode insulating film, and source/drain regions formed in the substrate on both sides of the floating sate and having extensions extending under the thick end sections of the floating gate, and separated from the thin central section of the gate insulating film, wherein the thin central section enables tunneling of carriers at a low applied voltage, and thick end sections prevent tunneling of stored charges to the extensions and enhance retention of the stored charges.

Abstract: A semiconductor memory device having a plurality of memory cells, word lines and bit lines formed on a semiconductor substrate, where each of the memory cells includes a source area formed adjacent to a channel area in the semiconductor substrate; a drain area formed opposite the source area with the channel area therebetween in the semiconductor substrate, the drain area being connected to one of the bit lines; a tunnel insulating film formed on the channel area, the tunnel insulating film having a proper thickness for a carrier to pass through by a tunnel phenomenon; a floating gate formed on the tunnel insulating film so as to overlap neither the source area nor the drain area; a gate insulating film formed on the floating gate so as to cover the floating gate; and a control gate formed on the gate insulating film so as to partially overlap both of the source area and the drain area, the control gate being connected to one of the word lines.

Abstract: A semiconductor memory device manufacturing method includes the steps of (a) forming a stack of a first gate insulating layer, a floating gate electrode layer, an inter-electrode insulating layer, and a control electrode layer on a semiconductor substrate; (b) patterning the stack using a mask and thereby creating a gate electrode pattern; (c) causing a chemical reaction for the gate electrode pattern from both sides thereof and increasing thereby the thickness of the gate insulating layer at the end sections; and (d) implanting ions of impurity in the active regions on both sides of the gate electrode pattern and forming thereby first source/drain regions respectively extending into regions respectively below the end sections of the gate insulating layer. In the semiconductor memory device, a tunnel oxide film can be thinned and reduction in retention time of memory information can be prevented.

Abstract: A semiconductor memory device has a plurality of memory cells, word lines and bit lines formed on a semiconductor substrate. Each of the memory cells comprising a source area formed adjacent to a channel area in the semiconductor substrate; a drain area formed opposite the source area with the channel area therebetween in the semiconductor substrate, the drain area being connected to one of the bit lines; a tunnel insulating film formed on the channel area, the tunnel insulating film having a proper thickness for a carrier to pass through by a tunnel phenomenon; a floating gate formed on the tunnel insulating film so as to overlap neither the source area nor the drain area; a gate insulating film formed on the floating gate so as to cover the floating gate; and a control gate formed on the gate insulating film so as to partially overlap both of the source area and the drain area, the control gate being connected to one of the word lines.

Abstract: A non-linear optical device includes a plurality of quantum dots in an active layer such that the quantum dots have a composition or doping modified asymmetric in a direction perpendicular to the active layer.

Abstract: A source region and a drain region are formed in a surface layer of a semiconductor substrate on both sides of a channel region defined in the surface layer. A tunneling insulating film is formed on the channel region, the tunneling insulating film having a thickness which allows carriers to tunnel therethrough. A floating gate electrode is formed on the tunneling insulating film, the floating gate electrode being disposed so as to overlap neither the source region nor the drain region as viewed along a substrate normal direction. A gate insulating film is formed over the channel region, covering the floating gate electrode. A control gate electrode is formed on the gate insulating film, the control gate electrode being disposed so as to become in contact with, or partially overlap, the source and drain regions as viewed along the substrate normal direction.