Patents by Inventor Toshiro Sato

Toshiro Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5694030
    Abstract: Disclosed is a dc-to-dc converter comprising a switching transistor, a pulse-width modulation controller, a sandwich-type planar inductor, which accumulates an electromagnetic energy at ON state and releases the accumulated electromagnetic energy at OFF state of the switching transistor, a smoothing capacitor, a rectifying element, and a planar search coil for detecting an overcurrent flowing the planar coil, disposed on one of the outer surfaces of the soft magnetic layers constituting the planar inductor.
    Type: Grant
    Filed: September 16, 1996
    Date of Patent: December 2, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiro Sato, Kunio Matsukura, Isamu Yanase, Yuji Iseki, Tetsuhiko Mizoguchi, Yuji Ide, Michio Hasegawa, Yoshihiko Yamaguchi, Yasunori Iwamoto
  • Patent number: 5677617
    Abstract: A micro power supply device using a switching element includes a lateral MOSFET, an inductor, a rectifier and a controller. The lateral MOSFET PWM-switches the output voltage of the direct-current power supply at a low loss. The rectifier rectifies the output voltage of the direct-current power supply PWM-switched by the lateral MOSFET. The inductor is provided between the direct-current power supply and the lateral MOSFET. The controller supplies a PWM control signal to the gate electrode of the lateral MOSFET in response to the output voltage of the rectifier.
    Type: Grant
    Filed: September 14, 1995
    Date of Patent: October 14, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoichi Tokai, Toshiro Sato
  • Patent number: 5612962
    Abstract: A pin-scan-in system driving circuit drives a pin-scan-in circuit to test short-circuit of the wirings or breaking of the wirings in the circuit-mounting substrate, and this circuit is driven using a reduced number of gates. The pin-scan-in system driving circuit drives the pin-scan-in circuit provided in an LSI logic circuit, and the LSI logic circuit is provided with a pin-scan-in circuit selector which selects the pin-scan-in circuit and a selected condition-holding circuit which holds the condition selected by the pin-scan-in circuit selector.
    Type: Grant
    Filed: June 4, 1993
    Date of Patent: March 18, 1997
    Assignee: Fujitsu Limited
    Inventors: Toshiro Sato, Kunitoshi Yamamoto, Hiroyuki Adachi
  • Patent number: 5583424
    Abstract: Disclosed is a dc-to-dc converter comprising a switching transistor, a pulse-width modulation controller, a sandwich-type planar inductor, which accumulates an electromagnetic energy at ON state and releases the accumulated electromagnetic energy at OFF state of the switching transistor, a smoothing capacitor, a rectifying element, and a planar search coil for detecting an overcurrent flowing the planar coil, disposed on one of the outer surfaces of the soft magnetic layers constituting the planar inductor.
    Type: Grant
    Filed: March 15, 1994
    Date of Patent: December 10, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiro Sato, Kunio Matsukura, Isamu Yanase, Yuji Iseki, Tetsuhiko Mizoguchi, Yuji Ide, Michio Hasegawa, Yoshihiko Yamaguchi, Yasunori Iwamoto
  • Patent number: 5583474
    Abstract: Disclosed herein is a planar magnetic element comprising a substrate, a first magnetic layer arranged over the substrate, a first insulation layer arranged over the first magnetic layer, a planer coil formed of a conductor, having a plurality of turns, arranged over the first insulation layer and having a gap aspect ratio of at least 1, the gap aspect ratio being the ratio of the thickness of the conductor to the gap between any adjacent two of the turns, a second insulation layer arranged over the planar coil, and a second magnetic layer arranged over the second insulation layer. When used as an inductor, the planar magnetic element has a great quality coefficient Q. When used as a transformer, it has a large gain and a high voltage ratio. Since the element is small and thin, it is suitable for use in an integrated circuit, and can greatly contribute to miniaturization of electronic devices.
    Type: Grant
    Filed: May 25, 1994
    Date of Patent: December 10, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuhiko Mizoguchi, Toshiro Sato, Masashi Sahashi, Michio Hasegawa, Hiroshi Tomita, Atsuhito Sawabe
  • Patent number: 5572478
    Abstract: A power supply unit including DC-DC converter using a thin and planar inductor arranged in an IC memory card incorporating an EEPROM memory chip, wherein a voltage is adjusted by a dropping regulator, thereby reducing power consumption. The thin and planar inductor includes, stacked on a semiconductor substrate, a planar coil and magnetic thin films formed to sandwich the planar coil, so that an entire area of an IC card can be decreased. The IC card can be driven by a single power supply, thus providing a compact portable information device which can be driven by a battery for a long time.
    Type: Grant
    Filed: March 31, 1995
    Date of Patent: November 5, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiro Sato, Tomoharu Tanaka, Tetsuhiko Mizoguchi, Yuji Ide
  • Patent number: 5537036
    Abstract: A high frequency magnetic property measuring apparatus for soft magnetic film includes a magnetic detection device for detecting the intensity of magnetization in a sample material, a high frequency magnetic field generator for generating magnetic field, a power source for supplying current to the magnetic field generator, and a data processing device for getting high frequency magnetic parameters of the sample by using a detection signal output from the magnetic detector. The magnetic field generator is made up of a plane-shaped coil of a conductor having a configuration in which both ends of the plane-shaped coil are closed to form a cavity as a second internal cavity in which the detector is placed. The magnetic detector is made up of a plane-shaped coil of a conductor having a configuration in which both ends of said plane-shaped coil are closed to form a cavity as a first internal cavity in which the sample material is placed. The magnetic detector is placed in the magnetic field generator.
    Type: Grant
    Filed: September 8, 1993
    Date of Patent: July 16, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiro Sato, Tetsuhiko Mizoguchi
  • Patent number: 5522946
    Abstract: An amorphous magnetic thin film possesses as at least part of a thin film forming area a microstructure composed of a first amorphous phase containing at least either of iron and cobalt and bearing magnetism and a second amorphous phase disposed round the first amorphous phase and containing boron and at least one element selected from among the elements of the 4B Group in the Periodic Table of Elements and exhibits uniaxial magnetic anisotropy in the plane of film. The amorphous magnetic thin film possesses soft magnetism concurrently satisfying high saturation magnetization and high resistivity and, at the same time, easily acquires high frequency permeability by applying magnetic field in the hard axis of magnetization. Use of these amorphous magnetic thin films for plane magnetic elements permits the plane magnetic elements to be miniaturized and to be endowed with exalted performance. The amorphous magnetic thin film possesses a composition substantially represented by the formula:(Fe.sub.1-x Co.sub.x).
    Type: Grant
    Filed: June 28, 1994
    Date of Patent: June 4, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Tomita, Tetsuo Inoue, Hiromi Fuke, Toshiro Sato, Tetsuhiko Mizoguchi
  • Patent number: 5469399
    Abstract: A DC--DC converter using a planar inductor is arranged in an IC memory card incorporating an EEPROM memory chip, and power supply is performed such that a voltage is adjusted by a dropping regulator, thereby reducing power consumption. The power consumption of the IC memory card incorporating the EEPROM can be reduced. The IC card can be driven by a single power supply, thereby providing a compact portable information device which can be driven by a battery for a long time.
    Type: Grant
    Filed: March 15, 1994
    Date of Patent: November 21, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiro Sato, Tomoharu Tanaka, Tetsuhiko Mizoguchi, Yuji Ide
  • Patent number: 5430424
    Abstract: Disclosed is a planar transformer comprising a planar primary spiral coil and a planar secondary spiral coil, which are mutually insulated and laminated, wherein, (1) when the winding width W.sub.1 of the primary spiral coil and the winding width W.sub.2 of the secondary spiral coil have the relationship of W.sub.1 .ltoreq.W.sub.2, the inner size A.sub.i1 of the primary spiral coil and the inner size A.sub.i2 of the secondary spiral coil coincide with each other, and (2) when the winding width W.sub.1 of the primary spiral coil and the winding width W.sub.2 of the secondary spiral coil have the relationship of W.sub.1 >W.sub.2, the central axes of the primary and secondary spiral coils coincide with each other, the outer size A.sub.o2 of the secondary spiral coil is equal to or smaller than the outer size A.sub.o1 of the primary spiral coil, and the secondary spiral coil is arranged corresponding to a position at which magnetic flux generated by a current flowing through the primary spiral coil is largest.
    Type: Grant
    Filed: March 14, 1994
    Date of Patent: July 4, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiro Sato, Tetsuhiko Mizoguchi
  • Patent number: 5387551
    Abstract: A method of manufacturing a planar inductance element, including the steps of forming a thermal oxide film, a magnetic film, a first insulating interlayer, a planar coil, and a second insulating interlayer on a first semiconductor substrate, forming an insulating film and a magnetic film on a second semiconductor substrate, and adhering the first and the second semiconductor substrates such that the coil side of the first semiconductor substrate faces the magnetic film side of the second semiconductor substrate. According to this method, a stress generated by stacking thin films can be reduced compared with that of a conventional inductance element. Therefore, a high-frequency loss can be reduced, and a quality coefficient Q can be increased.
    Type: Grant
    Filed: March 4, 1993
    Date of Patent: February 7, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuhiko Mizoguchi, Atsuhito Sawabe, Hiromi Fuke, Toshiro Sato
  • Patent number: 4707622
    Abstract: A logic circuit includes an inverter circuit including a first enhancement type field effect transistor having a gate connected to an input, and a first depletion type transistor having a gate and a source which are directly connected to a drain of the first enhancement type field effect transistor. A source follower circuit including a second enhancement type field effect transistor having a gate is connected to a connecting point of the first enhancement type field effect transistor and the first depletion type field effect transistor. A second depletion type field effect transistor having a gate and a source which are directly connected to each other has a drain which is connected to a source of the second enhancement type field effect transistor.
    Type: Grant
    Filed: December 31, 1985
    Date of Patent: November 17, 1987
    Assignee: Fujitsu Limited
    Inventors: Hisoka Takao, Toshiro Sato, Seiichi Saito, Toshinari Hayashi