Abstract: An image pickup area including a plurality of pixels arranged in a two-dimensional matrix pattern, each pixel being an amplified MOS image sensor, is divided into a block A including odd-numbered columns of pixels and a block B including even-numbered columns of pixels. A horizontal signal line and an output amplifier are provided for each of the block A and the block B. Signal voltages on vertical signal lines are temporarily stored in a line memory. In the normal mode, the signal voltages of two pixels adjacent to each other in the horizontal direction are supplied from the line memory respectively to the output amplifiers. In the correction mode, a switch is closed to connect the horizontal signal lines with each other so that the signal voltage of the same pixel is supplied to the output amplifiers.

Abstract: The solid-state image pickup element comprises a filter film made of a single-layer inorganic material which exhibits a maximum value at a specific wavelength on transmission spectra of incident light in accordance with a film thickness thereof, and a photoelectrical conversion part for generating a signal charge in accordance with light quantity of the incident light transmitted through the filter film. For the filter film, a number of the filter films of at least two kinds having different film thickness is provided, and a number of the filter films are arranged in parallel based on a prescribed arrangement. Image pickup signals outputted from the solid-state image pickup element are signal-processed by a signal processor.

Abstract: The present invention provides a small, high-performance imaging device and its application to products at low cost by preventing noise superimposed on a timing pulse feed line from affecting the output of an imaging chip. The imaging device includes two chips: an imaging chip 101 including a sensor 102 and an image processing chip 106 including an image processing circuit 110. The transistors of all circuits in the imaging chip 101 are formed as either nMOS or pMOS transistors. The imaging chip 101 is stacked on the image processing chip 106.

Abstract: A color filter arrangement (11) is used, in which a plurality of filter units are each made of 2×2 arrangements of red (R), green (G), green (G) and blue (B) color elements. First, signal charges are added up for all pixels belonging to each of a plurality of pixel blocks made of quadratic arrangements of 3×3 of pixels, which are larger than the filter units (2×2 arrangement). Then, compressed color information for each of the pixel blocks is obtained from a result of the addition for each pixel block, taking the 2×2 arrangements of pixel blocks as large filter units.

Abstract: An imaging element includes a photoelectric conversion element, a readout transistor, an accumulated element, a detection transistor, and a reset transistor. The readout transistor reads a signal charge when a gate potential to be supplied to the gate terminal is changed from a first state to a second state. The detection transistor detects a voltage signal after the gate potential to be supplied to the gate terminal of the readout transistor is changed from the second state to the first state. A reset potential supplied from the reset transistor to the accumulated element has an intermediate potential between the gate potential in the first state that is supplied to the gate terminal of the readout transistor and a predetermined VDD potential.

Abstract: Gray level data of boundary pixels that are adjacent to a block boundary in a photoelectric conversion section is stored. Then, a cumulative histogram regarding the number of pixels for different gray levels is produced based on the stored gray level data separately for each block, and a data table representing the correspondence between each gray level before correction and that after correction for the block to be corrected is produced so as to reduce the difference between the cumulative histograms. The data table is stored in a correction data RAM. By using the data table, the outputs of the block to be corrected are non-linearly corrected for different gray levels.

Abstract: A digital camera with interchangeable displays having a built-in display device and an image output terminal for transmitting image signals to an external monitor device, characterized in that it has a plurality of means for processing the image, outputting a suitable image to the built-in display device or to the external monitor device by switching between the means for processing the image on the basis of prescribed signals.

Abstract: A digital camera with interchangeable displays having a built-in display device and an image output terminal for transmitting image signals to an external monitor device, characterized in that it has a plurality of means for processing the image, outputting a suitable image to the built-in display device or to the external monitor device by switching between the means for processing the image on the basis of prescribed signals.

Abstract: A system and method for simultaneously accessing video data and Internet page data includes a format manager that inserts a video tag into page data to concurrently display a positionable video window and the page data upon the screen of a display device. The format manager reformats the displayed page data to avoid the video window when shown on the display device. The format manager also maintains the video window in a stationary position when a system user scrolls the page data in relation to the video window.

Abstract: A solid-state imaging device includes pixels 2 arranged two-dimensionally on a semiconductor substrate 1. In a predetermined area in each pixel is formed a light-sensitive area 3 for receiving incident light 11, and each pixel includes a photoelectric conversion portion 4 for converting the incident light into a signal charge. In at least some of the pixels, the center of the light-sensitive area is offset from the center of the pixel when seen from directly above a principal surface of the semiconductor substrate. Each pixel further includes a light-path change member 12a and 12b for deflecting incident light traveling toward the center of the pixel so as to be directed toward the center of the light-sensitive area. Thus, a solid-state imaging device simultaneously realizing the miniaturization of pixels and a high image quality is provided.

Abstract: A solid state imaging device of the present invention comprises a solid state imaging element which includes a plurality of photoelectric conversion elements arranged in a matrix. In the solid state imaging device of the present invention, a pixel mixture unit area includes q pixels (q is a natural number equal to or greater than 2) in the first direction of the solid state imaging element and p pixels (p is a natural number equal to or greater than 2) in the second direction that crosses the first direction.

Abstract: The present invention provides a solid-state image sensor, a solid-state image sensing apparatus, and a camera realizing a high-speed operation, all operable to output signal charges so as to maintain the light sensitivity and generate high-quality video signals free from moiréand aliased signals even if the number of pixels making up one frame of an image is reduced. The solid-state image sensor comprises a plurality of photoelectric converters, vertical transfer groups, and a horizontal transfer unit disposed at one side of the vertical transfer groups. Each vertical transfer group includes 2n+1 vertical transfer units, where n is an integer of 1 or more. Each vertical transfer unit includes a plurality of transfer electrodes arranged in columns and charge storage units receiving and storing charges from the photoelectric converters. In n out of the 2n+1 vertical transfer units, predetermined transfer electrodes disposed near the horizontal transfer unit are independent transfer electrodes.

Abstract: A solid-state image sensing apparatus including a solid-state image sensing device and a signal processing circuit. The solid-state image sensing device includes: a vertical transfer unit, composed of transfer columns corresponding to columns of the light-to-electric conversion elements, operable to transfer, in a vertical direction, signal charges read out from the light-to-electric conversion elements; a horizontal transfer unit operable to receive the signal charges from the vertical transfer unit and transfer them in a horizontal direction. The signal processing circuit converts the signal charges from the horizontal transfer unit into pixel data, and rearranges it into a two-dimensional array. In the rearrangement, the signal processing circuit, per transfer of one piece of pixel data, cyclically selects a line memory out of three line memories, writes a piece of pixel data into the selected line memory, or reads a row of pixel data from the selected line memory.

Abstract: A solid-state imaging element includes photoelectric conversion elements having a complementary or Bayer color filter array. The solid-state imaging element adds together electric charges stored in nine photoelectric conversion elements having color filters of one of multiple colors in each portion of six rows and six columns, to obtain a resulting electric charge, and outputs the resulting electric charge as one pixel. A portion for one of the colors deviates from a portion for each of the other colors by three rows and/or three columns. This pixel-addition operation produces an effect of a spatial low pass filter, thereby reducing signal components exceeding a Nyquist frequency corresponding to a target resolution. Consequently, aliasing noise in an image with the target resolution is reduced, and therefore higher image quality can be achieved, when compared with a conventional resolution reduction technique.

Abstract: A solid-state image sensor includes photoelectric converters positioned either in a complementary color filter array or in the Bayer color filter array. The solid-state image sensor either adds together electric charges obtained by 9 photoelectric converters that relate to one color in each portion of six rows and six columns of the photoelectric converters so as to output a resulting electric charge as one pixel, or outputs the electric charges obtained by 9 photoelectric converters that relate to one color as 9 pixels without added together. By adding together the electric charges, the resolution of an image becomes one ninth of the case where the electric charges are not added together, and the sensitivity becomes 9 times higher than the same. The control unit not shown in the drawing determines a time length for photoelectric conversion assuming that the electric charges are not added together.

Abstract: A drive unit 120 sets a saturation amount in a read period in which charges generated in pixels are read to vertical CCDs to be lower in a combination mode than in an individual mode (see Vsub in count values 22 to 24 in FIG. 6). As a result, excess charges in the pixels are drained to an n-type substrate 11. The drive unit 120 also sets al accumulation period to be shorter in combination mode than in individual mode (see Vsub in each mode in FIG. 6).

Abstract: An image defect correction apparatus that processes luminance signals output from two-dimensionally arranged light-sensitive elements via a plurality of vertical charge coupled devices and a horizontal charge coupled device in a predetermined order, outputs image information, and includes: a recording unit that records therein an X address for identifying a correction-target vertical line of pixels corresponding to a vertical charge coupled device in which a point defect exists; a correction value calculating unit that calculates a correction value from values of (i) a luminance signal corresponding to at least one pixel at a predetermined position on the correction-target vertical line identified by the X address and (ii) a luminance signal corresponding to at least one pixel at a predetermined position on another vertical line; and a correcting unit that corrects values of luminance signals corresponding to the correction-target vertical line, based on the calculated correction value.

Abstract: A pixel signal output from a solid-state imaging device is converted into image data and recorded in a memory by a writing controller. A reading controller reads the image data from the memory by blocks and performs Y/C processing on the image data that has been read out by blocks. A JPEG processing section performs compression coding. The coded data is not recorded in the memory but is written on a recording medium by a DMA processing section.

Abstract: A pixel area of a megapixel solid-state color imaging device is divided into unit areas for pixel adding and all the pixels for the same color are added together in each unit area. Accordingly, the percentage of utilized pixels is raised to 100% and aliasing noise to low frequencies in a high-frequency video signal is greatly suppressed by a spatial LPF (low pass filter) effect of the pixel addition in the area units.

Abstract: A solid state imaging apparatus includes a plurality of pixels two-dimensionally arranged in the row direction and the column direction, and every two of the plurality of pixels that are adjacent to each other in the row direction or the column direction include color filters of different colors, respectively. A signal mixture circuit is provided in each same-row and same-color pixel group. Each said same-row and same-color pixel group consisting of ones of the plurality of pixels which are included in a pixel mixture unit to be a subject of pixel signal mixture, which are located in the same row, and which include color filters of the same color. The signal mixture circuit includes a combination of a capacitor and a transmission switch, stores pixel signals from pixels included in a same-row and same-color pixel group and mixes the signals together.