Patents by Inventor Toshiya Otomo

Toshiya Otomo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9549412
    Abstract: A scheduling method is executed by a first apparatus among a plurality of apparatuses. The scheduling method includes assigning a process to at least one apparatus among the apparatuses based on a first table that includes each communication strength of the apparatuses; receiving an execution result of the process and a communication strength from the at least one apparatus; and creating the first table based on the received communication strength.
    Type: Grant
    Filed: October 18, 2013
    Date of Patent: January 17, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Hiromasa Yamauchi, Koichiro Yamashita, Takahisa Suzuki, Koji Kurihara, Toshiya Otomo, Naoki Odate
  • Patent number: 9529549
    Abstract: A data processing method that is executed by a first data processing apparatus included among plural data processing apparatuses, includes producing a copy of data, and restoration information that includes a first address of memory to which the copy of the data is stored; transmitting any one among the data and the copy of the data to a second data processing apparatus that is included among the data processing apparatuses; and storing the restoration information to shared memory that is memory of at least one data processing apparatus among the data processing apparatuses, and shared among the data processing apparatuses.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: December 27, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Toshiya Otomo, Koichiro Yamashita, Naoki Odate, Takahisa Suzuki, Hiromasa Yamauchi, Koji Kurihara
  • Patent number: 9529073
    Abstract: A determining method executed by a processor includes obtaining distance information that indicates a distance between monitoring apparatuses disposed to encompass a given area in which wireless communications apparatuses are scattered; causing a wireless signal to be transmitted and received between the monitoring apparatuses by multi-hop communication among the wireless communications apparatuses; calculating an estimated distance between the monitoring apparatuses, based on a hop count of the wireless signal multi-hop communicated among the monitoring apparatuses; and making a determination concerning a vacant area in which none of the wireless communications apparatuses is present, based on a result of comparison of the distance indicated by the obtained distance information and the calculated estimated distance.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: December 27, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Toshiya Otomo, Koichiro Yamashita, Takahisa Suzuki, Hiromasa Yamauchi, Koji Kurihara, Yuta Teranishi
  • Publication number: 20160357604
    Abstract: A data processing system includes an interrupt controller that counts, as an interrupt processing execution count, executions of interrupt processing by threads executed by data processing devices; and a processor that is configured to select one scheduling method from among a plurality of scheduling methods, based on the interrupt processing execution count.
    Type: Application
    Filed: August 17, 2016
    Publication date: December 8, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Koji KURIHARA, Koichiro YAMASHITA, Takahisa SUZUKI, Hiromasa YAMAUCHI, Toshiya OTOMO, Naoki ODATE
  • Patent number: 9513965
    Abstract: A data processing system includes an interrupt controller that counts, as an interrupt processing execution count, executions of interrupt processing by threads executed by data processing devices; and a processor that is configured to select one scheduling method from among a plurality of scheduling methods, based on the interrupt processing execution count.
    Type: Grant
    Filed: August 17, 2016
    Date of Patent: December 6, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Koji Kurihara, Koichiro Yamashita, Takahisa Suzuki, Hiromasa Yamauchi, Toshiya Otomo, Naoki Odate
  • Patent number: 9507645
    Abstract: A thread processing method that is executed by a multi-core processor, includes supplying a command to execute a first thread to a first processor; judging a dependence relationship between the first thread and a second thread to be executed by a second processor; comparing a first threshold and a frequency of access of any one among shared memory and shared cache memory by the first thread; and changing a phase of a first operation clock of the first processor when the access frequency is greater than the first threshold and upon judging that no dependence relationship exists.
    Type: Grant
    Filed: October 18, 2013
    Date of Patent: November 29, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Hiromasa Yamauchi, Koichiro Yamashita, Takahisa Suzuki, Koji Kurihara, Toshiya Otomo, Naoki Odate
  • Patent number: 9507633
    Abstract: A scheduling method that is executed by a first central processing unit (CPU) includes determining whether a task belongs to a first task category; determining whether a first access area accessed by the task is located in a first memory or a second memory, when the task belongs to the first task category; and setting a memory accessed by the task to the first memory or the second memory, based on a result at the determining.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: November 29, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Koji Kurihara, Koichiro Yamashita, Takahisa Suzuki, Naoki Odate, Toshiya Otomo
  • Patent number: 9507635
    Abstract: A scheduling method is executed by a given CPU among multiple CPUs. The scheduling method includes subtracting for each of the CPUs, a number of processes assigned to the CPU from a maximum number of speculative processes that can be assigned to each of the CPUs; summing results yielded at the subtracting to yield a total number of speculative processes; and assigning to the CPUs, speculative processes of a number is less than or equal to the total number of speculative processes.
    Type: Grant
    Filed: July 12, 2013
    Date of Patent: November 29, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Toshiya Otomo, Koichiro Yamashita, Takahisa Suzuki, Hiromasa Yamauchi, Koji Kurihara, Naoki Odate
  • Publication number: 20160334854
    Abstract: A scheduling method is executed by a processor, and includes detecting a transition from a first process to a second process; acquiring from memory, an operating frequency and a CPU count for executing the second process; suspending a CPU under operation or starting a suspended CPU, based on the CPU count; and assigning the operating frequency to a CPU that is to execute the second process.
    Type: Application
    Filed: July 26, 2016
    Publication date: November 17, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Takahisa SUZUKI, Koichiro Yamashita, Hiromasa Yamauchi, Koji Kurihara, Toshiya Otomo, Naoki ODATE, Tetsuo HIRAKI
  • Patent number: 9483101
    Abstract: A multicore processor system includes multiple processors; a device; a memory that stores information of voltage and clock frequency for minimizing power consumption in connection with a number of the processors accessing to the device; and a power control unit that controls the voltage and the clock frequency of the processors on the basis of the information stored in the memory if the number of the processors accessing to the device changes.
    Type: Grant
    Filed: June 12, 2013
    Date of Patent: November 1, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Takahisa Suzuki, Koichiro Yamashita, Hiromasa Yamauchi, Koji Kurihara, Fumihiko Hayakawa, Naoki Odate, Tetsuo Hiraki, Toshiya Otomo
  • Publication number: 20160316443
    Abstract: Among plural communications nodes that transfer data to a communications apparatus by multihop communication, a communications node includes a transmitting circuit configured to transmit a synchronization request signal requesting transmission of a synchronization signal for synchronizing the multihop communication at the communications node; a receiving circuit configured to receive the synchronization signal in response to the synchronization request signal transmitted by the transmitting circuit; and a power control circuit configured to control the receiving circuit such that a state of the receiving circuit is a first state where power consumption of the receiving circuit is a first power before the transmitting circuit transmits the synchronization request signal and is a second state where the power consumption of the receiving circuit is a second power that is higher than the first power after the transmitting circuit transmits the synchronization request signal.
    Type: Application
    Filed: July 7, 2016
    Publication date: October 27, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Toshiya Otomo, Koichiro Yamashita, Takahisa Suzuki, Hiromasa Yamauchi
  • Publication number: 20160308731
    Abstract: An analysis method includes detecting, by a computer, a malfunctioning node count of nodes malfunctioning among plural nodes in a period during operation of a system configured to realize a function even when a portion of nodes malfunction among the plural nodes; and calculating, by the computer and based on the detected malfunctioning node count and the period, a count of nodes that malfunction per unit time after the period.
    Type: Application
    Filed: June 28, 2016
    Publication date: October 20, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Koichiro Yamashita, Takahisa Suzuki, Hiromasa Yamauchi, Toshiya Otomo
  • Patent number: 9465646
    Abstract: A coprocessor stores to local memory, a driver execution start time, for each execution start of drivers. If a CPU call process is executed during the execution of driver A, the coprocessor calculates the difference of the execution start time and the current time, for drivers B and C. Taking driver C as an example, the coprocessor adds to the difference calculated for the driver C, a processing time required for the CPU call process of driver A and a processing time required for a normal process of driver B. The coprocessor determines whether respective addition results for driver C comply with respective time constraints. If it is determined that an addition result for the driver C cannot comply with the time constraint, and the coprocessor sends an execution request for driver C to another coprocessor.
    Type: Grant
    Filed: September 4, 2014
    Date of Patent: October 11, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Toshiya Otomo, Koichiro Yamashita, Takahisa Suzuki, Hiromasa Yamauchi, Yuta Teranishi
  • Patent number: 9467947
    Abstract: A sensor node executes any one among a first operation by which another sensor node is requested to execute data process and if the request is not accepted the sensor node starts executing the data processing after waiting for charging and a second operation by which the sensor node starts executing the data processing after waiting for charging, without requesting the data processing to be executed. The sensor node compares an expected value of a first time that elapses until execution is started by the sensor node or the other sensor node when the first operation is executed, and a second time that elapses until execution is started by the sensor node when the second operation is executed. Based on the comparison result, the sensor node executes among the first operation and the second operation, the operation for which the time that elapses until execution is started is shorter.
    Type: Grant
    Filed: February 27, 2015
    Date of Patent: October 11, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Hiromasa Yamauchi, Koichiro Yamashita, Takahisa Suzuki, Koji Kurihara, Toshiya Otomo, Yuta Teranishi
  • Patent number: 9465096
    Abstract: A determining method includes obtaining by each monitoring apparatus among plural monitoring apparatuses disposed encompassing a given area having plural wireless communications apparatuses, hop count information that indicates a hop count of a wireless signal transmitted by one wireless communications apparatus among the wireless communications apparatuses and received by the monitoring apparatus via multi-hop communication by the wireless communications apparatuses; calculating by each monitoring apparatus, an estimated line that represents candidates of a position of the one wireless communications apparatus, the estimated line being calculated from an estimated distance between the monitoring apparatus and the one wireless communications apparatus, based on the hop count; correcting by each monitoring apparatus, the calculated estimated line based on information indicating a node-less area in which no wireless communications apparatus of the given area is present; and determining the position of the one w
    Type: Grant
    Filed: March 3, 2015
    Date of Patent: October 11, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Toshiya Otomo, Koichiro Yamashita, Takahisa Suzuki, Hiromasa Yamauchi, Koji Kurihara, Yuta Teranishi
  • Patent number: 9459870
    Abstract: A data processor includes: a plurality of controllers that process data; a program memory that stores a standby instruction and a data processing instruction at a plurality of addresses respectively; and a queue that stores different execution start addresses for the plurality of controllers, wherein after the plurality of controllers sequentially access the queue, the plurality of controllers acquire the different execution start addresses from the queue in an order of the sequential access, start execution of instructions from the acquired different execution start addresses in the program memory, and execute the data processing instruction and execute the standby instruction the number of times different for each of the controllers.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: October 4, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Toshiya Otomo, Koichiro Yamashita, Takahisa Suzuki, Hiromasa Yamauchi, Koji Kurihara, Yuta Teranishi
  • Publication number: 20160277955
    Abstract: A communications network control method by a computer includes obtaining measurement area information indicating a measurement area of a sensor included in a communications node, the computer obtaining the measurement area information for each communications node in a communications node group that is included in a communications network and that is among plural communications nodes arranged in an arrangement area; obtaining divided area information indicating plural divided areas obtained by dividing the arrangement area; deriving for each divided area among the plural divided areas, a first value corresponding to a count of communications nodes that are in the communications node group and at least partially include the divided area in the measurement area indicated by the obtained measurement area information; and providing control of changing among the plural communications nodes, communications nodes included in the communications network, according to the first value derived for each divided area.
    Type: Application
    Filed: June 1, 2016
    Publication date: September 22, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Takahisa Suzuki, Koichiro Yamashita, Toshiya Otomo, Hiromasa Yamauchi
  • Patent number: 9448931
    Abstract: An endian conversion method is executed by a CPU, and includes executing a program that includes endian conversion setting; and performing, when accessing an address of a main memory indicated in the endian conversion setting, endian conversion of data specified by the address of the main memory.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: September 20, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Akihito Kataoka, Koichiro Yamashita, Naoki Odate, Takahisa Suzuki, Hiromasa Yamauchi, Koji Kurihara, Toshiya Otomo
  • Publication number: 20160255423
    Abstract: A system includes communications nodes, respectively having a sensor; and a communications apparatus that simultaneously requests the communications nodes to transmit sensor data. A first communications node among the communications nodes, when determining that among a first state where the communications apparatus includes the first communications node when requesting transmission and a second state where the communications apparatus excludes the first communications node when requesting transmission, the first communications node is in the second state: determines whether a predetermined difference is present between a predetermined value and the sensor data of the first communications node, and transmits a notification signal that notifies the communications apparatus of the predetermined difference, when determining that the predetermined difference is present.
    Type: Application
    Filed: May 12, 2016
    Publication date: September 1, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Takahisa Suzuki, Toshiya Otomo, Hiromasa Yamauchi, Koichiro Yamashita
  • Publication number: 20160254945
    Abstract: A sensor node among sensor nodes that synchronously switch between a first state and a second state transmits an abnormality notification signal to a collecting apparatus when in the first state and an abnormality occurs at the sensor node. The sensor node, when in the second state, transmits to the communications apparatus, a data signal that differs from the abnormality notification signal. During each interval of the first state, the sensor node enters a third state during a first partial interval of the interval of the first state, and receives and transfers an abnormality notification signal transmitted by another sensor node among the sensor nodes. During each interval of the first state, the sensor node further enters a fourth state during a second partial interval of the interval of the first state and different from the first partial interval, and refrains from receiving the abnormality notification signal.
    Type: Application
    Filed: May 6, 2016
    Publication date: September 1, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Toshiya Otomo, Koichiro Yamashita, Takahisa Suzuki, Hiromasa Yamauchi