Patents by Inventor Toshiya Otomo

Toshiya Otomo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140026143
    Abstract: An exclusive access control method is executed by a computer having an operating system that when an excluded thread accesses a shared resource, executes a first exclusive access control process of prohibiting the excluded thread from attempting to access the shared resource until exclusive access control is released, the exclusive access control process being executed according to a number of attempts, by the excluded thread, to access the shared resources. The exclusive access control method includes counting by at least one second thread, including the excluded thread and different from a first thread, the number of attempts to access the shared resource, when the first thread executes a second exclusive access control process of allowing the excluded thread to attempt to access the shared resource until the excluded thread is permitted access; and storing to a memory area by the second thread, the counted number of attempts.
    Type: Application
    Filed: September 25, 2013
    Publication date: January 23, 2014
    Applicant: Fujitsu Limited
    Inventors: Takahisa SUZUKI, Koichiro Yamashita, Hiromasa Yamauchi, Koji Kurihara, Toshiya Otomo, Naoki Odate
  • Publication number: 20140019710
    Abstract: An endian conversion method is executed by a CPU, and includes executing a program that includes endian conversion setting; and performing, when accessing an address of a main memory indicated in the endian conversion setting, endian conversion of data specified by the address of the main memory.
    Type: Application
    Filed: September 17, 2013
    Publication date: January 16, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Akihito Kataoka, Koichiro Yamashita, Naoki Odate, Takahisa Suzuki, Hiromasa Yamauchi, Koji Kurihara, Toshiya Otomo
  • Publication number: 20140019989
    Abstract: A multi-core processor system includes plural CPUs; memory that is shared among the CPUs; and a monitoring unit that instructs a change of assignment of threads to the CPUs based on a first process count stored in the memory and representing a count of processes under execution by the CPUs and a second process count representing a count of processes assigned to the CPUs, respectively.
    Type: Application
    Filed: September 13, 2013
    Publication date: January 16, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Takahisa Suzuki, Koichiro Yamashita, Hiromasa Yamauchi, Koji Kurihara, Toshiya Otomo, Naoki Odate
  • Publication number: 20140012921
    Abstract: A file sharing method executed by a first terminal, and including selecting from among multiple terminals including the first terminal and based on a remaining battery level of the terminals and a processing time of a shared process, a second terminal to execute the shared process for sharing multiple files among the terminals; and assigning the shared process to the second terminal.
    Type: Application
    Filed: September 13, 2013
    Publication date: January 9, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Toshiya Otomo, Koichiro Yamashita, Takahisa Suzuki, Hiromasa Yamauchi, Koji Kurihara, Naoki Odate, Tetsuo Hiraki
  • Publication number: 20140007131
    Abstract: A scheduling method is executed by a first CPU and a second CPU. The scheduling method includes acquiring by the first CPU and when a first application is invoked, a first threshold for executing the first application; transmitting by the first CPU, a first threshold to the second CPU; and giving notification to the first CPU by the second CPU when an execution capability of the second CPU is greater than or equal to the first threshold, the notification indicating that the second CPU can execute the first application. The second CPU does not give notification to the first CPU when the execution capability of the second CPU is less than the first threshold.
    Type: Application
    Filed: September 6, 2013
    Publication date: January 2, 2014
    Applicant: Fujitsu Limited
    Inventors: Hiromasa YAMAUCHI, Koichiro YAMASHITA, Takahisa SUZUKI, Koji KURIHARA, Toshiya OTOMO, Naoki ODATE
  • Publication number: 20130331108
    Abstract: A communication apparatus includes a first CPU that is capable of executing a communication process at a first processing speed; a measuring unit that measures a first transmission speed when the communication process is executed with a base station; a collecting unit that collects from at least one other apparatus, a second transmission speed between the base station and the apparatus, and a second processing speed of a second CPU included in the other apparatus based on the first transmission speed; a determining unit that determines whether the communication process is to be transferred to the other apparatus, based on the second transmission speed and the second processing speed; and a transferring unit that transfers the communication process to the other apparatus based on a determination result.
    Type: Application
    Filed: August 9, 2013
    Publication date: December 12, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Toshiya OTOMO, Koichiro YAMASHITA, Takahisa SUZUKI, Hiromasa YAMAUCHI, Koji KURIHARA, Fumihiko HAYAKAWA
  • Publication number: 20130326527
    Abstract: A scheduling method is executed by a processor, and includes detecting a transition from a first process to a second process; acquiring from memory, an operating frequency and a CPU count for executing the second process; suspending a CPU under operation or starting a suspended CPU, based on the CPU count; and assigning the operating frequency to a CPU that is to execute the second process.
    Type: Application
    Filed: August 9, 2013
    Publication date: December 5, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Takahisa SUZUKI, Koichiro YAMASHITA, Hiromasa YAMAUCHI, Koji KURIHARA, Toshiya OTOMO, Naoki ODATE, Tetsuo HIRAKI
  • Publication number: 20130318310
    Abstract: A processor processing method is executed by a memory controller, and includes determining based on a log of access of a shared resource by a first application, whether the first application running on a first processor operates normally; and causing a second processor to run a second application other than the first application upon the first application being determined to not be operating normally.
    Type: Application
    Filed: July 24, 2013
    Publication date: November 28, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Hiromasa Yamauchi, Koichiro Yamashita, Takahisa Suzuki, Koji Kurihara, Fumihiko Hayakawa, Toshiya Otomo
  • Publication number: 20130311751
    Abstract: A system includes plural processors; memory that stores a program currently under execution by the processors; and a pre-loader that pre-loads into a fragment area of the memory, a target program that is to be executed and is a program other than the program currently under execution by the processors.
    Type: Application
    Filed: July 24, 2013
    Publication date: November 21, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Koji KURIHARA, Koichiro YAMASHITA, Takahisa SUZUKI, Hiromasa YAMAUCHI, Fumihiko HAYAKAWA, Naoki ODATE, Tetsuo HIRAKI, Toshiya OTOMO
  • Publication number: 20130312002
    Abstract: A scheduling method executed by a scheduler that manages multiple processors, includes detecting based on an application information table when a first application is started up, a processor that executes a second application that is not executed concurrently with the first application; and assigning the first application to the processor.
    Type: Application
    Filed: July 19, 2013
    Publication date: November 21, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Hiromasa Yamauchi, Koichiro Yamashita, Tetsuo Hiraki, Koji Kurihara, Toshiya Otomo
  • Publication number: 20130311727
    Abstract: A memory control method includes assigning based on a table to which an allocated device that executes a first process in a first application is registered, the first process in the first application to the allocated device registered; notifying a port connector of identification information of a port of memory, the port to be used by the first application, and registering a number of the port into the table; and allocating a storage area to the port and registering an address of the storage area into the table.
    Type: Application
    Filed: July 24, 2013
    Publication date: November 21, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Hiromasa YAMAUCHI, Koichiro YAMASHITA, Takahisa SUZUKI, Koji KURIHARA, Toshiya OTOMO
  • Publication number: 20130305251
    Abstract: A scheduling method is performed by a scheduler that manages plural processors including a first processor and a second processor. The scheduling method includes assigning an application to the first processor when the application is started; instructing the second processor to calculate load of the processors; and maintaining assignment of the application or changing assignment of the application based on the load.
    Type: Application
    Filed: July 18, 2013
    Publication date: November 14, 2013
    Inventors: Hiromasa YAMAUCHI, Koichiro Yamashita, Tetsuo Hiraki, Koji Kurihara, Toshiya Otomo
  • Publication number: 20130303221
    Abstract: A scheduling method includes acquiring first information, second information, and third information from a first terminal located in a service area of a first base station; determining based on the first information, the second information, and the third information, whether a first process assigned to the first terminal is to be collected; and assigning the first process to a second terminal located in the service area of the first base station, when at the determining the first process is determined to be collected.
    Type: Application
    Filed: July 12, 2013
    Publication date: November 14, 2013
    Inventors: Toshiya OTOMO, Koichiro YAMASHITA, Takahisa SUZUKI, Hiromasa YAMAUCHI, Koji KURIHARA, Tetsuo HIRAKI
  • Publication number: 20130305257
    Abstract: A scheduling method is executed by a given CPU among multiple CPUs. The scheduling method includes subtracting for each of the CPUs, a number of processes assigned to the CPU from a maximum number of speculative processes that can be assigned to each of the CPUs; summing results yielded at the subtracting to yield a total number of speculative processes; and assigning to the CPUs, speculative processes of a number is less than or equal to the total number of speculative processes.
    Type: Application
    Filed: July 12, 2013
    Publication date: November 14, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Toshiya OTOMO, Koichiro YAMASHITA, Takahisa SUZUKI, Hiromasa YAMAUCHI, Koji KURIHARA, Naoki ODATE
  • Publication number: 20130298132
    Abstract: A multi-core processor system includes plural processors; and a scheduler that assigns applications to the processors. The scheduler upon receiving a startup request for a given application and based on start times of the applications executed by the processors, selects a processor that is to execute the given application.
    Type: Application
    Filed: July 12, 2013
    Publication date: November 7, 2013
    Inventors: Koji Kurihara, Koichiro Yamashita, Takahisa Suzuki, Hiromasa Yamauchi, Toshiya Otomo, Naoki Odate
  • Publication number: 20130275790
    Abstract: A multicore processor system includes multiple processors; a device; a memory that stores information of voltage and clock frequency for minimizing power consumption in connection with a number of the processors accessing to the device; and a power control unit that controls the voltage and the clock frequency of the processors on the basis of the information stored in the memory if the number of the processors accessing to the device changes.
    Type: Application
    Filed: June 12, 2013
    Publication date: October 17, 2013
    Inventors: Takahisa SUZUKI, Koichiro Yamashita, Hiromasa Yamauchi, Koji Kurihara, Fumihiko Hayakawa, Naoki Odate, Tetsuo Hiraki, Toshiya Otomo
  • Publication number: 20130275996
    Abstract: A synchronization method of multiple threads is executed by a computer. The synchronization method includes determining a type of a synchronization process of a first thread performing the synchronization process for synchronization with a second thread; starting time measurement when the type of the synchronization process of the first thread is a first type; performing the synchronization process of the first thread and a synchronization process of the second thread based on a synchronization process history of the second thread when the measured time exceeds a permitted response period of the first thread; and updating the permitted response period and performing the synchronization processes of the first thread and the second thread based on the synchronization process history of the second thread, when another processing request is received.
    Type: Application
    Filed: June 13, 2013
    Publication date: October 17, 2013
    Inventors: Koji KURIHARA, Koichiro Yamashita, Takahisa Suzuki, Hiromasa Yamauchi, Toshiya Otomo